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authorAndreas Schwab <schwab@suse.de>2009-01-27 15:45:57 -0500
committerIngo Molnar <mingo@elte.hu>2009-01-30 17:55:25 -0500
commit7fc49f19813030f2e15ad2ccec5cb701f7f4a3ec (patch)
treeb4e52b975777e18151811019541e24f0a6f2bfc8 /arch/x86
parent618b2c8db24522ae273d8299c6a936ea13793c4d (diff)
x86 setup: fix asm constraints in vesa_store_edid
Impact: fix potential miscompile (currently believed non-manifest) As the comment explains, the VBE DDC call can clobber any register. Tell the compiler about that fact. Signed-off-by: Andreas Schwab <schwab@suse.de> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/boot/video-vesa.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/arch/x86/boot/video-vesa.c b/arch/x86/boot/video-vesa.c
index 75115849af33..4a58c8ce3f69 100644
--- a/arch/x86/boot/video-vesa.c
+++ b/arch/x86/boot/video-vesa.c
@@ -269,9 +269,8 @@ void vesa_store_edid(void)
269 we genuinely have to assume all registers are destroyed here. */ 269 we genuinely have to assume all registers are destroyed here. */
270 270
271 asm("pushw %%es; movw %2,%%es; "INT10"; popw %%es" 271 asm("pushw %%es; movw %2,%%es; "INT10"; popw %%es"
272 : "+a" (ax), "+b" (bx) 272 : "+a" (ax), "+b" (bx), "+c" (cx), "+D" (di)
273 : "c" (cx), "D" (di) 273 : : "esi", "edx");
274 : "esi");
275 274
276 if (ax != 0x004f) 275 if (ax != 0x004f)
277 return; /* No EDID */ 276 return; /* No EDID */
@@ -285,9 +284,9 @@ void vesa_store_edid(void)
285 dx = 0; /* EDID block number */ 284 dx = 0; /* EDID block number */
286 di =(size_t) &boot_params.edid_info; /* (ES:)Pointer to block */ 285 di =(size_t) &boot_params.edid_info; /* (ES:)Pointer to block */
287 asm(INT10 286 asm(INT10
288 : "+a" (ax), "+b" (bx), "+d" (dx), "=m" (boot_params.edid_info) 287 : "+a" (ax), "+b" (bx), "+d" (dx), "=m" (boot_params.edid_info),
289 : "c" (cx), "D" (di) 288 "+c" (cx), "+D" (di)
290 : "esi"); 289 : : "esi");
291#endif /* CONFIG_FIRMWARE_EDID */ 290#endif /* CONFIG_FIRMWARE_EDID */
292} 291}
293 292