diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-11 14:02:13 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-11 14:02:13 -0500 |
commit | 42776163e13a56ea3096edff7a5df95408e80eb4 (patch) | |
tree | 92f17bb5dadc7261b2d9238244cd8d4cb6c1bfd7 /arch/x86 | |
parent | edb2877f4a62647e36e20839a786f94d688a06ed (diff) | |
parent | 3d03e2ea74103a50c23d6ab1906cf73399c0dafb (diff) |
Merge branch 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (28 commits)
perf session: Fix infinite loop in __perf_session__process_events
perf evsel: Support perf_evsel__open(cpus > 1 && threads > 1)
perf sched: Use PTHREAD_STACK_MIN to avoid pthread_attr_setstacksize() fail
perf tools: Emit clearer message for sys_perf_event_open ENOENT return
perf stat: better error message for unsupported events
perf sched: Fix allocation result check
perf, x86: P4 PMU - Fix unflagged overflows handling
dynamic debug: Fix build issue with older gcc
tracing: Fix TRACE_EVENT power tracepoint creation
tracing: Fix preempt count leak
tracepoint: Add __rcu annotation
tracing: remove duplicate null-pointer check in skb tracepoint
tracing/trivial: Add missing comma in TRACE_EVENT comment
tracing: Include module.h in define_trace.h
x86: Save rbp in pt_regs on irq entry
x86, dumpstack: Fix unused variable warning
x86, NMI: Clean-up default_do_nmi()
x86, NMI: Allow NMI reason io port (0x61) to be processed on any CPU
x86, NMI: Remove DIE_NMI_IPI
x86, NMI: Add priorities to handlers
...
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/include/asm/kdebug.h | 1 | ||||
-rw-r--r-- | arch/x86/include/asm/mach_traps.h | 12 | ||||
-rw-r--r-- | arch/x86/include/asm/nmi.h | 20 | ||||
-rw-r--r-- | arch/x86/include/asm/perf_event_p4.h | 3 | ||||
-rw-r--r-- | arch/x86/kernel/apic/hw_nmi.c | 3 | ||||
-rw-r--r-- | arch/x86/kernel/apic/x2apic_uv_x.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce-inject.c | 5 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/perf_event.c | 3 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/perf_event_p4.c | 28 | ||||
-rw-r--r-- | arch/x86/kernel/dumpstack.c | 6 | ||||
-rw-r--r-- | arch/x86/kernel/entry_64.S | 36 | ||||
-rw-r--r-- | arch/x86/kernel/kgdb.c | 7 | ||||
-rw-r--r-- | arch/x86/kernel/reboot.c | 5 | ||||
-rw-r--r-- | arch/x86/kernel/traps.c | 102 | ||||
-rw-r--r-- | arch/x86/oprofile/nmi_int.c | 3 | ||||
-rw-r--r-- | arch/x86/oprofile/nmi_timer_int.c | 2 |
16 files changed, 137 insertions, 101 deletions
diff --git a/arch/x86/include/asm/kdebug.h b/arch/x86/include/asm/kdebug.h index f23eb2528464..ca242d35e873 100644 --- a/arch/x86/include/asm/kdebug.h +++ b/arch/x86/include/asm/kdebug.h | |||
@@ -18,7 +18,6 @@ enum die_val { | |||
18 | DIE_TRAP, | 18 | DIE_TRAP, |
19 | DIE_GPF, | 19 | DIE_GPF, |
20 | DIE_CALL, | 20 | DIE_CALL, |
21 | DIE_NMI_IPI, | ||
22 | DIE_PAGE_FAULT, | 21 | DIE_PAGE_FAULT, |
23 | DIE_NMIUNKNOWN, | 22 | DIE_NMIUNKNOWN, |
24 | }; | 23 | }; |
diff --git a/arch/x86/include/asm/mach_traps.h b/arch/x86/include/asm/mach_traps.h index f7920601e472..72a8b52e7dfd 100644 --- a/arch/x86/include/asm/mach_traps.h +++ b/arch/x86/include/asm/mach_traps.h | |||
@@ -7,9 +7,19 @@ | |||
7 | 7 | ||
8 | #include <asm/mc146818rtc.h> | 8 | #include <asm/mc146818rtc.h> |
9 | 9 | ||
10 | #define NMI_REASON_PORT 0x61 | ||
11 | |||
12 | #define NMI_REASON_SERR 0x80 | ||
13 | #define NMI_REASON_IOCHK 0x40 | ||
14 | #define NMI_REASON_MASK (NMI_REASON_SERR | NMI_REASON_IOCHK) | ||
15 | |||
16 | #define NMI_REASON_CLEAR_SERR 0x04 | ||
17 | #define NMI_REASON_CLEAR_IOCHK 0x08 | ||
18 | #define NMI_REASON_CLEAR_MASK 0x0f | ||
19 | |||
10 | static inline unsigned char get_nmi_reason(void) | 20 | static inline unsigned char get_nmi_reason(void) |
11 | { | 21 | { |
12 | return inb(0x61); | 22 | return inb(NMI_REASON_PORT); |
13 | } | 23 | } |
14 | 24 | ||
15 | static inline void reassert_nmi(void) | 25 | static inline void reassert_nmi(void) |
diff --git a/arch/x86/include/asm/nmi.h b/arch/x86/include/asm/nmi.h index c4021b953510..c76f5b92b840 100644 --- a/arch/x86/include/asm/nmi.h +++ b/arch/x86/include/asm/nmi.h | |||
@@ -23,6 +23,26 @@ void arch_trigger_all_cpu_backtrace(void); | |||
23 | #define arch_trigger_all_cpu_backtrace arch_trigger_all_cpu_backtrace | 23 | #define arch_trigger_all_cpu_backtrace arch_trigger_all_cpu_backtrace |
24 | #endif | 24 | #endif |
25 | 25 | ||
26 | /* | ||
27 | * Define some priorities for the nmi notifier call chain. | ||
28 | * | ||
29 | * Create a local nmi bit that has a higher priority than | ||
30 | * external nmis, because the local ones are more frequent. | ||
31 | * | ||
32 | * Also setup some default high/normal/low settings for | ||
33 | * subsystems to registers with. Using 4 bits to seperate | ||
34 | * the priorities. This can go alot higher if needed be. | ||
35 | */ | ||
36 | |||
37 | #define NMI_LOCAL_SHIFT 16 /* randomly picked */ | ||
38 | #define NMI_LOCAL_BIT (1ULL << NMI_LOCAL_SHIFT) | ||
39 | #define NMI_HIGH_PRIOR (1ULL << 8) | ||
40 | #define NMI_NORMAL_PRIOR (1ULL << 4) | ||
41 | #define NMI_LOW_PRIOR (1ULL << 0) | ||
42 | #define NMI_LOCAL_HIGH_PRIOR (NMI_LOCAL_BIT | NMI_HIGH_PRIOR) | ||
43 | #define NMI_LOCAL_NORMAL_PRIOR (NMI_LOCAL_BIT | NMI_NORMAL_PRIOR) | ||
44 | #define NMI_LOCAL_LOW_PRIOR (NMI_LOCAL_BIT | NMI_LOW_PRIOR) | ||
45 | |||
26 | void stop_nmi(void); | 46 | void stop_nmi(void); |
27 | void restart_nmi(void); | 47 | void restart_nmi(void); |
28 | 48 | ||
diff --git a/arch/x86/include/asm/perf_event_p4.h b/arch/x86/include/asm/perf_event_p4.h index 295e2ff18a6a..e2f6a99f14ab 100644 --- a/arch/x86/include/asm/perf_event_p4.h +++ b/arch/x86/include/asm/perf_event_p4.h | |||
@@ -20,6 +20,9 @@ | |||
20 | #define ARCH_P4_MAX_ESCR (ARCH_P4_TOTAL_ESCR - ARCH_P4_RESERVED_ESCR) | 20 | #define ARCH_P4_MAX_ESCR (ARCH_P4_TOTAL_ESCR - ARCH_P4_RESERVED_ESCR) |
21 | #define ARCH_P4_MAX_CCCR (18) | 21 | #define ARCH_P4_MAX_CCCR (18) |
22 | 22 | ||
23 | #define ARCH_P4_CNTRVAL_BITS (40) | ||
24 | #define ARCH_P4_CNTRVAL_MASK ((1ULL << ARCH_P4_CNTRVAL_BITS) - 1) | ||
25 | |||
23 | #define P4_ESCR_EVENT_MASK 0x7e000000U | 26 | #define P4_ESCR_EVENT_MASK 0x7e000000U |
24 | #define P4_ESCR_EVENT_SHIFT 25 | 27 | #define P4_ESCR_EVENT_SHIFT 25 |
25 | #define P4_ESCR_EVENTMASK_MASK 0x01fffe00U | 28 | #define P4_ESCR_EVENTMASK_MASK 0x01fffe00U |
diff --git a/arch/x86/kernel/apic/hw_nmi.c b/arch/x86/kernel/apic/hw_nmi.c index 72ec29e1ae06..79fd43ca6f96 100644 --- a/arch/x86/kernel/apic/hw_nmi.c +++ b/arch/x86/kernel/apic/hw_nmi.c | |||
@@ -68,7 +68,6 @@ arch_trigger_all_cpu_backtrace_handler(struct notifier_block *self, | |||
68 | 68 | ||
69 | switch (cmd) { | 69 | switch (cmd) { |
70 | case DIE_NMI: | 70 | case DIE_NMI: |
71 | case DIE_NMI_IPI: | ||
72 | break; | 71 | break; |
73 | 72 | ||
74 | default: | 73 | default: |
@@ -96,7 +95,7 @@ arch_trigger_all_cpu_backtrace_handler(struct notifier_block *self, | |||
96 | static __read_mostly struct notifier_block backtrace_notifier = { | 95 | static __read_mostly struct notifier_block backtrace_notifier = { |
97 | .notifier_call = arch_trigger_all_cpu_backtrace_handler, | 96 | .notifier_call = arch_trigger_all_cpu_backtrace_handler, |
98 | .next = NULL, | 97 | .next = NULL, |
99 | .priority = 1 | 98 | .priority = NMI_LOCAL_LOW_PRIOR, |
100 | }; | 99 | }; |
101 | 100 | ||
102 | static int __init register_trigger_all_cpu_backtrace(void) | 101 | static int __init register_trigger_all_cpu_backtrace(void) |
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index ecca5f41ad2c..89b9f56aaae3 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c | |||
@@ -641,7 +641,7 @@ void __cpuinit uv_cpu_init(void) | |||
641 | */ | 641 | */ |
642 | int uv_handle_nmi(struct notifier_block *self, unsigned long reason, void *data) | 642 | int uv_handle_nmi(struct notifier_block *self, unsigned long reason, void *data) |
643 | { | 643 | { |
644 | if (reason != DIE_NMI_IPI) | 644 | if (reason != DIE_NMIUNKNOWN) |
645 | return NOTIFY_OK; | 645 | return NOTIFY_OK; |
646 | 646 | ||
647 | if (in_crash_kexec) | 647 | if (in_crash_kexec) |
diff --git a/arch/x86/kernel/cpu/mcheck/mce-inject.c b/arch/x86/kernel/cpu/mcheck/mce-inject.c index e7dbde7bfedb..a77971979564 100644 --- a/arch/x86/kernel/cpu/mcheck/mce-inject.c +++ b/arch/x86/kernel/cpu/mcheck/mce-inject.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/gfp.h> | 25 | #include <linux/gfp.h> |
26 | #include <asm/mce.h> | 26 | #include <asm/mce.h> |
27 | #include <asm/apic.h> | 27 | #include <asm/apic.h> |
28 | #include <asm/nmi.h> | ||
28 | 29 | ||
29 | /* Update fake mce registers on current CPU. */ | 30 | /* Update fake mce registers on current CPU. */ |
30 | static void inject_mce(struct mce *m) | 31 | static void inject_mce(struct mce *m) |
@@ -83,7 +84,7 @@ static int mce_raise_notify(struct notifier_block *self, | |||
83 | struct die_args *args = (struct die_args *)data; | 84 | struct die_args *args = (struct die_args *)data; |
84 | int cpu = smp_processor_id(); | 85 | int cpu = smp_processor_id(); |
85 | struct mce *m = &__get_cpu_var(injectm); | 86 | struct mce *m = &__get_cpu_var(injectm); |
86 | if (val != DIE_NMI_IPI || !cpumask_test_cpu(cpu, mce_inject_cpumask)) | 87 | if (val != DIE_NMI || !cpumask_test_cpu(cpu, mce_inject_cpumask)) |
87 | return NOTIFY_DONE; | 88 | return NOTIFY_DONE; |
88 | cpumask_clear_cpu(cpu, mce_inject_cpumask); | 89 | cpumask_clear_cpu(cpu, mce_inject_cpumask); |
89 | if (m->inject_flags & MCJ_EXCEPTION) | 90 | if (m->inject_flags & MCJ_EXCEPTION) |
@@ -95,7 +96,7 @@ static int mce_raise_notify(struct notifier_block *self, | |||
95 | 96 | ||
96 | static struct notifier_block mce_raise_nb = { | 97 | static struct notifier_block mce_raise_nb = { |
97 | .notifier_call = mce_raise_notify, | 98 | .notifier_call = mce_raise_notify, |
98 | .priority = 1000, | 99 | .priority = NMI_LOCAL_NORMAL_PRIOR, |
99 | }; | 100 | }; |
100 | 101 | ||
101 | /* Inject mce on current CPU */ | 102 | /* Inject mce on current CPU */ |
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c index 04921017abe0..9d977a2ea693 100644 --- a/arch/x86/kernel/cpu/perf_event.c +++ b/arch/x86/kernel/cpu/perf_event.c | |||
@@ -1267,7 +1267,6 @@ perf_event_nmi_handler(struct notifier_block *self, | |||
1267 | 1267 | ||
1268 | switch (cmd) { | 1268 | switch (cmd) { |
1269 | case DIE_NMI: | 1269 | case DIE_NMI: |
1270 | case DIE_NMI_IPI: | ||
1271 | break; | 1270 | break; |
1272 | case DIE_NMIUNKNOWN: | 1271 | case DIE_NMIUNKNOWN: |
1273 | this_nmi = percpu_read(irq_stat.__nmi_count); | 1272 | this_nmi = percpu_read(irq_stat.__nmi_count); |
@@ -1317,7 +1316,7 @@ perf_event_nmi_handler(struct notifier_block *self, | |||
1317 | static __read_mostly struct notifier_block perf_event_nmi_notifier = { | 1316 | static __read_mostly struct notifier_block perf_event_nmi_notifier = { |
1318 | .notifier_call = perf_event_nmi_handler, | 1317 | .notifier_call = perf_event_nmi_handler, |
1319 | .next = NULL, | 1318 | .next = NULL, |
1320 | .priority = 1 | 1319 | .priority = NMI_LOCAL_LOW_PRIOR, |
1321 | }; | 1320 | }; |
1322 | 1321 | ||
1323 | static struct event_constraint unconstrained; | 1322 | static struct event_constraint unconstrained; |
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c index 81400b93e694..e56b9bfbabd1 100644 --- a/arch/x86/kernel/cpu/perf_event_p4.c +++ b/arch/x86/kernel/cpu/perf_event_p4.c | |||
@@ -753,19 +753,21 @@ out: | |||
753 | 753 | ||
754 | static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc) | 754 | static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc) |
755 | { | 755 | { |
756 | int overflow = 0; | 756 | u64 v; |
757 | u32 low, high; | ||
758 | 757 | ||
759 | rdmsr(hwc->config_base + hwc->idx, low, high); | 758 | /* an official way for overflow indication */ |
760 | 759 | rdmsrl(hwc->config_base + hwc->idx, v); | |
761 | /* we need to check high bit for unflagged overflows */ | 760 | if (v & P4_CCCR_OVF) { |
762 | if ((low & P4_CCCR_OVF) || !(high & (1 << 31))) { | 761 | wrmsrl(hwc->config_base + hwc->idx, v & ~P4_CCCR_OVF); |
763 | overflow = 1; | 762 | return 1; |
764 | (void)checking_wrmsrl(hwc->config_base + hwc->idx, | ||
765 | ((u64)low) & ~P4_CCCR_OVF); | ||
766 | } | 763 | } |
767 | 764 | ||
768 | return overflow; | 765 | /* it might be unflagged overflow */ |
766 | rdmsrl(hwc->event_base + hwc->idx, v); | ||
767 | if (!(v & ARCH_P4_CNTRVAL_MASK)) | ||
768 | return 1; | ||
769 | |||
770 | return 0; | ||
769 | } | 771 | } |
770 | 772 | ||
771 | static void p4_pmu_disable_pebs(void) | 773 | static void p4_pmu_disable_pebs(void) |
@@ -1152,9 +1154,9 @@ static __initconst const struct x86_pmu p4_pmu = { | |||
1152 | */ | 1154 | */ |
1153 | .num_counters = ARCH_P4_MAX_CCCR, | 1155 | .num_counters = ARCH_P4_MAX_CCCR, |
1154 | .apic = 1, | 1156 | .apic = 1, |
1155 | .cntval_bits = 40, | 1157 | .cntval_bits = ARCH_P4_CNTRVAL_BITS, |
1156 | .cntval_mask = (1ULL << 40) - 1, | 1158 | .cntval_mask = ARCH_P4_CNTRVAL_MASK, |
1157 | .max_period = (1ULL << 39) - 1, | 1159 | .max_period = (1ULL << (ARCH_P4_CNTRVAL_BITS - 1)) - 1, |
1158 | .hw_config = p4_hw_config, | 1160 | .hw_config = p4_hw_config, |
1159 | .schedule_events = p4_pmu_schedule_events, | 1161 | .schedule_events = p4_pmu_schedule_events, |
1160 | /* | 1162 | /* |
diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c index 8474c998cbd4..d6fb146c0d8b 100644 --- a/arch/x86/kernel/dumpstack.c +++ b/arch/x86/kernel/dumpstack.c | |||
@@ -197,14 +197,8 @@ void show_stack(struct task_struct *task, unsigned long *sp) | |||
197 | */ | 197 | */ |
198 | void dump_stack(void) | 198 | void dump_stack(void) |
199 | { | 199 | { |
200 | unsigned long bp = 0; | ||
201 | unsigned long stack; | 200 | unsigned long stack; |
202 | 201 | ||
203 | #ifdef CONFIG_FRAME_POINTER | ||
204 | if (!bp) | ||
205 | get_bp(bp); | ||
206 | #endif | ||
207 | |||
208 | printk("Pid: %d, comm: %.20s %s %s %.*s\n", | 202 | printk("Pid: %d, comm: %.20s %s %s %.*s\n", |
209 | current->pid, current->comm, print_tainted(), | 203 | current->pid, current->comm, print_tainted(), |
210 | init_utsname()->release, | 204 | init_utsname()->release, |
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S index e3ba417e8697..d3b895f375d3 100644 --- a/arch/x86/kernel/entry_64.S +++ b/arch/x86/kernel/entry_64.S | |||
@@ -299,17 +299,21 @@ ENDPROC(native_usergs_sysret64) | |||
299 | ENTRY(save_args) | 299 | ENTRY(save_args) |
300 | XCPT_FRAME | 300 | XCPT_FRAME |
301 | cld | 301 | cld |
302 | movq_cfi rdi, RDI+16-ARGOFFSET | 302 | /* |
303 | movq_cfi rsi, RSI+16-ARGOFFSET | 303 | * start from rbp in pt_regs and jump over |
304 | movq_cfi rdx, RDX+16-ARGOFFSET | 304 | * return address. |
305 | movq_cfi rcx, RCX+16-ARGOFFSET | 305 | */ |
306 | movq_cfi rax, RAX+16-ARGOFFSET | 306 | movq_cfi rdi, RDI+8-RBP |
307 | movq_cfi r8, R8+16-ARGOFFSET | 307 | movq_cfi rsi, RSI+8-RBP |
308 | movq_cfi r9, R9+16-ARGOFFSET | 308 | movq_cfi rdx, RDX+8-RBP |
309 | movq_cfi r10, R10+16-ARGOFFSET | 309 | movq_cfi rcx, RCX+8-RBP |
310 | movq_cfi r11, R11+16-ARGOFFSET | 310 | movq_cfi rax, RAX+8-RBP |
311 | 311 | movq_cfi r8, R8+8-RBP | |
312 | leaq -ARGOFFSET+16(%rsp),%rdi /* arg1 for handler */ | 312 | movq_cfi r9, R9+8-RBP |
313 | movq_cfi r10, R10+8-RBP | ||
314 | movq_cfi r11, R11+8-RBP | ||
315 | |||
316 | leaq -RBP+8(%rsp),%rdi /* arg1 for handler */ | ||
313 | movq_cfi rbp, 8 /* push %rbp */ | 317 | movq_cfi rbp, 8 /* push %rbp */ |
314 | leaq 8(%rsp), %rbp /* mov %rsp, %ebp */ | 318 | leaq 8(%rsp), %rbp /* mov %rsp, %ebp */ |
315 | testl $3, CS(%rdi) | 319 | testl $3, CS(%rdi) |
@@ -782,8 +786,9 @@ END(interrupt) | |||
782 | 786 | ||
783 | /* 0(%rsp): ~(interrupt number) */ | 787 | /* 0(%rsp): ~(interrupt number) */ |
784 | .macro interrupt func | 788 | .macro interrupt func |
785 | subq $ORIG_RAX-ARGOFFSET+8, %rsp | 789 | /* reserve pt_regs for scratch regs and rbp */ |
786 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-ARGOFFSET+8 | 790 | subq $ORIG_RAX-RBP, %rsp |
791 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-RBP | ||
787 | call save_args | 792 | call save_args |
788 | PARTIAL_FRAME 0 | 793 | PARTIAL_FRAME 0 |
789 | call \func | 794 | call \func |
@@ -808,9 +813,14 @@ ret_from_intr: | |||
808 | TRACE_IRQS_OFF | 813 | TRACE_IRQS_OFF |
809 | decl PER_CPU_VAR(irq_count) | 814 | decl PER_CPU_VAR(irq_count) |
810 | leaveq | 815 | leaveq |
816 | |||
811 | CFI_RESTORE rbp | 817 | CFI_RESTORE rbp |
812 | CFI_DEF_CFA_REGISTER rsp | 818 | CFI_DEF_CFA_REGISTER rsp |
813 | CFI_ADJUST_CFA_OFFSET -8 | 819 | CFI_ADJUST_CFA_OFFSET -8 |
820 | |||
821 | /* we did not save rbx, restore only from ARGOFFSET */ | ||
822 | addq $8, %rsp | ||
823 | CFI_ADJUST_CFA_OFFSET -8 | ||
814 | exit_intr: | 824 | exit_intr: |
815 | GET_THREAD_INFO(%rcx) | 825 | GET_THREAD_INFO(%rcx) |
816 | testl $3,CS-ARGOFFSET(%rsp) | 826 | testl $3,CS-ARGOFFSET(%rsp) |
diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c index cd21b654dec6..a4130005028a 100644 --- a/arch/x86/kernel/kgdb.c +++ b/arch/x86/kernel/kgdb.c | |||
@@ -48,6 +48,7 @@ | |||
48 | #include <asm/apicdef.h> | 48 | #include <asm/apicdef.h> |
49 | #include <asm/system.h> | 49 | #include <asm/system.h> |
50 | #include <asm/apic.h> | 50 | #include <asm/apic.h> |
51 | #include <asm/nmi.h> | ||
51 | 52 | ||
52 | struct dbg_reg_def_t dbg_reg_def[DBG_MAX_REG_NUM] = | 53 | struct dbg_reg_def_t dbg_reg_def[DBG_MAX_REG_NUM] = |
53 | { | 54 | { |
@@ -525,10 +526,6 @@ static int __kgdb_notify(struct die_args *args, unsigned long cmd) | |||
525 | } | 526 | } |
526 | return NOTIFY_DONE; | 527 | return NOTIFY_DONE; |
527 | 528 | ||
528 | case DIE_NMI_IPI: | ||
529 | /* Just ignore, we will handle the roundup on DIE_NMI. */ | ||
530 | return NOTIFY_DONE; | ||
531 | |||
532 | case DIE_NMIUNKNOWN: | 529 | case DIE_NMIUNKNOWN: |
533 | if (was_in_debug_nmi[raw_smp_processor_id()]) { | 530 | if (was_in_debug_nmi[raw_smp_processor_id()]) { |
534 | was_in_debug_nmi[raw_smp_processor_id()] = 0; | 531 | was_in_debug_nmi[raw_smp_processor_id()] = 0; |
@@ -606,7 +603,7 @@ static struct notifier_block kgdb_notifier = { | |||
606 | /* | 603 | /* |
607 | * Lowest-prio notifier priority, we want to be notified last: | 604 | * Lowest-prio notifier priority, we want to be notified last: |
608 | */ | 605 | */ |
609 | .priority = -INT_MAX, | 606 | .priority = NMI_LOCAL_LOW_PRIOR, |
610 | }; | 607 | }; |
611 | 608 | ||
612 | /** | 609 | /** |
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c index c495aa8d4815..fc7aae1e2bc7 100644 --- a/arch/x86/kernel/reboot.c +++ b/arch/x86/kernel/reboot.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <asm/pci_x86.h> | 18 | #include <asm/pci_x86.h> |
19 | #include <asm/virtext.h> | 19 | #include <asm/virtext.h> |
20 | #include <asm/cpu.h> | 20 | #include <asm/cpu.h> |
21 | #include <asm/nmi.h> | ||
21 | 22 | ||
22 | #ifdef CONFIG_X86_32 | 23 | #ifdef CONFIG_X86_32 |
23 | # include <linux/ctype.h> | 24 | # include <linux/ctype.h> |
@@ -747,7 +748,7 @@ static int crash_nmi_callback(struct notifier_block *self, | |||
747 | { | 748 | { |
748 | int cpu; | 749 | int cpu; |
749 | 750 | ||
750 | if (val != DIE_NMI_IPI) | 751 | if (val != DIE_NMI) |
751 | return NOTIFY_OK; | 752 | return NOTIFY_OK; |
752 | 753 | ||
753 | cpu = raw_smp_processor_id(); | 754 | cpu = raw_smp_processor_id(); |
@@ -778,6 +779,8 @@ static void smp_send_nmi_allbutself(void) | |||
778 | 779 | ||
779 | static struct notifier_block crash_nmi_nb = { | 780 | static struct notifier_block crash_nmi_nb = { |
780 | .notifier_call = crash_nmi_callback, | 781 | .notifier_call = crash_nmi_callback, |
782 | /* we want to be the first one called */ | ||
783 | .priority = NMI_LOCAL_HIGH_PRIOR+1, | ||
781 | }; | 784 | }; |
782 | 785 | ||
783 | /* Halt all other CPUs, calling the specified function on each of them | 786 | /* Halt all other CPUs, calling the specified function on each of them |
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index c76aaca5694d..b9b67166f9de 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c | |||
@@ -84,6 +84,11 @@ EXPORT_SYMBOL_GPL(used_vectors); | |||
84 | static int ignore_nmis; | 84 | static int ignore_nmis; |
85 | 85 | ||
86 | int unknown_nmi_panic; | 86 | int unknown_nmi_panic; |
87 | /* | ||
88 | * Prevent NMI reason port (0x61) being accessed simultaneously, can | ||
89 | * only be used in NMI handler. | ||
90 | */ | ||
91 | static DEFINE_RAW_SPINLOCK(nmi_reason_lock); | ||
87 | 92 | ||
88 | static inline void conditional_sti(struct pt_regs *regs) | 93 | static inline void conditional_sti(struct pt_regs *regs) |
89 | { | 94 | { |
@@ -310,15 +315,15 @@ static int __init setup_unknown_nmi_panic(char *str) | |||
310 | __setup("unknown_nmi_panic", setup_unknown_nmi_panic); | 315 | __setup("unknown_nmi_panic", setup_unknown_nmi_panic); |
311 | 316 | ||
312 | static notrace __kprobes void | 317 | static notrace __kprobes void |
313 | mem_parity_error(unsigned char reason, struct pt_regs *regs) | 318 | pci_serr_error(unsigned char reason, struct pt_regs *regs) |
314 | { | 319 | { |
315 | printk(KERN_EMERG | 320 | pr_emerg("NMI: PCI system error (SERR) for reason %02x on CPU %d.\n", |
316 | "Uhhuh. NMI received for unknown reason %02x on CPU %d.\n", | 321 | reason, smp_processor_id()); |
317 | reason, smp_processor_id()); | ||
318 | |||
319 | printk(KERN_EMERG | ||
320 | "You have some hardware problem, likely on the PCI bus.\n"); | ||
321 | 322 | ||
323 | /* | ||
324 | * On some machines, PCI SERR line is used to report memory | ||
325 | * errors. EDAC makes use of it. | ||
326 | */ | ||
322 | #if defined(CONFIG_EDAC) | 327 | #if defined(CONFIG_EDAC) |
323 | if (edac_handler_set()) { | 328 | if (edac_handler_set()) { |
324 | edac_atomic_assert_error(); | 329 | edac_atomic_assert_error(); |
@@ -329,11 +334,11 @@ mem_parity_error(unsigned char reason, struct pt_regs *regs) | |||
329 | if (panic_on_unrecovered_nmi) | 334 | if (panic_on_unrecovered_nmi) |
330 | panic("NMI: Not continuing"); | 335 | panic("NMI: Not continuing"); |
331 | 336 | ||
332 | printk(KERN_EMERG "Dazed and confused, but trying to continue\n"); | 337 | pr_emerg("Dazed and confused, but trying to continue\n"); |
333 | 338 | ||
334 | /* Clear and disable the memory parity error line. */ | 339 | /* Clear and disable the PCI SERR error line. */ |
335 | reason = (reason & 0xf) | 4; | 340 | reason = (reason & NMI_REASON_CLEAR_MASK) | NMI_REASON_CLEAR_SERR; |
336 | outb(reason, 0x61); | 341 | outb(reason, NMI_REASON_PORT); |
337 | } | 342 | } |
338 | 343 | ||
339 | static notrace __kprobes void | 344 | static notrace __kprobes void |
@@ -341,15 +346,17 @@ io_check_error(unsigned char reason, struct pt_regs *regs) | |||
341 | { | 346 | { |
342 | unsigned long i; | 347 | unsigned long i; |
343 | 348 | ||
344 | printk(KERN_EMERG "NMI: IOCK error (debug interrupt?)\n"); | 349 | pr_emerg( |
350 | "NMI: IOCK error (debug interrupt?) for reason %02x on CPU %d.\n", | ||
351 | reason, smp_processor_id()); | ||
345 | show_registers(regs); | 352 | show_registers(regs); |
346 | 353 | ||
347 | if (panic_on_io_nmi) | 354 | if (panic_on_io_nmi) |
348 | panic("NMI IOCK error: Not continuing"); | 355 | panic("NMI IOCK error: Not continuing"); |
349 | 356 | ||
350 | /* Re-enable the IOCK line, wait for a few seconds */ | 357 | /* Re-enable the IOCK line, wait for a few seconds */ |
351 | reason = (reason & 0xf) | 8; | 358 | reason = (reason & NMI_REASON_CLEAR_MASK) | NMI_REASON_CLEAR_IOCHK; |
352 | outb(reason, 0x61); | 359 | outb(reason, NMI_REASON_PORT); |
353 | 360 | ||
354 | i = 20000; | 361 | i = 20000; |
355 | while (--i) { | 362 | while (--i) { |
@@ -357,8 +364,8 @@ io_check_error(unsigned char reason, struct pt_regs *regs) | |||
357 | udelay(100); | 364 | udelay(100); |
358 | } | 365 | } |
359 | 366 | ||
360 | reason &= ~8; | 367 | reason &= ~NMI_REASON_CLEAR_IOCHK; |
361 | outb(reason, 0x61); | 368 | outb(reason, NMI_REASON_PORT); |
362 | } | 369 | } |
363 | 370 | ||
364 | static notrace __kprobes void | 371 | static notrace __kprobes void |
@@ -377,57 +384,50 @@ unknown_nmi_error(unsigned char reason, struct pt_regs *regs) | |||
377 | return; | 384 | return; |
378 | } | 385 | } |
379 | #endif | 386 | #endif |
380 | printk(KERN_EMERG | 387 | pr_emerg("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n", |
381 | "Uhhuh. NMI received for unknown reason %02x on CPU %d.\n", | 388 | reason, smp_processor_id()); |
382 | reason, smp_processor_id()); | ||
383 | 389 | ||
384 | printk(KERN_EMERG "Do you have a strange power saving mode enabled?\n"); | 390 | pr_emerg("Do you have a strange power saving mode enabled?\n"); |
385 | if (unknown_nmi_panic || panic_on_unrecovered_nmi) | 391 | if (unknown_nmi_panic || panic_on_unrecovered_nmi) |
386 | panic("NMI: Not continuing"); | 392 | panic("NMI: Not continuing"); |
387 | 393 | ||
388 | printk(KERN_EMERG "Dazed and confused, but trying to continue\n"); | 394 | pr_emerg("Dazed and confused, but trying to continue\n"); |
389 | } | 395 | } |
390 | 396 | ||
391 | static notrace __kprobes void default_do_nmi(struct pt_regs *regs) | 397 | static notrace __kprobes void default_do_nmi(struct pt_regs *regs) |
392 | { | 398 | { |
393 | unsigned char reason = 0; | 399 | unsigned char reason = 0; |
394 | int cpu; | ||
395 | 400 | ||
396 | cpu = smp_processor_id(); | 401 | /* |
397 | 402 | * CPU-specific NMI must be processed before non-CPU-specific | |
398 | /* Only the BSP gets external NMIs from the system. */ | 403 | * NMI, otherwise we may lose it, because the CPU-specific |
399 | if (!cpu) | 404 | * NMI can not be detected/processed on other CPUs. |
400 | reason = get_nmi_reason(); | 405 | */ |
406 | if (notify_die(DIE_NMI, "nmi", regs, 0, 2, SIGINT) == NOTIFY_STOP) | ||
407 | return; | ||
401 | 408 | ||
402 | if (!(reason & 0xc0)) { | 409 | /* Non-CPU-specific NMI: NMI sources can be processed on any CPU */ |
403 | if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 2, SIGINT) | 410 | raw_spin_lock(&nmi_reason_lock); |
404 | == NOTIFY_STOP) | 411 | reason = get_nmi_reason(); |
405 | return; | ||
406 | 412 | ||
407 | #ifdef CONFIG_X86_LOCAL_APIC | 413 | if (reason & NMI_REASON_MASK) { |
408 | if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) | 414 | if (reason & NMI_REASON_SERR) |
409 | == NOTIFY_STOP) | 415 | pci_serr_error(reason, regs); |
410 | return; | 416 | else if (reason & NMI_REASON_IOCHK) |
417 | io_check_error(reason, regs); | ||
418 | #ifdef CONFIG_X86_32 | ||
419 | /* | ||
420 | * Reassert NMI in case it became active | ||
421 | * meanwhile as it's edge-triggered: | ||
422 | */ | ||
423 | reassert_nmi(); | ||
411 | #endif | 424 | #endif |
412 | unknown_nmi_error(reason, regs); | 425 | raw_spin_unlock(&nmi_reason_lock); |
413 | |||
414 | return; | 426 | return; |
415 | } | 427 | } |
416 | if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) == NOTIFY_STOP) | 428 | raw_spin_unlock(&nmi_reason_lock); |
417 | return; | ||
418 | 429 | ||
419 | /* AK: following checks seem to be broken on modern chipsets. FIXME */ | 430 | unknown_nmi_error(reason, regs); |
420 | if (reason & 0x80) | ||
421 | mem_parity_error(reason, regs); | ||
422 | if (reason & 0x40) | ||
423 | io_check_error(reason, regs); | ||
424 | #ifdef CONFIG_X86_32 | ||
425 | /* | ||
426 | * Reassert NMI in case it became active meanwhile | ||
427 | * as it's edge-triggered: | ||
428 | */ | ||
429 | reassert_nmi(); | ||
430 | #endif | ||
431 | } | 431 | } |
432 | 432 | ||
433 | dotraplinkage notrace __kprobes void | 433 | dotraplinkage notrace __kprobes void |
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c index f24a8533bcdf..e2b7b0c06cdf 100644 --- a/arch/x86/oprofile/nmi_int.c +++ b/arch/x86/oprofile/nmi_int.c | |||
@@ -65,7 +65,6 @@ static int profile_exceptions_notify(struct notifier_block *self, | |||
65 | 65 | ||
66 | switch (val) { | 66 | switch (val) { |
67 | case DIE_NMI: | 67 | case DIE_NMI: |
68 | case DIE_NMI_IPI: | ||
69 | if (ctr_running) | 68 | if (ctr_running) |
70 | model->check_ctrs(args->regs, &__get_cpu_var(cpu_msrs)); | 69 | model->check_ctrs(args->regs, &__get_cpu_var(cpu_msrs)); |
71 | else if (!nmi_enabled) | 70 | else if (!nmi_enabled) |
@@ -361,7 +360,7 @@ static void nmi_cpu_setup(void *dummy) | |||
361 | static struct notifier_block profile_exceptions_nb = { | 360 | static struct notifier_block profile_exceptions_nb = { |
362 | .notifier_call = profile_exceptions_notify, | 361 | .notifier_call = profile_exceptions_notify, |
363 | .next = NULL, | 362 | .next = NULL, |
364 | .priority = 2 | 363 | .priority = NMI_LOCAL_LOW_PRIOR, |
365 | }; | 364 | }; |
366 | 365 | ||
367 | static void nmi_cpu_restore_registers(struct op_msrs *msrs) | 366 | static void nmi_cpu_restore_registers(struct op_msrs *msrs) |
diff --git a/arch/x86/oprofile/nmi_timer_int.c b/arch/x86/oprofile/nmi_timer_int.c index 0636dd93cef8..720bf5a53c51 100644 --- a/arch/x86/oprofile/nmi_timer_int.c +++ b/arch/x86/oprofile/nmi_timer_int.c | |||
@@ -38,7 +38,7 @@ static int profile_timer_exceptions_notify(struct notifier_block *self, | |||
38 | static struct notifier_block profile_timer_exceptions_nb = { | 38 | static struct notifier_block profile_timer_exceptions_nb = { |
39 | .notifier_call = profile_timer_exceptions_notify, | 39 | .notifier_call = profile_timer_exceptions_notify, |
40 | .next = NULL, | 40 | .next = NULL, |
41 | .priority = 0 | 41 | .priority = NMI_LOW_PRIOR, |
42 | }; | 42 | }; |
43 | 43 | ||
44 | static int timer_start(void) | 44 | static int timer_start(void) |