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authorH. Peter Anvin <hpa@linux.intel.com>2010-07-19 21:32:04 -0400
committerH. Peter Anvin <hpa@linux.intel.com>2010-07-19 22:02:41 -0400
commit2decb194e65ab66eaf787512dc572cdc99893b24 (patch)
tree80e1df44c19b28487bfc663300ca58236505bc70 /arch/x86
parent278bc5f6abd69dd868746dbd642266ac09a9c9c6 (diff)
x86, cpu: Split addon_cpuid_features.c
addon_cpuid_features.c contains exactly two almost completely unrelated functions, plus has a long and very generic name. Split it into two files, scattered.c for the scattered feature flags, and topology.c for the topology information. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> LKML-Reference: <tip-*@git.kernel.org>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/kernel/cpu/Makefile2
-rw-r--r--arch/x86/kernel/cpu/scattered.c61
-rw-r--r--arch/x86/kernel/cpu/topology.c (renamed from arch/x86/kernel/cpu/addon_cpuid_features.c)61
3 files changed, 67 insertions, 57 deletions
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 3a785da34b6f..5e3a3512ba05 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -12,7 +12,7 @@ endif
12nostackp := $(call cc-option, -fno-stack-protector) 12nostackp := $(call cc-option, -fno-stack-protector)
13CFLAGS_common.o := $(nostackp) 13CFLAGS_common.o := $(nostackp)
14 14
15obj-y := intel_cacheinfo.o addon_cpuid_features.o 15obj-y := intel_cacheinfo.o scattered.o topology.o
16obj-y += proc.o capflags.o powerflags.o common.o 16obj-y += proc.o capflags.o powerflags.o common.o
17obj-y += vmware.o hypervisor.o sched.o mshyperv.o 17obj-y += vmware.o hypervisor.o sched.o mshyperv.o
18 18
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
new file mode 100644
index 000000000000..9815364b477e
--- /dev/null
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -0,0 +1,61 @@
1/*
2 * Routines to indentify additional cpu features that are scattered in
3 * cpuid space.
4 */
5#include <linux/cpu.h>
6
7#include <asm/pat.h>
8#include <asm/processor.h>
9
10#include <asm/apic.h>
11
12struct cpuid_bit {
13 u16 feature;
14 u8 reg;
15 u8 bit;
16 u32 level;
17 u32 sub_leaf;
18};
19
20enum cpuid_regs {
21 CR_EAX = 0,
22 CR_ECX,
23 CR_EDX,
24 CR_EBX
25};
26
27void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
28{
29 u32 max_level;
30 u32 regs[4];
31 const struct cpuid_bit *cb;
32
33 static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
34 { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006, 0 },
35 { X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006, 0 },
36 { X86_FEATURE_APERFMPERF, CR_ECX, 0, 0x00000006, 0 },
37 { X86_FEATURE_EPB, CR_ECX, 3, 0x00000006, 0 },
38 { X86_FEATURE_XSAVEOPT, CR_EAX, 0, 0x0000000d, 1 },
39 { X86_FEATURE_CPB, CR_EDX, 9, 0x80000007, 0 },
40 { X86_FEATURE_NPT, CR_EDX, 0, 0x8000000a, 0 },
41 { X86_FEATURE_LBRV, CR_EDX, 1, 0x8000000a, 0 },
42 { X86_FEATURE_SVML, CR_EDX, 2, 0x8000000a, 0 },
43 { X86_FEATURE_NRIPS, CR_EDX, 3, 0x8000000a, 0 },
44 { 0, 0, 0, 0, 0 }
45 };
46
47 for (cb = cpuid_bits; cb->feature; cb++) {
48
49 /* Verify that the level is valid */
50 max_level = cpuid_eax(cb->level & 0xffff0000);
51 if (max_level < cb->level ||
52 max_level > (cb->level | 0xffff))
53 continue;
54
55 cpuid_count(cb->level, cb->sub_leaf, &regs[CR_EAX],
56 &regs[CR_EBX], &regs[CR_ECX], &regs[CR_EDX]);
57
58 if (regs[cb->reg] & (1 << cb->bit))
59 set_cpu_cap(c, cb->feature);
60 }
61}
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/topology.c
index 41eebcd90fce..4397e987a1cf 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/topology.c
@@ -1,65 +1,14 @@
1/* 1/*
2 * Routines to indentify additional cpu features that are scattered in 2 * Check for extended topology enumeration cpuid leaf 0xb and if it
3 * cpuid space. 3 * exists, use it for populating initial_apicid and cpu topology
4 * detection.
4 */ 5 */
5#include <linux/cpu.h>
6 6
7#include <linux/cpu.h>
8#include <asm/apic.h>
7#include <asm/pat.h> 9#include <asm/pat.h>
8#include <asm/processor.h> 10#include <asm/processor.h>
9 11
10#include <asm/apic.h>
11
12struct cpuid_bit {
13 u16 feature;
14 u8 reg;
15 u8 bit;
16 u32 level;
17 u32 sub_leaf;
18};
19
20enum cpuid_regs {
21 CR_EAX = 0,
22 CR_ECX,
23 CR_EDX,
24 CR_EBX
25};
26
27void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
28{
29 u32 max_level;
30 u32 regs[4];
31 const struct cpuid_bit *cb;
32
33 static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
34 { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006, 0 },
35 { X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006, 0 },
36 { X86_FEATURE_APERFMPERF, CR_ECX, 0, 0x00000006, 0 },
37 { X86_FEATURE_EPB, CR_ECX, 3, 0x00000006, 0 },
38 { X86_FEATURE_XSAVEOPT, CR_EAX, 0, 0x0000000d, 1 },
39 { X86_FEATURE_CPB, CR_EDX, 9, 0x80000007, 0 },
40 { X86_FEATURE_NPT, CR_EDX, 0, 0x8000000a, 0 },
41 { X86_FEATURE_LBRV, CR_EDX, 1, 0x8000000a, 0 },
42 { X86_FEATURE_SVML, CR_EDX, 2, 0x8000000a, 0 },
43 { X86_FEATURE_NRIPS, CR_EDX, 3, 0x8000000a, 0 },
44 { 0, 0, 0, 0, 0 }
45 };
46
47 for (cb = cpuid_bits; cb->feature; cb++) {
48
49 /* Verify that the level is valid */
50 max_level = cpuid_eax(cb->level & 0xffff0000);
51 if (max_level < cb->level ||
52 max_level > (cb->level | 0xffff))
53 continue;
54
55 cpuid_count(cb->level, cb->sub_leaf, &regs[CR_EAX],
56 &regs[CR_EBX], &regs[CR_ECX], &regs[CR_EDX]);
57
58 if (regs[cb->reg] & (1 << cb->bit))
59 set_cpu_cap(c, cb->feature);
60 }
61}
62
63/* leaf 0xb SMT level */ 12/* leaf 0xb SMT level */
64#define SMT_LEVEL 0 13#define SMT_LEVEL 0
65 14