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authorYinghai Lu <yhlu.kernel@gmail.com>2008-08-25 03:56:08 -0400
committerIngo Molnar <mingo@elte.hu>2008-08-25 04:02:03 -0400
commita2bd7274b47124d2fc4dfdb8c0591f545ba749dd (patch)
tree06be7ab89e371f6fe803075bdcc2f0902cba105a /arch/x86
parent060700b571717c997a2ea5e2049b848fa248ee13 (diff)
x86: fix HPET regression in 2.6.26 versus 2.6.25, check hpet against BAR, v3
David Witbrodt tracked down (and bisected) a hpet bootup hang on his system to the following problem: a BIOS bug made the hpet device visible as a generic PCI device. If e820 reserved entries happen to be registered first in the resource tree [which v2.6.26 started doing], then the PCI code will reallocate that device's BAR to some other address - breaking timer IRQs and hanging the system. ( Normally hpet devices are hidden by the BIOS from the OS's PCI discovery via chipset magic. Sometimes the hpet is not a PCI device at all. ) Solve this fundamental fragility by making non-PCI platform drivers insert resources into the resource tree even if it overlaps the e820 reserved entry, to keep the resource manager from updating the BAR. Also do these checks for the ioapic and mmconfig addresses, and emit a warning if this happens. Bisected-by: David Witbrodt <dawitbro@sbcglobal.net> Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Tested-by: David Witbrodt <dawitbro@sbcglobal.net> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/pci/i386.c78
1 files changed, 78 insertions, 0 deletions
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 5807d1bc73f7..d765da913842 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -31,8 +31,11 @@
31#include <linux/ioport.h> 31#include <linux/ioport.h>
32#include <linux/errno.h> 32#include <linux/errno.h>
33#include <linux/bootmem.h> 33#include <linux/bootmem.h>
34#include <linux/acpi.h>
34 35
35#include <asm/pat.h> 36#include <asm/pat.h>
37#include <asm/hpet.h>
38#include <asm/io_apic.h>
36 39
37#include "pci.h" 40#include "pci.h"
38 41
@@ -77,6 +80,77 @@ pcibios_align_resource(void *data, struct resource *res,
77} 80}
78EXPORT_SYMBOL(pcibios_align_resource); 81EXPORT_SYMBOL(pcibios_align_resource);
79 82
83static int check_res_with_valid(struct pci_dev *dev, struct resource *res)
84{
85 unsigned long base;
86 unsigned long size;
87 int i;
88
89 base = res->start;
90 size = (res->start == 0 && res->end == res->start) ? 0 :
91 (res->end - res->start + 1);
92
93 if (!base || !size)
94 return 0;
95
96#ifdef CONFIG_HPET_TIMER
97 /* for hpet */
98 if (base == hpet_address && (res->flags & IORESOURCE_MEM)) {
99 dev_info(&dev->dev, "BAR has HPET at %08lx-%08lx\n",
100 base, base + size - 1);
101 return 1;
102 }
103#endif
104
105#ifdef CONFIG_X86_IO_APIC
106 for (i = 0; i < nr_ioapics; i++) {
107 unsigned long ioapic_phys = mp_ioapics[i].mp_apicaddr;
108
109 if (base == ioapic_phys && (res->flags & IORESOURCE_MEM)) {
110 dev_info(&dev->dev, "BAR has ioapic at %08lx-%08lx\n",
111 base, base + size - 1);
112 return 1;
113 }
114 }
115#endif
116
117#ifdef CONFIG_PCI_MMCONFIG
118 for (i = 0; i < pci_mmcfg_config_num; i++) {
119 unsigned long addr;
120
121 addr = pci_mmcfg_config[i].address;
122 if (base == addr && (res->flags & IORESOURCE_MEM)) {
123 dev_info(&dev->dev, "BAR has MMCONFIG at %08lx-%08lx\n",
124 base, base + size - 1);
125 return 1;
126 }
127 }
128#endif
129
130 return 0;
131}
132
133static int check_platform(struct pci_dev *dev, struct resource *res)
134{
135 struct resource *root = NULL;
136
137 /*
138 * forcibly insert it into the
139 * resource tree
140 */
141 if (res->flags & IORESOURCE_MEM)
142 root = &iomem_resource;
143 else if (res->flags & IORESOURCE_IO)
144 root = &ioport_resource;
145
146 if (root && check_res_with_valid(dev, res)) {
147 insert_resource(root, res);
148
149 return 1;
150 }
151
152 return 0;
153}
80/* 154/*
81 * Handle resources of PCI devices. If the world were perfect, we could 155 * Handle resources of PCI devices. If the world were perfect, we could
82 * just allocate all the resource regions and do nothing more. It isn't. 156 * just allocate all the resource regions and do nothing more. It isn't.
@@ -128,6 +202,8 @@ static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
128 pr = pci_find_parent_resource(dev, r); 202 pr = pci_find_parent_resource(dev, r);
129 if (!r->start || !pr || 203 if (!r->start || !pr ||
130 request_resource(pr, r) < 0) { 204 request_resource(pr, r) < 0) {
205 if (check_platform(dev, r))
206 continue;
131 dev_err(&dev->dev, "BAR %d: can't " 207 dev_err(&dev->dev, "BAR %d: can't "
132 "allocate resource\n", idx); 208 "allocate resource\n", idx);
133 /* 209 /*
@@ -171,6 +247,8 @@ static void __init pcibios_allocate_resources(int pass)
171 r->flags, disabled, pass); 247 r->flags, disabled, pass);
172 pr = pci_find_parent_resource(dev, r); 248 pr = pci_find_parent_resource(dev, r);
173 if (!pr || request_resource(pr, r) < 0) { 249 if (!pr || request_resource(pr, r) < 0) {
250 if (check_platform(dev, r))
251 continue;
174 dev_err(&dev->dev, "BAR %d: can't " 252 dev_err(&dev->dev, "BAR %d: can't "
175 "allocate resource\n", idx); 253 "allocate resource\n", idx);
176 /* We'll assign a new address later */ 254 /* We'll assign a new address later */