aboutsummaryrefslogtreecommitdiffstats
path: root/arch/x86
diff options
context:
space:
mode:
authorH. Peter Anvin <hpa@zytor.com>2010-07-28 02:28:28 -0400
committerH. Peter Anvin <hpa@zytor.com>2010-07-28 02:28:28 -0400
commitd3608b5681d238605b7da6be62244e803e24c649 (patch)
tree1fc47e9f58e6e938eefd40904745a60986739bde /arch/x86
parent650fb4393dff543bc980d361555c489fbdeed088 (diff)
parent113fc5a6e8c2288619ff7e8187a6f556b7e0d372 (diff)
Merge remote branch 'origin/x86/urgent' into x86/asm
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/include/asm/cmpxchg_32.h68
-rw-r--r--arch/x86/include/asm/cmpxchg_64.h40
-rw-r--r--arch/x86/kernel/acpi/cstate.c9
-rw-r--r--arch/x86/kernel/acpi/sleep.c9
-rw-r--r--arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c41
-rw-r--r--arch/x86/kernel/cpu/cpufreq/powernow-k8.c11
-rw-r--r--arch/x86/kernel/entry_64.S4
-rw-r--r--arch/x86/kernel/hpet.c2
-rw-r--r--arch/x86/kernel/i8259.c25
-rw-r--r--arch/x86/kvm/paging_tmpl.h1
-rw-r--r--arch/x86/kvm/x86.c4
11 files changed, 116 insertions, 98 deletions
diff --git a/arch/x86/include/asm/cmpxchg_32.h b/arch/x86/include/asm/cmpxchg_32.h
index 8859e12dd3cf..c1cf59d72f09 100644
--- a/arch/x86/include/asm/cmpxchg_32.h
+++ b/arch/x86/include/asm/cmpxchg_32.h
@@ -27,20 +27,20 @@ struct __xchg_dummy {
27 switch (size) { \ 27 switch (size) { \
28 case 1: \ 28 case 1: \
29 asm volatile("xchgb %b0,%1" \ 29 asm volatile("xchgb %b0,%1" \
30 : "=q" (__x) \ 30 : "=q" (__x), "+m" (*__xg(ptr)) \
31 : "m" (*__xg(ptr)), "0" (__x) \ 31 : "0" (__x) \
32 : "memory"); \ 32 : "memory"); \
33 break; \ 33 break; \
34 case 2: \ 34 case 2: \
35 asm volatile("xchgw %w0,%1" \ 35 asm volatile("xchgw %w0,%1" \
36 : "=r" (__x) \ 36 : "=r" (__x), "+m" (*__xg(ptr)) \
37 : "m" (*__xg(ptr)), "0" (__x) \ 37 : "0" (__x) \
38 : "memory"); \ 38 : "memory"); \
39 break; \ 39 break; \
40 case 4: \ 40 case 4: \
41 asm volatile("xchgl %0,%1" \ 41 asm volatile("xchgl %0,%1" \
42 : "=r" (__x) \ 42 : "=r" (__x), "+m" (*__xg(ptr)) \
43 : "m" (*__xg(ptr)), "0" (__x) \ 43 : "0" (__x) \
44 : "memory"); \ 44 : "memory"); \
45 break; \ 45 break; \
46 default: \ 46 default: \
@@ -70,14 +70,14 @@ static inline void __set_64bit(unsigned long long *ptr,
70 unsigned int low, unsigned int high) 70 unsigned int low, unsigned int high)
71{ 71{
72 asm volatile("\n1:\t" 72 asm volatile("\n1:\t"
73 "movl (%0), %%eax\n\t" 73 "movl (%1), %%eax\n\t"
74 "movl 4(%0), %%edx\n\t" 74 "movl 4(%1), %%edx\n\t"
75 LOCK_PREFIX "cmpxchg8b (%0)\n\t" 75 LOCK_PREFIX "cmpxchg8b (%1)\n\t"
76 "jnz 1b" 76 "jnz 1b"
77 : /* no outputs */ 77 : "=m" (*ptr)
78 : "D"(ptr), 78 : "D" (ptr),
79 "b"(low), 79 "b" (low),
80 "c"(high) 80 "c" (high)
81 : "ax", "dx", "memory"); 81 : "ax", "dx", "memory");
82} 82}
83 83
@@ -121,21 +121,21 @@ extern void __cmpxchg_wrong_size(void);
121 __typeof__(*(ptr)) __new = (new); \ 121 __typeof__(*(ptr)) __new = (new); \
122 switch (size) { \ 122 switch (size) { \
123 case 1: \ 123 case 1: \
124 asm volatile(lock "cmpxchgb %b1,%2" \ 124 asm volatile(lock "cmpxchgb %b2,%1" \
125 : "=a"(__ret) \ 125 : "=a" (__ret), "+m" (*__xg(ptr)) \
126 : "q"(__new), "m"(*__xg(ptr)), "0"(__old) \ 126 : "q" (__new), "0" (__old) \
127 : "memory"); \ 127 : "memory"); \
128 break; \ 128 break; \
129 case 2: \ 129 case 2: \
130 asm volatile(lock "cmpxchgw %w1,%2" \ 130 asm volatile(lock "cmpxchgw %w2,%1" \
131 : "=a"(__ret) \ 131 : "=a" (__ret), "+m" (*__xg(ptr)) \
132 : "r"(__new), "m"(*__xg(ptr)), "0"(__old) \ 132 : "r" (__new), "0" (__old) \
133 : "memory"); \ 133 : "memory"); \
134 break; \ 134 break; \
135 case 4: \ 135 case 4: \
136 asm volatile(lock "cmpxchgl %1,%2" \ 136 asm volatile(lock "cmpxchgl %2,%1" \
137 : "=a"(__ret) \ 137 : "=a" (__ret), "+m" (*__xg(ptr)) \
138 : "r"(__new), "m"(*__xg(ptr)), "0"(__old) \ 138 : "r" (__new), "0" (__old) \
139 : "memory"); \ 139 : "memory"); \
140 break; \ 140 break; \
141 default: \ 141 default: \
@@ -180,12 +180,12 @@ static inline unsigned long long __cmpxchg64(volatile void *ptr,
180 unsigned long long new) 180 unsigned long long new)
181{ 181{
182 unsigned long long prev; 182 unsigned long long prev;
183 asm volatile(LOCK_PREFIX "cmpxchg8b %3" 183 asm volatile(LOCK_PREFIX "cmpxchg8b %1"
184 : "=A"(prev) 184 : "=A" (prev),
185 : "b"((unsigned long)new), 185 "+m" (*__xg(ptr))
186 "c"((unsigned long)(new >> 32)), 186 : "b" ((unsigned long)new),
187 "m"(*__xg(ptr)), 187 "c" ((unsigned long)(new >> 32)),
188 "0"(old) 188 "0" (old)
189 : "memory"); 189 : "memory");
190 return prev; 190 return prev;
191} 191}
@@ -195,12 +195,12 @@ static inline unsigned long long __cmpxchg64_local(volatile void *ptr,
195 unsigned long long new) 195 unsigned long long new)
196{ 196{
197 unsigned long long prev; 197 unsigned long long prev;
198 asm volatile("cmpxchg8b %3" 198 asm volatile("cmpxchg8b %1"
199 : "=A"(prev) 199 : "=A" (prev),
200 : "b"((unsigned long)new), 200 "+m" (*__xg(ptr))
201 "c"((unsigned long)(new >> 32)), 201 : "b" ((unsigned long)new),
202 "m"(*__xg(ptr)), 202 "c" ((unsigned long)(new >> 32)),
203 "0"(old) 203 "0" (old)
204 : "memory"); 204 : "memory");
205 return prev; 205 return prev;
206} 206}
diff --git a/arch/x86/include/asm/cmpxchg_64.h b/arch/x86/include/asm/cmpxchg_64.h
index 485ae415faec..b92f147339f3 100644
--- a/arch/x86/include/asm/cmpxchg_64.h
+++ b/arch/x86/include/asm/cmpxchg_64.h
@@ -26,26 +26,26 @@ extern void __cmpxchg_wrong_size(void);
26 switch (size) { \ 26 switch (size) { \
27 case 1: \ 27 case 1: \
28 asm volatile("xchgb %b0,%1" \ 28 asm volatile("xchgb %b0,%1" \
29 : "=q" (__x) \ 29 : "=q" (__x), "+m" (*__xg(ptr)) \
30 : "m" (*__xg(ptr)), "0" (__x) \ 30 : "0" (__x) \
31 : "memory"); \ 31 : "memory"); \
32 break; \ 32 break; \
33 case 2: \ 33 case 2: \
34 asm volatile("xchgw %w0,%1" \ 34 asm volatile("xchgw %w0,%1" \
35 : "=r" (__x) \ 35 : "=r" (__x), "+m" (*__xg(ptr)) \
36 : "m" (*__xg(ptr)), "0" (__x) \ 36 : "0" (__x) \
37 : "memory"); \ 37 : "memory"); \
38 break; \ 38 break; \
39 case 4: \ 39 case 4: \
40 asm volatile("xchgl %k0,%1" \ 40 asm volatile("xchgl %k0,%1" \
41 : "=r" (__x) \ 41 : "=r" (__x), "+m" (*__xg(ptr)) \
42 : "m" (*__xg(ptr)), "0" (__x) \ 42 : "0" (__x) \
43 : "memory"); \ 43 : "memory"); \
44 break; \ 44 break; \
45 case 8: \ 45 case 8: \
46 asm volatile("xchgq %0,%1" \ 46 asm volatile("xchgq %0,%1" \
47 : "=r" (__x) \ 47 : "=r" (__x), "+m" (*__xg(ptr)) \
48 : "m" (*__xg(ptr)), "0" (__x) \ 48 : "0" (__x) \
49 : "memory"); \ 49 : "memory"); \
50 break; \ 50 break; \
51 default: \ 51 default: \
@@ -71,27 +71,27 @@ extern void __cmpxchg_wrong_size(void);
71 __typeof__(*(ptr)) __new = (new); \ 71 __typeof__(*(ptr)) __new = (new); \
72 switch (size) { \ 72 switch (size) { \
73 case 1: \ 73 case 1: \
74 asm volatile(lock "cmpxchgb %b1,%2" \ 74 asm volatile(lock "cmpxchgb %b2,%1" \
75 : "=a"(__ret) \ 75 : "=a" (__ret), "+m" (*__xg(ptr)) \
76 : "q"(__new), "m"(*__xg(ptr)), "0"(__old) \ 76 : "q" (__new), "0" (__old) \
77 : "memory"); \ 77 : "memory"); \
78 break; \ 78 break; \
79 case 2: \ 79 case 2: \
80 asm volatile(lock "cmpxchgw %w1,%2" \ 80 asm volatile(lock "cmpxchgw %w2,%1" \
81 : "=a"(__ret) \ 81 : "=a" (__ret), "+m" (*__xg(ptr)) \
82 : "r"(__new), "m"(*__xg(ptr)), "0"(__old) \ 82 : "r" (__new), "0" (__old) \
83 : "memory"); \ 83 : "memory"); \
84 break; \ 84 break; \
85 case 4: \ 85 case 4: \
86 asm volatile(lock "cmpxchgl %k1,%2" \ 86 asm volatile(lock "cmpxchgl %k2,%1" \
87 : "=a"(__ret) \ 87 : "=a" (__ret), "+m" (*__xg(ptr)) \
88 : "r"(__new), "m"(*__xg(ptr)), "0"(__old) \ 88 : "r" (__new), "0" (__old) \
89 : "memory"); \ 89 : "memory"); \
90 break; \ 90 break; \
91 case 8: \ 91 case 8: \
92 asm volatile(lock "cmpxchgq %1,%2" \ 92 asm volatile(lock "cmpxchgq %2,%1" \
93 : "=a"(__ret) \ 93 : "=a" (__ret), "+m" (*__xg(ptr)) \
94 : "r"(__new), "m"(*__xg(ptr)), "0"(__old) \ 94 : "r" (__new), "0" (__old) \
95 : "memory"); \ 95 : "memory"); \
96 break; \ 96 break; \
97 default: \ 97 default: \
diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c
index 2e837f5080fe..fb7a5f052e2b 100644
--- a/arch/x86/kernel/acpi/cstate.c
+++ b/arch/x86/kernel/acpi/cstate.c
@@ -145,6 +145,15 @@ int acpi_processor_ffh_cstate_probe(unsigned int cpu,
145 percpu_entry->states[cx->index].eax = cx->address; 145 percpu_entry->states[cx->index].eax = cx->address;
146 percpu_entry->states[cx->index].ecx = MWAIT_ECX_INTERRUPT_BREAK; 146 percpu_entry->states[cx->index].ecx = MWAIT_ECX_INTERRUPT_BREAK;
147 } 147 }
148
149 /*
150 * For _CST FFH on Intel, if GAS.access_size bit 1 is cleared,
151 * then we should skip checking BM_STS for this C-state.
152 * ref: "Intel Processor Vendor-Specific ACPI Interface Specification"
153 */
154 if ((c->x86_vendor == X86_VENDOR_INTEL) && !(reg->access_size & 0x2))
155 cx->bm_sts_skip = 1;
156
148 return retval; 157 return retval;
149} 158}
150EXPORT_SYMBOL_GPL(acpi_processor_ffh_cstate_probe); 159EXPORT_SYMBOL_GPL(acpi_processor_ffh_cstate_probe);
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 82e508677b91..fcc3c61fdecc 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -157,9 +157,14 @@ static int __init acpi_sleep_setup(char *str)
157#ifdef CONFIG_HIBERNATION 157#ifdef CONFIG_HIBERNATION
158 if (strncmp(str, "s4_nohwsig", 10) == 0) 158 if (strncmp(str, "s4_nohwsig", 10) == 0)
159 acpi_no_s4_hw_signature(); 159 acpi_no_s4_hw_signature();
160 if (strncmp(str, "s4_nonvs", 8) == 0) 160 if (strncmp(str, "s4_nonvs", 8) == 0) {
161 acpi_s4_no_nvs(); 161 pr_warning("ACPI: acpi_sleep=s4_nonvs is deprecated, "
162 "please use acpi_sleep=nonvs instead");
163 acpi_nvs_nosave();
164 }
162#endif 165#endif
166 if (strncmp(str, "nonvs", 5) == 0)
167 acpi_nvs_nosave();
163 if (strncmp(str, "old_ordering", 12) == 0) 168 if (strncmp(str, "old_ordering", 12) == 0)
164 acpi_old_suspend_ordering(); 169 acpi_old_suspend_ordering();
165 str = strchr(str, ','); 170 str = strchr(str, ',');
diff --git a/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
index ce7cde713e71..a36de5bbb622 100644
--- a/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
@@ -368,22 +368,16 @@ static int __init pcc_cpufreq_do_osc(acpi_handle *handle)
368 return -ENODEV; 368 return -ENODEV;
369 369
370 out_obj = output.pointer; 370 out_obj = output.pointer;
371 if (out_obj->type != ACPI_TYPE_BUFFER) { 371 if (out_obj->type != ACPI_TYPE_BUFFER)
372 ret = -ENODEV; 372 return -ENODEV;
373 goto out_free;
374 }
375 373
376 errors = *((u32 *)out_obj->buffer.pointer) & ~(1 << 0); 374 errors = *((u32 *)out_obj->buffer.pointer) & ~(1 << 0);
377 if (errors) { 375 if (errors)
378 ret = -ENODEV; 376 return -ENODEV;
379 goto out_free;
380 }
381 377
382 supported = *((u32 *)(out_obj->buffer.pointer + 4)); 378 supported = *((u32 *)(out_obj->buffer.pointer + 4));
383 if (!(supported & 0x1)) { 379 if (!(supported & 0x1))
384 ret = -ENODEV; 380 return -ENODEV;
385 goto out_free;
386 }
387 381
388out_free: 382out_free:
389 kfree(output.pointer); 383 kfree(output.pointer);
@@ -397,13 +391,17 @@ static int __init pcc_cpufreq_probe(void)
397 struct pcc_memory_resource *mem_resource; 391 struct pcc_memory_resource *mem_resource;
398 struct pcc_register_resource *reg_resource; 392 struct pcc_register_resource *reg_resource;
399 union acpi_object *out_obj, *member; 393 union acpi_object *out_obj, *member;
400 acpi_handle handle, osc_handle; 394 acpi_handle handle, osc_handle, pcch_handle;
401 int ret = 0; 395 int ret = 0;
402 396
403 status = acpi_get_handle(NULL, "\\_SB", &handle); 397 status = acpi_get_handle(NULL, "\\_SB", &handle);
404 if (ACPI_FAILURE(status)) 398 if (ACPI_FAILURE(status))
405 return -ENODEV; 399 return -ENODEV;
406 400
401 status = acpi_get_handle(handle, "PCCH", &pcch_handle);
402 if (ACPI_FAILURE(status))
403 return -ENODEV;
404
407 status = acpi_get_handle(handle, "_OSC", &osc_handle); 405 status = acpi_get_handle(handle, "_OSC", &osc_handle);
408 if (ACPI_SUCCESS(status)) { 406 if (ACPI_SUCCESS(status)) {
409 ret = pcc_cpufreq_do_osc(&osc_handle); 407 ret = pcc_cpufreq_do_osc(&osc_handle);
@@ -543,13 +541,13 @@ static int pcc_cpufreq_cpu_init(struct cpufreq_policy *policy)
543 541
544 if (!pcch_virt_addr) { 542 if (!pcch_virt_addr) {
545 result = -1; 543 result = -1;
546 goto pcch_null; 544 goto out;
547 } 545 }
548 546
549 result = pcc_get_offset(cpu); 547 result = pcc_get_offset(cpu);
550 if (result) { 548 if (result) {
551 dprintk("init: PCCP evaluation failed\n"); 549 dprintk("init: PCCP evaluation failed\n");
552 goto free; 550 goto out;
553 } 551 }
554 552
555 policy->max = policy->cpuinfo.max_freq = 553 policy->max = policy->cpuinfo.max_freq =
@@ -558,14 +556,15 @@ static int pcc_cpufreq_cpu_init(struct cpufreq_policy *policy)
558 ioread32(&pcch_hdr->minimum_frequency) * 1000; 556 ioread32(&pcch_hdr->minimum_frequency) * 1000;
559 policy->cur = pcc_get_freq(cpu); 557 policy->cur = pcc_get_freq(cpu);
560 558
559 if (!policy->cur) {
560 dprintk("init: Unable to get current CPU frequency\n");
561 result = -EINVAL;
562 goto out;
563 }
564
561 dprintk("init: policy->max is %d, policy->min is %d\n", 565 dprintk("init: policy->max is %d, policy->min is %d\n",
562 policy->max, policy->min); 566 policy->max, policy->min);
563 567out:
564 return 0;
565free:
566 pcc_clear_mapping();
567 free_percpu(pcc_cpu_info);
568pcch_null:
569 return result; 568 return result;
570} 569}
571 570
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
index 7ec2123838e6..3e90cce3dc8b 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
@@ -1023,13 +1023,12 @@ static int get_transition_latency(struct powernow_k8_data *data)
1023 } 1023 }
1024 if (max_latency == 0) { 1024 if (max_latency == 0) {
1025 /* 1025 /*
1026 * Fam 11h always returns 0 as transition latency. 1026 * Fam 11h and later may return 0 as transition latency. This
1027 * This is intended and means "very fast". While cpufreq core 1027 * is intended and means "very fast". While cpufreq core and
1028 * and governors currently can handle that gracefully, better 1028 * governors currently can handle that gracefully, better set it
1029 * set it to 1 to avoid problems in the future. 1029 * to 1 to avoid problems in the future.
1030 * For all others it's a BIOS bug.
1031 */ 1030 */
1032 if (boot_cpu_data.x86 != 0x11) 1031 if (boot_cpu_data.x86 < 0x11)
1033 printk(KERN_ERR FW_WARN PFX "Invalid zero transition " 1032 printk(KERN_ERR FW_WARN PFX "Invalid zero transition "
1034 "latency\n"); 1033 "latency\n");
1035 max_latency = 1; 1034 max_latency = 1;
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index 0697ff139837..4db7c4d12ffa 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -571,8 +571,8 @@ auditsys:
571 * masked off. 571 * masked off.
572 */ 572 */
573sysret_audit: 573sysret_audit:
574 movq %rax,%rsi /* second arg, syscall return value */ 574 movq RAX-ARGOFFSET(%rsp),%rsi /* second arg, syscall return value */
575 cmpq $0,%rax /* is it < 0? */ 575 cmpq $0,%rsi /* is it < 0? */
576 setl %al /* 1 if so, 0 if not */ 576 setl %al /* 1 if so, 0 if not */
577 movzbl %al,%edi /* zero-extend that into %edi */ 577 movzbl %al,%edi /* zero-extend that into %edi */
578 inc %edi /* first arg, 0->1(AUDITSC_SUCCESS), 1->2(AUDITSC_FAILURE) */ 578 inc %edi /* first arg, 0->1(AUDITSC_SUCCESS), 1->2(AUDITSC_FAILURE) */
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index a198b7c87a12..ba390d731175 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -964,7 +964,7 @@ fs_initcall(hpet_late_init);
964 964
965void hpet_disable(void) 965void hpet_disable(void)
966{ 966{
967 if (is_hpet_capable()) { 967 if (is_hpet_capable() && hpet_virt_address) {
968 unsigned int cfg = hpet_readl(HPET_CFG); 968 unsigned int cfg = hpet_readl(HPET_CFG);
969 969
970 if (hpet_legacy_int_enabled) { 970 if (hpet_legacy_int_enabled) {
diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c
index 7c9f02c130f3..cafa7c80ac95 100644
--- a/arch/x86/kernel/i8259.c
+++ b/arch/x86/kernel/i8259.c
@@ -276,16 +276,6 @@ static struct sys_device device_i8259A = {
276 .cls = &i8259_sysdev_class, 276 .cls = &i8259_sysdev_class,
277}; 277};
278 278
279static int __init i8259A_init_sysfs(void)
280{
281 int error = sysdev_class_register(&i8259_sysdev_class);
282 if (!error)
283 error = sysdev_register(&device_i8259A);
284 return error;
285}
286
287device_initcall(i8259A_init_sysfs);
288
289static void mask_8259A(void) 279static void mask_8259A(void)
290{ 280{
291 unsigned long flags; 281 unsigned long flags;
@@ -407,3 +397,18 @@ struct legacy_pic default_legacy_pic = {
407}; 397};
408 398
409struct legacy_pic *legacy_pic = &default_legacy_pic; 399struct legacy_pic *legacy_pic = &default_legacy_pic;
400
401static int __init i8259A_init_sysfs(void)
402{
403 int error;
404
405 if (legacy_pic != &default_legacy_pic)
406 return 0;
407
408 error = sysdev_class_register(&i8259_sysdev_class);
409 if (!error)
410 error = sysdev_register(&device_i8259A);
411 return error;
412}
413
414device_initcall(i8259A_init_sysfs);
diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h
index 89d66ca4d87c..2331bdc2b549 100644
--- a/arch/x86/kvm/paging_tmpl.h
+++ b/arch/x86/kvm/paging_tmpl.h
@@ -342,6 +342,7 @@ static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
342 /* advance table_gfn when emulating 1gb pages with 4k */ 342 /* advance table_gfn when emulating 1gb pages with 4k */
343 if (delta == 0) 343 if (delta == 0)
344 table_gfn += PT_INDEX(addr, level); 344 table_gfn += PT_INDEX(addr, level);
345 access &= gw->pte_access;
345 } else { 346 } else {
346 direct = 0; 347 direct = 0;
347 table_gfn = gw->table_gfn[level - 2]; 348 table_gfn = gw->table_gfn[level - 2];
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 6127468ebbd2..33f0a84cfd93 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1562,7 +1562,7 @@ static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1562 1562
1563 r = -ENOMEM; 1563 r = -ENOMEM;
1564 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs; 1564 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1565 entries = vmalloc(size); 1565 entries = kmalloc(size, GFP_KERNEL);
1566 if (!entries) 1566 if (!entries)
1567 goto out; 1567 goto out;
1568 1568
@@ -1581,7 +1581,7 @@ static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1581 r = n; 1581 r = n;
1582 1582
1583out_free: 1583out_free:
1584 vfree(entries); 1584 kfree(entries);
1585out: 1585out:
1586 return r; 1586 return r;
1587} 1587}