diff options
author | Sergio Luis <sergio@larces.uece.br> | 2009-04-27 18:27:22 -0400 |
---|---|---|
committer | Rafael J. Wysocki <rjw@sisk.pl> | 2009-06-12 15:32:31 -0400 |
commit | 08687aec71bc9134fe336e561f6877bacf74fc0a (patch) | |
tree | e9fb4942f9b17b218d9093f5041805e597be6b6c /arch/x86/power | |
parent | 6d48becd33a7921694ba1955ba91604d648020f1 (diff) |
x86: unify power/cpu_(32|64).c
This is the last unification step. Here we do remove one of the files
and rename the left one as cpu.c, as both are now the same.
Also update power/Makefile, telling it to build cpu.o, instead of
cpu_(32|64).o
Signed-off-by: Sergio Luis <sergio@larces.uece.br>
Signed-off-by: Lauro Salmito <laurosalmito@gmail.com>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Diffstat (limited to 'arch/x86/power')
-rw-r--r-- | arch/x86/power/Makefile | 2 | ||||
-rw-r--r-- | arch/x86/power/cpu.c (renamed from arch/x86/power/cpu_64.c) | 0 | ||||
-rw-r--r-- | arch/x86/power/cpu_32.c | 259 |
3 files changed, 1 insertions, 260 deletions
diff --git a/arch/x86/power/Makefile b/arch/x86/power/Makefile index 58b32db33125..de2abbd07544 100644 --- a/arch/x86/power/Makefile +++ b/arch/x86/power/Makefile | |||
@@ -3,5 +3,5 @@ | |||
3 | nostackp := $(call cc-option, -fno-stack-protector) | 3 | nostackp := $(call cc-option, -fno-stack-protector) |
4 | CFLAGS_cpu_$(BITS).o := $(nostackp) | 4 | CFLAGS_cpu_$(BITS).o := $(nostackp) |
5 | 5 | ||
6 | obj-$(CONFIG_PM_SLEEP) += cpu_$(BITS).o | 6 | obj-$(CONFIG_PM_SLEEP) += cpu.o |
7 | obj-$(CONFIG_HIBERNATION) += hibernate_$(BITS).o hibernate_asm_$(BITS).o | 7 | obj-$(CONFIG_HIBERNATION) += hibernate_$(BITS).o hibernate_asm_$(BITS).o |
diff --git a/arch/x86/power/cpu_64.c b/arch/x86/power/cpu.c index d277ef1eea51..d277ef1eea51 100644 --- a/arch/x86/power/cpu_64.c +++ b/arch/x86/power/cpu.c | |||
diff --git a/arch/x86/power/cpu_32.c b/arch/x86/power/cpu_32.c deleted file mode 100644 index ca0ecaed7d4c..000000000000 --- a/arch/x86/power/cpu_32.c +++ /dev/null | |||
@@ -1,259 +0,0 @@ | |||
1 | /* | ||
2 | * Suspend and hibernation support for i386/x86-64. | ||
3 | * | ||
4 | * Distribute under GPLv2 | ||
5 | * | ||
6 | * Copyright (c) 2007 Rafael J. Wysocki <rjw@sisk.pl> | ||
7 | * Copyright (c) 2002 Pavel Machek <pavel@suse.cz> | ||
8 | * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org> | ||
9 | */ | ||
10 | |||
11 | #include <linux/suspend.h> | ||
12 | #include <linux/smp.h> | ||
13 | |||
14 | #include <asm/pgtable.h> | ||
15 | #include <asm/proto.h> | ||
16 | #include <asm/mtrr.h> | ||
17 | #include <asm/page.h> | ||
18 | #include <asm/mce.h> | ||
19 | #include <asm/xcr.h> | ||
20 | #include <asm/suspend.h> | ||
21 | |||
22 | #ifdef CONFIG_X86_32 | ||
23 | static struct saved_context saved_context; | ||
24 | |||
25 | unsigned long saved_context_ebx; | ||
26 | unsigned long saved_context_esp, saved_context_ebp; | ||
27 | unsigned long saved_context_esi, saved_context_edi; | ||
28 | unsigned long saved_context_eflags; | ||
29 | #else | ||
30 | /* CONFIG_X86_64 */ | ||
31 | struct saved_context saved_context; | ||
32 | #endif | ||
33 | |||
34 | /** | ||
35 | * __save_processor_state - save CPU registers before creating a | ||
36 | * hibernation image and before restoring the memory state from it | ||
37 | * @ctxt - structure to store the registers contents in | ||
38 | * | ||
39 | * NOTE: If there is a CPU register the modification of which by the | ||
40 | * boot kernel (ie. the kernel used for loading the hibernation image) | ||
41 | * might affect the operations of the restored target kernel (ie. the one | ||
42 | * saved in the hibernation image), then its contents must be saved by this | ||
43 | * function. In other words, if kernel A is hibernated and different | ||
44 | * kernel B is used for loading the hibernation image into memory, the | ||
45 | * kernel A's __save_processor_state() function must save all registers | ||
46 | * needed by kernel A, so that it can operate correctly after the resume | ||
47 | * regardless of what kernel B does in the meantime. | ||
48 | */ | ||
49 | static void __save_processor_state(struct saved_context *ctxt) | ||
50 | { | ||
51 | #ifdef CONFIG_X86_32 | ||
52 | mtrr_save_fixed_ranges(NULL); | ||
53 | #endif | ||
54 | kernel_fpu_begin(); | ||
55 | |||
56 | /* | ||
57 | * descriptor tables | ||
58 | */ | ||
59 | #ifdef CONFIG_X86_32 | ||
60 | store_gdt(&ctxt->gdt); | ||
61 | store_idt(&ctxt->idt); | ||
62 | #else | ||
63 | /* CONFIG_X86_64 */ | ||
64 | store_gdt((struct desc_ptr *)&ctxt->gdt_limit); | ||
65 | store_idt((struct desc_ptr *)&ctxt->idt_limit); | ||
66 | #endif | ||
67 | store_tr(ctxt->tr); | ||
68 | |||
69 | /* XMM0..XMM15 should be handled by kernel_fpu_begin(). */ | ||
70 | /* | ||
71 | * segment registers | ||
72 | */ | ||
73 | #ifdef CONFIG_X86_32 | ||
74 | savesegment(es, ctxt->es); | ||
75 | savesegment(fs, ctxt->fs); | ||
76 | savesegment(gs, ctxt->gs); | ||
77 | savesegment(ss, ctxt->ss); | ||
78 | #else | ||
79 | /* CONFIG_X86_64 */ | ||
80 | asm volatile ("movw %%ds, %0" : "=m" (ctxt->ds)); | ||
81 | asm volatile ("movw %%es, %0" : "=m" (ctxt->es)); | ||
82 | asm volatile ("movw %%fs, %0" : "=m" (ctxt->fs)); | ||
83 | asm volatile ("movw %%gs, %0" : "=m" (ctxt->gs)); | ||
84 | asm volatile ("movw %%ss, %0" : "=m" (ctxt->ss)); | ||
85 | |||
86 | rdmsrl(MSR_FS_BASE, ctxt->fs_base); | ||
87 | rdmsrl(MSR_GS_BASE, ctxt->gs_base); | ||
88 | rdmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base); | ||
89 | mtrr_save_fixed_ranges(NULL); | ||
90 | |||
91 | rdmsrl(MSR_EFER, ctxt->efer); | ||
92 | #endif | ||
93 | |||
94 | /* | ||
95 | * control registers | ||
96 | */ | ||
97 | ctxt->cr0 = read_cr0(); | ||
98 | ctxt->cr2 = read_cr2(); | ||
99 | ctxt->cr3 = read_cr3(); | ||
100 | #ifdef CONFIG_X86_32 | ||
101 | ctxt->cr4 = read_cr4_safe(); | ||
102 | #else | ||
103 | /* CONFIG_X86_64 */ | ||
104 | ctxt->cr4 = read_cr4(); | ||
105 | ctxt->cr8 = read_cr8(); | ||
106 | #endif | ||
107 | } | ||
108 | |||
109 | /* Needed by apm.c */ | ||
110 | void save_processor_state(void) | ||
111 | { | ||
112 | __save_processor_state(&saved_context); | ||
113 | } | ||
114 | #ifdef CONFIG_X86_32 | ||
115 | EXPORT_SYMBOL(save_processor_state); | ||
116 | #endif | ||
117 | |||
118 | static void do_fpu_end(void) | ||
119 | { | ||
120 | /* | ||
121 | * Restore FPU regs if necessary. | ||
122 | */ | ||
123 | kernel_fpu_end(); | ||
124 | } | ||
125 | |||
126 | static void fix_processor_context(void) | ||
127 | { | ||
128 | int cpu = smp_processor_id(); | ||
129 | struct tss_struct *t = &per_cpu(init_tss, cpu); | ||
130 | |||
131 | set_tss_desc(cpu, t); /* | ||
132 | * This just modifies memory; should not be | ||
133 | * necessary. But... This is necessary, because | ||
134 | * 386 hardware has concept of busy TSS or some | ||
135 | * similar stupidity. | ||
136 | */ | ||
137 | |||
138 | #ifdef CONFIG_X86_64 | ||
139 | get_cpu_gdt_table(cpu)[GDT_ENTRY_TSS].type = 9; | ||
140 | |||
141 | syscall_init(); /* This sets MSR_*STAR and related */ | ||
142 | #endif | ||
143 | load_TR_desc(); /* This does ltr */ | ||
144 | load_LDT(¤t->active_mm->context); /* This does lldt */ | ||
145 | |||
146 | /* | ||
147 | * Now maybe reload the debug registers | ||
148 | */ | ||
149 | if (current->thread.debugreg7) { | ||
150 | #ifdef CONFIG_X86_32 | ||
151 | set_debugreg(current->thread.debugreg0, 0); | ||
152 | set_debugreg(current->thread.debugreg1, 1); | ||
153 | set_debugreg(current->thread.debugreg2, 2); | ||
154 | set_debugreg(current->thread.debugreg3, 3); | ||
155 | /* no 4 and 5 */ | ||
156 | set_debugreg(current->thread.debugreg6, 6); | ||
157 | set_debugreg(current->thread.debugreg7, 7); | ||
158 | #else | ||
159 | /* CONFIG_X86_64 */ | ||
160 | loaddebug(¤t->thread, 0); | ||
161 | loaddebug(¤t->thread, 1); | ||
162 | loaddebug(¤t->thread, 2); | ||
163 | loaddebug(¤t->thread, 3); | ||
164 | /* no 4 and 5 */ | ||
165 | loaddebug(¤t->thread, 6); | ||
166 | loaddebug(¤t->thread, 7); | ||
167 | #endif | ||
168 | } | ||
169 | |||
170 | } | ||
171 | |||
172 | /** | ||
173 | * __restore_processor_state - restore the contents of CPU registers saved | ||
174 | * by __save_processor_state() | ||
175 | * @ctxt - structure to load the registers contents from | ||
176 | */ | ||
177 | static void __restore_processor_state(struct saved_context *ctxt) | ||
178 | { | ||
179 | /* | ||
180 | * control registers | ||
181 | */ | ||
182 | /* cr4 was introduced in the Pentium CPU */ | ||
183 | #ifdef CONFIG_X86_32 | ||
184 | if (ctxt->cr4) | ||
185 | write_cr4(ctxt->cr4); | ||
186 | #else | ||
187 | /* CONFIG X86_64 */ | ||
188 | wrmsrl(MSR_EFER, ctxt->efer); | ||
189 | write_cr8(ctxt->cr8); | ||
190 | write_cr4(ctxt->cr4); | ||
191 | #endif | ||
192 | write_cr3(ctxt->cr3); | ||
193 | write_cr2(ctxt->cr2); | ||
194 | write_cr0(ctxt->cr0); | ||
195 | |||
196 | /* | ||
197 | * now restore the descriptor tables to their proper values | ||
198 | * ltr is done i fix_processor_context(). | ||
199 | */ | ||
200 | #ifdef CONFIG_X86_32 | ||
201 | load_gdt(&ctxt->gdt); | ||
202 | load_idt(&ctxt->idt); | ||
203 | #else | ||
204 | /* CONFIG_X86_64 */ | ||
205 | load_gdt((const struct desc_ptr *)&ctxt->gdt_limit); | ||
206 | load_idt((const struct desc_ptr *)&ctxt->idt_limit); | ||
207 | #endif | ||
208 | |||
209 | /* | ||
210 | * segment registers | ||
211 | */ | ||
212 | #ifdef CONFIG_X86_32 | ||
213 | loadsegment(es, ctxt->es); | ||
214 | loadsegment(fs, ctxt->fs); | ||
215 | loadsegment(gs, ctxt->gs); | ||
216 | loadsegment(ss, ctxt->ss); | ||
217 | |||
218 | /* | ||
219 | * sysenter MSRs | ||
220 | */ | ||
221 | if (boot_cpu_has(X86_FEATURE_SEP)) | ||
222 | enable_sep_cpu(); | ||
223 | #else | ||
224 | /* CONFIG_X86_64 */ | ||
225 | asm volatile ("movw %0, %%ds" :: "r" (ctxt->ds)); | ||
226 | asm volatile ("movw %0, %%es" :: "r" (ctxt->es)); | ||
227 | asm volatile ("movw %0, %%fs" :: "r" (ctxt->fs)); | ||
228 | load_gs_index(ctxt->gs); | ||
229 | asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss)); | ||
230 | |||
231 | wrmsrl(MSR_FS_BASE, ctxt->fs_base); | ||
232 | wrmsrl(MSR_GS_BASE, ctxt->gs_base); | ||
233 | wrmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base); | ||
234 | #endif | ||
235 | |||
236 | /* | ||
237 | * restore XCR0 for xsave capable cpu's. | ||
238 | */ | ||
239 | if (cpu_has_xsave) | ||
240 | xsetbv(XCR_XFEATURE_ENABLED_MASK, pcntxt_mask); | ||
241 | |||
242 | fix_processor_context(); | ||
243 | |||
244 | do_fpu_end(); | ||
245 | mtrr_ap_init(); | ||
246 | |||
247 | #ifdef CONFIG_X86_32 | ||
248 | mcheck_init(&boot_cpu_data); | ||
249 | #endif | ||
250 | } | ||
251 | |||
252 | /* Needed by apm.c */ | ||
253 | void restore_processor_state(void) | ||
254 | { | ||
255 | __restore_processor_state(&saved_context); | ||
256 | } | ||
257 | #ifdef CONFIG_X86_32 | ||
258 | EXPORT_SYMBOL(restore_processor_state); | ||
259 | #endif | ||