Merge branch 'x86-uv-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 UV3 support update from Ingo Molnar:
 "Support for the SGI Ultraviolet System 3 (UV3) platform - the upcoming
  third major iteration and upscaling of the SGI UV supercomputing
  platform."

* 'x86-uv-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86, uv, uv3: Trim MMR register definitions after code changes for SGI UV3
  x86, uv, uv3: Check current gru hub support for SGI UV3
  x86, uv, uv3: Update Time Support for SGI UV3
  x86, uv, uv3: Update x2apic Support for SGI UV3
  x86, uv, uv3: Update Hub Info for SGI UV3
  x86, uv, uv3: Update ACPI Check to include SGI UV3
  x86, uv, uv3: Update MMR register definitions for SGI Ultraviolet System 3 (UV3)

1 files changed, 7 insertions, 6 deletions

diff --git a/arch/x86/platform/uv/uv_time.c b/arch/x86/platform/uv/uv_time.c
index 5032e0d19b86..98718f604eb6 100644
--- a/arch/x86/platform/uv/uv_time.c
+++ b/arch/x86/platform/uv/uv_time.c
@@ -15,7 +15,7 @@
  *  along with this program; if not, write to the Free Software
  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  *
- *  Copyright (c) 2009 Silicon Graphics, Inc.  All Rights Reserved.
+ *  Copyright (c) 2009-2013 Silicon Graphics, Inc.  All Rights Reserved.
  *  Copyright (c) Dimitri Sivanich
  */
 #include <linux/clockchips.h>
@@ -102,9 +102,10 @@ static int uv_intr_pending(int pnode)
         if (is_uv1_hub())
                 return uv_read_global_mmr64(pnode, UVH_EVENT_OCCURRED0) &
                         UV1H_EVENT_OCCURRED0_RTC1_MASK;
-        else
-                return uv_read_global_mmr64(pnode, UV2H_EVENT_OCCURRED2) &
-                        UV2H_EVENT_OCCURRED2_RTC_1_MASK;
+        else if (is_uvx_hub())
+                return uv_read_global_mmr64(pnode, UVXH_EVENT_OCCURRED2) &
+                        UVXH_EVENT_OCCURRED2_RTC_1_MASK;
+        return 0;
 }
 
 /* Setup interrupt and return non-zero if early expiration occurred. */
@@ -122,8 +123,8 @@ static int uv_setup_intr(int cpu, u64 expires)
                 uv_write_global_mmr64(pnode, UVH_EVENT_OCCURRED0_ALIAS,
                                 UV1H_EVENT_OCCURRED0_RTC1_MASK);
         else
-                uv_write_global_mmr64(pnode, UV2H_EVENT_OCCURRED2_ALIAS,
-                                UV2H_EVENT_OCCURRED2_RTC_1_MASK);
+                uv_write_global_mmr64(pnode, UVXH_EVENT_OCCURRED2_ALIAS,
+                                UVXH_EVENT_OCCURRED2_RTC_1_MASK);
 
         val = (X86_PLATFORM_IPI_VECTOR << UVH_RTC1_INT_CONFIG_VECTOR_SHFT) |
                 ((u64)apicid << UVH_RTC1_INT_CONFIG_APIC_ID_SHFT);