diff options
author | Jacob Pan <jacob.jun.pan@linux.intel.com> | 2011-11-16 11:07:22 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2011-12-05 06:42:11 -0500 |
commit | 48bc5562103412590e4487b666b49e7b6c84ba44 (patch) | |
tree | ab849bf6ea7f764781184d80bd3e8ae1b32959af /arch/x86/platform | |
parent | 6be30bb7d7504ec687a65c9bbdae8d1d2f8eaa19 (diff) |
x86,mrst: Power control commands update
On the Intel MID devices SCU commands are issued to manage power
off and the like. We need to issue different ones for
non-Lincroft based devices.
Signed-off-by: Alek Du <alek.du@intel.com>
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/platform')
-rw-r--r-- | arch/x86/platform/mrst/mrst.c | 25 |
1 files changed, 14 insertions, 11 deletions
diff --git a/arch/x86/platform/mrst/mrst.c b/arch/x86/platform/mrst/mrst.c index b1489a06a49d..fedc3d7ffa77 100644 --- a/arch/x86/platform/mrst/mrst.c +++ b/arch/x86/platform/mrst/mrst.c | |||
@@ -76,6 +76,20 @@ struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX]; | |||
76 | EXPORT_SYMBOL_GPL(sfi_mrtc_array); | 76 | EXPORT_SYMBOL_GPL(sfi_mrtc_array); |
77 | int sfi_mrtc_num; | 77 | int sfi_mrtc_num; |
78 | 78 | ||
79 | static void mrst_power_off(void) | ||
80 | { | ||
81 | if (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT) | ||
82 | intel_scu_ipc_simple_command(IPCMSG_COLD_RESET, 1); | ||
83 | } | ||
84 | |||
85 | static void mrst_reboot(void) | ||
86 | { | ||
87 | if (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT) | ||
88 | intel_scu_ipc_simple_command(IPCMSG_COLD_RESET, 0); | ||
89 | else | ||
90 | intel_scu_ipc_simple_command(IPCMSG_COLD_BOOT, 0); | ||
91 | } | ||
92 | |||
79 | /* parse all the mtimer info to a static mtimer array */ | 93 | /* parse all the mtimer info to a static mtimer array */ |
80 | static int __init sfi_parse_mtmr(struct sfi_table_header *table) | 94 | static int __init sfi_parse_mtmr(struct sfi_table_header *table) |
81 | { | 95 | { |
@@ -265,17 +279,6 @@ static int mrst_i8042_detect(void) | |||
265 | return 0; | 279 | return 0; |
266 | } | 280 | } |
267 | 281 | ||
268 | /* Reboot and power off are handled by the SCU on a MID device */ | ||
269 | static void mrst_power_off(void) | ||
270 | { | ||
271 | intel_scu_ipc_simple_command(0xf1, 1); | ||
272 | } | ||
273 | |||
274 | static void mrst_reboot(void) | ||
275 | { | ||
276 | intel_scu_ipc_simple_command(0xf1, 0); | ||
277 | } | ||
278 | |||
279 | /* | 282 | /* |
280 | * Moorestown does not have external NMI source nor port 0x61 to report | 283 | * Moorestown does not have external NMI source nor port 0x61 to report |
281 | * NMI status. The possible NMI sources are from pmu as a result of NMI | 284 | * NMI status. The possible NMI sources are from pmu as a result of NMI |