diff options
author | Robert Richter <robert.richter@amd.com> | 2009-05-22 09:36:29 -0400 |
---|---|---|
committer | Robert Richter <robert.richter@amd.com> | 2009-06-11 13:42:10 -0400 |
commit | ff9faa8b676e195476b86f03fe58db0f01bda8f3 (patch) | |
tree | 485f0910929930536dfabf5d6829365e629440a3 /arch/x86/oprofile | |
parent | d20f24c66011f8a397bca6c5d1a6a7c7e612d2d7 (diff) |
x86/oprofile: move common macros to op_x86_model.h
There are duplicate macro implementations in model specific code. This
patch moves all common macros to op_x86_model.h.
Signed-off-by: Robert Richter <robert.richter@amd.com>
Diffstat (limited to 'arch/x86/oprofile')
-rw-r--r-- | arch/x86/oprofile/op_model_amd.c | 8 | ||||
-rw-r--r-- | arch/x86/oprofile/op_model_p4.c | 2 | ||||
-rw-r--r-- | arch/x86/oprofile/op_model_ppro.c | 8 | ||||
-rw-r--r-- | arch/x86/oprofile/op_x86_model.h | 9 |
4 files changed, 9 insertions, 18 deletions
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c index b54c0880b7dc..4b9254a67e68 100644 --- a/arch/x86/oprofile/op_model_amd.c +++ b/arch/x86/oprofile/op_model_amd.c | |||
@@ -26,22 +26,14 @@ | |||
26 | #define NUM_COUNTERS 4 | 26 | #define NUM_COUNTERS 4 |
27 | #define NUM_CONTROLS 4 | 27 | #define NUM_CONTROLS 4 |
28 | 28 | ||
29 | #define CTR_IS_RESERVED(msrs, c) (msrs->counters[(c)].addr ? 1 : 0) | ||
30 | #define CTR_READ(l, h, msrs, c) do {rdmsr(msrs->counters[(c)].addr, (l), (h)); } while (0) | 29 | #define CTR_READ(l, h, msrs, c) do {rdmsr(msrs->counters[(c)].addr, (l), (h)); } while (0) |
31 | #define CTR_WRITE(l, msrs, c) do {wrmsr(msrs->counters[(c)].addr, -(unsigned int)(l), -1); } while (0) | 30 | #define CTR_WRITE(l, msrs, c) do {wrmsr(msrs->counters[(c)].addr, -(unsigned int)(l), -1); } while (0) |
32 | #define CTR_OVERFLOWED(n) (!((n) & (1U<<31))) | 31 | #define CTR_OVERFLOWED(n) (!((n) & (1U<<31))) |
33 | 32 | ||
34 | #define CTRL_IS_RESERVED(msrs, c) (msrs->controls[(c)].addr ? 1 : 0) | ||
35 | #define CTRL_READ(l, h, msrs, c) do {rdmsr(msrs->controls[(c)].addr, (l), (h)); } while (0) | 33 | #define CTRL_READ(l, h, msrs, c) do {rdmsr(msrs->controls[(c)].addr, (l), (h)); } while (0) |
36 | #define CTRL_WRITE(l, h, msrs, c) do {wrmsr(msrs->controls[(c)].addr, (l), (h)); } while (0) | 34 | #define CTRL_WRITE(l, h, msrs, c) do {wrmsr(msrs->controls[(c)].addr, (l), (h)); } while (0) |
37 | #define CTRL_SET_ACTIVE(n) (n |= (1<<22)) | ||
38 | #define CTRL_SET_INACTIVE(n) (n &= ~(1<<22)) | ||
39 | #define CTRL_CLEAR_LO(x) (x &= (1<<21)) | 35 | #define CTRL_CLEAR_LO(x) (x &= (1<<21)) |
40 | #define CTRL_CLEAR_HI(x) (x &= 0xfffffcf0) | 36 | #define CTRL_CLEAR_HI(x) (x &= 0xfffffcf0) |
41 | #define CTRL_SET_ENABLE(val) (val |= 1<<20) | ||
42 | #define CTRL_SET_USR(val, u) (val |= ((u & 1) << 16)) | ||
43 | #define CTRL_SET_KERN(val, k) (val |= ((k & 1) << 17)) | ||
44 | #define CTRL_SET_UM(val, m) (val |= (m << 8)) | ||
45 | #define CTRL_SET_EVENT_LOW(val, e) (val |= (e & 0xff)) | 37 | #define CTRL_SET_EVENT_LOW(val, e) (val |= (e & 0xff)) |
46 | #define CTRL_SET_EVENT_HIGH(val, e) (val |= ((e >> 8) & 0xf)) | 38 | #define CTRL_SET_EVENT_HIGH(val, e) (val |= ((e >> 8) & 0xf)) |
47 | #define CTRL_SET_HOST_ONLY(val, h) (val |= ((h & 1) << 9)) | 39 | #define CTRL_SET_HOST_ONLY(val, h) (val |= ((h & 1) << 9)) |
diff --git a/arch/x86/oprofile/op_model_p4.c b/arch/x86/oprofile/op_model_p4.c index 819b131fd752..420c15e71237 100644 --- a/arch/x86/oprofile/op_model_p4.c +++ b/arch/x86/oprofile/op_model_p4.c | |||
@@ -366,8 +366,6 @@ static struct p4_event_binding p4_events[NUM_EVENTS] = { | |||
366 | #define CCCR_OVF_P(cccr) ((cccr) & (1U<<31)) | 366 | #define CCCR_OVF_P(cccr) ((cccr) & (1U<<31)) |
367 | #define CCCR_CLEAR_OVF(cccr) ((cccr) &= (~(1U<<31))) | 367 | #define CCCR_CLEAR_OVF(cccr) ((cccr) &= (~(1U<<31))) |
368 | 368 | ||
369 | #define CTRL_IS_RESERVED(msrs, c) (msrs->controls[(c)].addr ? 1 : 0) | ||
370 | #define CTR_IS_RESERVED(msrs, c) (msrs->counters[(c)].addr ? 1 : 0) | ||
371 | #define CTR_READ(l, h, i) do {rdmsr(p4_counters[(i)].counter_address, (l), (h)); } while (0) | 369 | #define CTR_READ(l, h, i) do {rdmsr(p4_counters[(i)].counter_address, (l), (h)); } while (0) |
372 | #define CTR_WRITE(l, i) do {wrmsr(p4_counters[(i)].counter_address, -(u32)(l), -1); } while (0) | 370 | #define CTR_WRITE(l, i) do {wrmsr(p4_counters[(i)].counter_address, -(u32)(l), -1); } while (0) |
373 | #define CTR_OVERFLOW_P(ctr) (!((ctr) & 0x80000000)) | 371 | #define CTR_OVERFLOW_P(ctr) (!((ctr) & 0x80000000)) |
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c index ae5811966883..a922a1a815c3 100644 --- a/arch/x86/oprofile/op_model_ppro.c +++ b/arch/x86/oprofile/op_model_ppro.c | |||
@@ -26,19 +26,11 @@ | |||
26 | static int num_counters = 2; | 26 | static int num_counters = 2; |
27 | static int counter_width = 32; | 27 | static int counter_width = 32; |
28 | 28 | ||
29 | #define CTR_IS_RESERVED(msrs, c) (msrs->counters[(c)].addr ? 1 : 0) | ||
30 | #define CTR_OVERFLOWED(n) (!((n) & (1ULL<<(counter_width-1)))) | 29 | #define CTR_OVERFLOWED(n) (!((n) & (1ULL<<(counter_width-1)))) |
31 | 30 | ||
32 | #define CTRL_IS_RESERVED(msrs, c) (msrs->controls[(c)].addr ? 1 : 0) | ||
33 | #define CTRL_READ(l, h, msrs, c) do {rdmsr((msrs->controls[(c)].addr), (l), (h)); } while (0) | 31 | #define CTRL_READ(l, h, msrs, c) do {rdmsr((msrs->controls[(c)].addr), (l), (h)); } while (0) |
34 | #define CTRL_WRITE(l, h, msrs, c) do {wrmsr((msrs->controls[(c)].addr), (l), (h)); } while (0) | 32 | #define CTRL_WRITE(l, h, msrs, c) do {wrmsr((msrs->controls[(c)].addr), (l), (h)); } while (0) |
35 | #define CTRL_SET_ACTIVE(n) (n |= (1<<22)) | ||
36 | #define CTRL_SET_INACTIVE(n) (n &= ~(1<<22)) | ||
37 | #define CTRL_CLEAR(x) (x &= (1<<21)) | 33 | #define CTRL_CLEAR(x) (x &= (1<<21)) |
38 | #define CTRL_SET_ENABLE(val) (val |= 1<<20) | ||
39 | #define CTRL_SET_USR(val, u) (val |= ((u & 1) << 16)) | ||
40 | #define CTRL_SET_KERN(val, k) (val |= ((k & 1) << 17)) | ||
41 | #define CTRL_SET_UM(val, m) (val |= (m << 8)) | ||
42 | #define CTRL_SET_EVENT(val, e) (val |= e) | 34 | #define CTRL_SET_EVENT(val, e) (val |= e) |
43 | 35 | ||
44 | static u64 *reset_value; | 36 | static u64 *reset_value; |
diff --git a/arch/x86/oprofile/op_x86_model.h b/arch/x86/oprofile/op_x86_model.h index bd8157d12ff0..c80ec7d09993 100644 --- a/arch/x86/oprofile/op_x86_model.h +++ b/arch/x86/oprofile/op_x86_model.h | |||
@@ -11,6 +11,15 @@ | |||
11 | #ifndef OP_X86_MODEL_H | 11 | #ifndef OP_X86_MODEL_H |
12 | #define OP_X86_MODEL_H | 12 | #define OP_X86_MODEL_H |
13 | 13 | ||
14 | #define CTR_IS_RESERVED(msrs, c) (msrs->counters[(c)].addr ? 1 : 0) | ||
15 | #define CTRL_IS_RESERVED(msrs, c) (msrs->controls[(c)].addr ? 1 : 0) | ||
16 | #define CTRL_SET_ACTIVE(n) (n |= (1<<22)) | ||
17 | #define CTRL_SET_ENABLE(val) (val |= 1<<20) | ||
18 | #define CTRL_SET_INACTIVE(n) (n &= ~(1<<22)) | ||
19 | #define CTRL_SET_KERN(val, k) (val |= ((k & 1) << 17)) | ||
20 | #define CTRL_SET_UM(val, m) (val |= (m << 8)) | ||
21 | #define CTRL_SET_USR(val, u) (val |= ((u & 1) << 16)) | ||
22 | |||
14 | struct op_saved_msr { | 23 | struct op_saved_msr { |
15 | unsigned int high; | 24 | unsigned int high; |
16 | unsigned int low; | 25 | unsigned int low; |