aboutsummaryrefslogtreecommitdiffstats
path: root/arch/x86/oprofile
diff options
context:
space:
mode:
authorSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>2008-10-15 09:15:51 -0400
committerRobert Richter <robert.richter@amd.com>2008-10-15 14:56:56 -0400
commit5f87dfb79f829339508a5d989b8252eb30842587 (patch)
tree7e0234f93f67846ba853b3ba3fa2818e315fe442 /arch/x86/oprofile
parent69046d430417c30f48867fc52e892c9050b3a29b (diff)
x86/oprofile: add the logic for enabling additional IBS bits
This patch adds the logic for enabling additional IBS control bits : * IBS-Fetch IbsRandEn bit (bit 57) * IBS-Op IbsOpCntCtl bit (bit 19) Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Robert Richter <robert.richter@amd.com>
Diffstat (limited to 'arch/x86/oprofile')
-rw-r--r--arch/x86/oprofile/op_model_amd.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c
index a2e83afbe3e1..509513760a6e 100644
--- a/arch/x86/oprofile/op_model_amd.c
+++ b/arch/x86/oprofile/op_model_amd.c
@@ -310,12 +310,15 @@ static void op_amd_start(struct op_msrs const * const msrs)
310#ifdef CONFIG_OPROFILE_IBS 310#ifdef CONFIG_OPROFILE_IBS
311 if (ibs_allowed && ibs_config.fetch_enabled) { 311 if (ibs_allowed && ibs_config.fetch_enabled) {
312 low = (ibs_config.max_cnt_fetch >> 4) & 0xFFFF; 312 low = (ibs_config.max_cnt_fetch >> 4) & 0xFFFF;
313 high = IBS_FETCH_HIGH_ENABLE; 313 high = ((ibs_config.rand_en & 0x1) << 25) /* bit 57 */
314 + IBS_FETCH_HIGH_ENABLE;
314 wrmsr(MSR_AMD64_IBSFETCHCTL, low, high); 315 wrmsr(MSR_AMD64_IBSFETCHCTL, low, high);
315 } 316 }
316 317
317 if (ibs_allowed && ibs_config.op_enabled) { 318 if (ibs_allowed && ibs_config.op_enabled) {
318 low = ((ibs_config.max_cnt_op >> 4) & 0xFFFF) + IBS_OP_LOW_ENABLE; 319 low = ((ibs_config.max_cnt_op >> 4) & 0xFFFF)
320 + ((ibs_config.dispatched_ops & 0x1) << 19) /* bit 19 */
321 + IBS_OP_LOW_ENABLE;
319 high = 0; 322 high = 0;
320 wrmsr(MSR_AMD64_IBSOPCTL, low, high); 323 wrmsr(MSR_AMD64_IBSOPCTL, low, high);
321 } 324 }