diff options
author | Robert Richter <robert.richter@amd.com> | 2010-02-25 13:16:46 -0500 |
---|---|---|
committer | Robert Richter <robert.richter@amd.com> | 2010-02-26 09:19:03 -0500 |
commit | 68dc819ce829f7e7977a56524e710473bdb55115 (patch) | |
tree | 639908a6534dc9ee4780d62ad9f5f28d52e58b7d /arch/x86/oprofile | |
parent | 8588d1067147e14d1dd521fbadd1d2564f8cc794 (diff) |
oprofile/x86: fix perfctr nmi reservation for mulitplexing
Multiple virtual counters share one physical counter. The reservation
of virtual counters fails due to duplicate allocation of the same
counter. The counters are already reserved. Thus, virtual counter
reservation may removed at all. This also makes the code easier.
Cc: stable@kernel.org
Signed-off-by: Robert Richter <robert.richter@amd.com>
Diffstat (limited to 'arch/x86/oprofile')
-rw-r--r-- | arch/x86/oprofile/nmi_int.c | 11 | ||||
-rw-r--r-- | arch/x86/oprofile/op_model_amd.c | 19 |
2 files changed, 6 insertions, 24 deletions
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c index 3347f696edc7..7170d1e29896 100644 --- a/arch/x86/oprofile/nmi_int.c +++ b/arch/x86/oprofile/nmi_int.c | |||
@@ -179,7 +179,6 @@ static void nmi_cpu_setup_mux(int cpu, struct op_msrs const * const msrs) | |||
179 | if (counter_config[i].enabled) { | 179 | if (counter_config[i].enabled) { |
180 | multiplex[i].saved = -(u64)counter_config[i].count; | 180 | multiplex[i].saved = -(u64)counter_config[i].count; |
181 | } else { | 181 | } else { |
182 | multiplex[i].addr = 0; | ||
183 | multiplex[i].saved = 0; | 182 | multiplex[i].saved = 0; |
184 | } | 183 | } |
185 | } | 184 | } |
@@ -189,25 +188,27 @@ static void nmi_cpu_setup_mux(int cpu, struct op_msrs const * const msrs) | |||
189 | 188 | ||
190 | static void nmi_cpu_save_mpx_registers(struct op_msrs *msrs) | 189 | static void nmi_cpu_save_mpx_registers(struct op_msrs *msrs) |
191 | { | 190 | { |
191 | struct op_msr *counters = msrs->counters; | ||
192 | struct op_msr *multiplex = msrs->multiplex; | 192 | struct op_msr *multiplex = msrs->multiplex; |
193 | int i; | 193 | int i; |
194 | 194 | ||
195 | for (i = 0; i < model->num_counters; ++i) { | 195 | for (i = 0; i < model->num_counters; ++i) { |
196 | int virt = op_x86_phys_to_virt(i); | 196 | int virt = op_x86_phys_to_virt(i); |
197 | if (multiplex[virt].addr) | 197 | if (counters[i].addr) |
198 | rdmsrl(multiplex[virt].addr, multiplex[virt].saved); | 198 | rdmsrl(counters[i].addr, multiplex[virt].saved); |
199 | } | 199 | } |
200 | } | 200 | } |
201 | 201 | ||
202 | static void nmi_cpu_restore_mpx_registers(struct op_msrs *msrs) | 202 | static void nmi_cpu_restore_mpx_registers(struct op_msrs *msrs) |
203 | { | 203 | { |
204 | struct op_msr *counters = msrs->counters; | ||
204 | struct op_msr *multiplex = msrs->multiplex; | 205 | struct op_msr *multiplex = msrs->multiplex; |
205 | int i; | 206 | int i; |
206 | 207 | ||
207 | for (i = 0; i < model->num_counters; ++i) { | 208 | for (i = 0; i < model->num_counters; ++i) { |
208 | int virt = op_x86_phys_to_virt(i); | 209 | int virt = op_x86_phys_to_virt(i); |
209 | if (multiplex[virt].addr) | 210 | if (counters[i].addr) |
210 | wrmsrl(multiplex[virt].addr, multiplex[virt].saved); | 211 | wrmsrl(counters[i].addr, multiplex[virt].saved); |
211 | } | 212 | } |
212 | } | 213 | } |
213 | 214 | ||
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c index ef9d735dea35..2aab018a7a56 100644 --- a/arch/x86/oprofile/op_model_amd.c +++ b/arch/x86/oprofile/op_model_amd.c | |||
@@ -118,19 +118,6 @@ static u32 get_ibs_caps(void) | |||
118 | 118 | ||
119 | #ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX | 119 | #ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX |
120 | 120 | ||
121 | static void op_mux_fill_in_addresses(struct op_msrs * const msrs) | ||
122 | { | ||
123 | int i; | ||
124 | |||
125 | for (i = 0; i < NUM_VIRT_COUNTERS; i++) { | ||
126 | int hw_counter = op_x86_virt_to_phys(i); | ||
127 | if (reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i)) | ||
128 | msrs->multiplex[i].addr = MSR_K7_PERFCTR0 + hw_counter; | ||
129 | else | ||
130 | msrs->multiplex[i].addr = 0; | ||
131 | } | ||
132 | } | ||
133 | |||
134 | static void op_mux_switch_ctrl(struct op_x86_model_spec const *model, | 121 | static void op_mux_switch_ctrl(struct op_x86_model_spec const *model, |
135 | struct op_msrs const * const msrs) | 122 | struct op_msrs const * const msrs) |
136 | { | 123 | { |
@@ -149,10 +136,6 @@ static void op_mux_switch_ctrl(struct op_x86_model_spec const *model, | |||
149 | } | 136 | } |
150 | } | 137 | } |
151 | 138 | ||
152 | #else | ||
153 | |||
154 | static inline void op_mux_fill_in_addresses(struct op_msrs * const msrs) { } | ||
155 | |||
156 | #endif | 139 | #endif |
157 | 140 | ||
158 | /* functions for op_amd_spec */ | 141 | /* functions for op_amd_spec */ |
@@ -174,8 +157,6 @@ static void op_amd_fill_in_addresses(struct op_msrs * const msrs) | |||
174 | else | 157 | else |
175 | msrs->controls[i].addr = 0; | 158 | msrs->controls[i].addr = 0; |
176 | } | 159 | } |
177 | |||
178 | op_mux_fill_in_addresses(msrs); | ||
179 | } | 160 | } |
180 | 161 | ||
181 | static void op_amd_setup_ctrs(struct op_x86_model_spec const *model, | 162 | static void op_amd_setup_ctrs(struct op_x86_model_spec const *model, |