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authorvenkatesh.pallipadi@intel.com <venkatesh.pallipadi@intel.com>2009-05-22 16:23:37 -0400
committerH. Peter Anvin <hpa@zytor.com>2009-05-22 16:33:27 -0400
commit0b827537e339c084ac9384df588969d400be9e0d (patch)
tree26ae170ba3fd7077c28613f8cc7aba7d1b133430 /arch/x86/mm/pageattr.c
parent0c752a93353d9b17dbe148312d732fbe06d235e1 (diff)
x86: bugfix wbinvd() model check instead of family check
wbinvd is supported on all CPUs 486 or later. But, pageattr.c is checking x86_model >= 4 before wbinvd(), which looks like an oversight bug. It was first introduced at one place by changeset d7c8f21a8cad0228c7c5ce2bb6dbd95d1ee49d13 and got copied over to second place in the same file later. [ Impact: fix missing cache flush on early-model CPUs, potential data corruption ] Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/mm/pageattr.c')
-rw-r--r--arch/x86/mm/pageattr.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 797f9f107cb6..2cc019a3f71b 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -153,7 +153,7 @@ static void __cpa_flush_all(void *arg)
153 */ 153 */
154 __flush_tlb_all(); 154 __flush_tlb_all();
155 155
156 if (cache && boot_cpu_data.x86_model >= 4) 156 if (cache && boot_cpu_data.x86 >= 4)
157 wbinvd(); 157 wbinvd();
158} 158}
159 159
@@ -218,7 +218,7 @@ static void cpa_flush_array(unsigned long *start, int numpages, int cache,
218 218
219 /* 4M threshold */ 219 /* 4M threshold */
220 if (numpages >= 1024) { 220 if (numpages >= 1024) {
221 if (boot_cpu_data.x86_model >= 4) 221 if (boot_cpu_data.x86 >= 4)
222 wbinvd(); 222 wbinvd();
223 return; 223 return;
224 } 224 }