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authorIngo Molnar <mingo@elte.hu>2009-03-18 05:37:43 -0400
committerIngo Molnar <mingo@elte.hu>2009-03-18 05:37:43 -0400
commit04dfcfcb54b073133bcca2c8f25b55e904558931 (patch)
tree123d13f9e242751f629924e92fcb297dc669d767 /arch/x86/mm/pageattr.c
parent0bd5c4f7c874cf48ff7904dcf8a59988c8fea0e8 (diff)
parentee568b25ee9e160b32d1aef73d8b2ee9c05d34db (diff)
Merge branch 'linus' into core/iommu
Diffstat (limited to 'arch/x86/mm/pageattr.c')
-rw-r--r--arch/x86/mm/pageattr.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 7be47d1a97e4..7233bd7e357b 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -515,6 +515,17 @@ static int split_large_page(pte_t *kpte, unsigned long address)
515 * primary protection behavior: 515 * primary protection behavior:
516 */ 516 */
517 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE))); 517 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
518
519 /*
520 * Intel Atom errata AAH41 workaround.
521 *
522 * The real fix should be in hw or in a microcode update, but
523 * we also probabilistically try to reduce the window of having
524 * a large TLB mixed with 4K TLBs while instruction fetches are
525 * going on.
526 */
527 __flush_tlb_all();
528
518 base = NULL; 529 base = NULL;
519 530
520out_unlock: 531out_unlock: