aboutsummaryrefslogtreecommitdiffstats
path: root/arch/x86/mm/ioremap.c
diff options
context:
space:
mode:
authorvenkatesh.pallipadi@intel.com <venkatesh.pallipadi@intel.com>2008-03-18 20:00:24 -0400
committerIngo Molnar <mingo@elte.hu>2008-04-17 11:41:20 -0400
commitb310f381d220b2c6e3fab16e8c6e4ca13eea75b2 (patch)
treedd25df964cd1280ee4f908002726b5ab921da807 /arch/x86/mm/ioremap.c
parentef354af4629e5cc76a3f64fc46d452f2b56d5a59 (diff)
x86: PAT add ioremap_wc() interface
Introduce ioremap_wc for wc remap. (generic wrapper is in a later patch) Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/mm/ioremap.c')
-rw-r--r--arch/x86/mm/ioremap.c30
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index 0cdb7f11ce49..51cd3956c564 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -97,6 +97,9 @@ int ioremap_change_attr(unsigned long vaddr, unsigned long size,
97 default: 97 default:
98 err = _set_memory_uc(vaddr, nrpages); 98 err = _set_memory_uc(vaddr, nrpages);
99 break; 99 break;
100 case _PAGE_CACHE_WC:
101 err = _set_memory_wc(vaddr, nrpages);
102 break;
100 case _PAGE_CACHE_WB: 103 case _PAGE_CACHE_WB:
101 err = _set_memory_wb(vaddr, nrpages); 104 err = _set_memory_wb(vaddr, nrpages);
102 break; 105 break;
@@ -166,8 +169,13 @@ static void __iomem *__ioremap(resource_size_t phys_addr, unsigned long size,
166 * Do not fallback to certain memory types with certain 169 * Do not fallback to certain memory types with certain
167 * requested type: 170 * requested type:
168 * - request is uncached, return cannot be write-back 171 * - request is uncached, return cannot be write-back
172 * - request is uncached, return cannot be write-combine
173 * - request is write-combine, return cannot be write-back
169 */ 174 */
170 if ((prot_val == _PAGE_CACHE_UC && 175 if ((prot_val == _PAGE_CACHE_UC &&
176 (new_prot_val == _PAGE_CACHE_WB ||
177 new_prot_val == _PAGE_CACHE_WC)) ||
178 (prot_val == _PAGE_CACHE_WC &&
171 new_prot_val == _PAGE_CACHE_WB)) { 179 new_prot_val == _PAGE_CACHE_WB)) {
172 free_memtype(phys_addr, phys_addr + size); 180 free_memtype(phys_addr, phys_addr + size);
173 return NULL; 181 return NULL;
@@ -180,6 +188,9 @@ static void __iomem *__ioremap(resource_size_t phys_addr, unsigned long size,
180 default: 188 default:
181 prot = PAGE_KERNEL_NOCACHE; 189 prot = PAGE_KERNEL_NOCACHE;
182 break; 190 break;
191 case _PAGE_CACHE_WC:
192 prot = PAGE_KERNEL_WC;
193 break;
183 case _PAGE_CACHE_WB: 194 case _PAGE_CACHE_WB:
184 prot = PAGE_KERNEL; 195 prot = PAGE_KERNEL;
185 break; 196 break;
@@ -235,6 +246,25 @@ void __iomem *ioremap_nocache(resource_size_t phys_addr, unsigned long size)
235} 246}
236EXPORT_SYMBOL(ioremap_nocache); 247EXPORT_SYMBOL(ioremap_nocache);
237 248
249/**
250 * ioremap_wc - map memory into CPU space write combined
251 * @offset: bus address of the memory
252 * @size: size of the resource to map
253 *
254 * This version of ioremap ensures that the memory is marked write combining.
255 * Write combining allows faster writes to some hardware devices.
256 *
257 * Must be freed with iounmap.
258 */
259void __iomem *ioremap_wc(unsigned long phys_addr, unsigned long size)
260{
261 if (pat_wc_enabled)
262 return __ioremap(phys_addr, size, _PAGE_CACHE_WC);
263 else
264 return ioremap_nocache(phys_addr, size);
265}
266EXPORT_SYMBOL(ioremap_wc);
267
238void __iomem *ioremap_cache(resource_size_t phys_addr, unsigned long size) 268void __iomem *ioremap_cache(resource_size_t phys_addr, unsigned long size)
239{ 269{
240 return __ioremap(phys_addr, size, _PAGE_CACHE_WB); 270 return __ioremap(phys_addr, size, _PAGE_CACHE_WB);