x86, VisWS: turn into generic arch, use generic mpparse code

Signed-off-by: Ingo Molnar <mingo@elte.hu>

3 files changed, 100 insertions, 93 deletions

diff --git a/arch/x86/mach-visws/Makefile b/arch/x86/mach-visws/Makefile
index 35a4c101b267..7469df1340c1 100644
--- a/arch/x86/mach-visws/Makefile
+++ b/arch/x86/mach-visws/Makefile
@@ -5,4 +5,3 @@
 obj-y                           := setup.o setup_visws.o traps.o
 
 obj-$(CONFIG_X86_VISWS_APIC)    += visws_apic.o
-obj-$(CONFIG_X86_LOCAL_APIC)    += mpparse.o
diff --git a/arch/x86/mach-visws/mpparse.c b/arch/x86/mach-visws/mpparse.c
deleted file mode 100644
index a2fb78c0d154..000000000000
--- a/arch/x86/mach-visws/mpparse.c
+++ /dev/null
@@ -1,85 +0,0 @@
-
-#include <linux/init.h>
-#include <linux/smp.h>
-
-#include <asm/smp.h>
-#include <asm/io.h>
-
-#include "cobalt.h"
-#include "mach_apic.h"
-
-extern unsigned int __cpuinitdata maxcpus;
-
-/*
- * The Visual Workstation is Intel MP compliant in the hardware
- * sense, but it doesn't have a BIOS(-configuration table).
- * No problem for Linux.
- */
-
-static void __init MP_processor_info (struct mpc_config_processor *m)
-{
-        int ver, logical_apicid;
-        physid_mask_t apic_cpus;
-
-        if (!(m->mpc_cpuflag & CPU_ENABLED))
-                return;
-
-        logical_apicid = m->mpc_apicid;
-        printk(KERN_INFO "%sCPU #%d %u:%u APIC version %d\n",
-               m->mpc_cpuflag & CPU_BOOTPROCESSOR ? "Bootup " : "",
-               m->mpc_apicid,
-               (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
-               (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
-               m->mpc_apicver);
-
-        if (m->mpc_cpuflag & CPU_BOOTPROCESSOR)
-                boot_cpu_physical_apicid = m->mpc_apicid;
-
-        ver = m->mpc_apicver;
-        if ((ver >= 0x14 && m->mpc_apicid >= 0xff) || m->mpc_apicid >= 0xf) {
-                printk(KERN_ERR "Processor #%d INVALID. (Max ID: %d).\n",
-                        m->mpc_apicid, MAX_APICS);
-                return;
-        }
-
-        apic_cpus = apicid_to_cpu_present(m->mpc_apicid);
-        physids_or(phys_cpu_present_map, phys_cpu_present_map, apic_cpus);
-        /*
-         * Validate version
-         */
-        if (ver == 0x0) {
-                printk(KERN_ERR "BIOS bug, APIC version is 0 for CPU#%d! "
-                        "fixing up to 0x10. (tell your hw vendor)\n",
-                        m->mpc_apicid);
-                ver = 0x10;
-        }
-        apic_version[m->mpc_apicid] = ver;
-}
-
-void __init find_smp_config(void)
-{
-        struct mpc_config_processor *mp = phys_to_virt(CO_CPU_TAB_PHYS);
-        unsigned short ncpus = readw(phys_to_virt(CO_CPU_NUM_PHYS));
-
-        if (ncpus > CO_CPU_MAX) {
-                printk(KERN_WARNING "find_visws_smp: got cpu count of %d at %p\n",
-                        ncpus, mp);
-
-                ncpus = CO_CPU_MAX;
-        }
-
-        if (ncpus > maxcpus)
-                ncpus = maxcpus;
-
-#ifdef CONFIG_X86_LOCAL_APIC
-        smp_found_config = 1;
-#endif
-        while (ncpus--)
-                MP_processor_info(mp++);
-
-        mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
-}
-
-void __init get_smp_config (void)
-{
-}
diff --git a/arch/x86/mach-visws/setup_visws.c b/arch/x86/mach-visws/setup_visws.c
index 659777f78269..8401208eec5c 100644
--- a/arch/x86/mach-visws/setup_visws.c
+++ b/arch/x86/mach-visws/setup_visws.c
@@ -13,12 +13,17 @@
 #include <asm/reboot.h>
 #include <asm/setup.h>
 #include <asm/e820.h>
+#include <asm/smp.h>
 #include <asm/io.h>
 
 #include <mach_ipi.h>
 
 #include "cobalt.h"
 #include "piix4.h"
+#include "mach_apic.h"
+
+#include <linux/init.h>
+#include <linux/smp.h>
 
 char visws_board_type   = -1;
 char visws_board_rev    = -1;
@@ -126,6 +131,88 @@ static void visws_machine_power_off(void)
         outl(PIIX_SPECIAL_STOP, 0xCFC);
 }
 
+static int __init visws_get_smp_config_quirk(unsigned int early)
+{
+        /*
+         * Prevent MP-table parsing by the generic code:
+         */
+        return 1;
+}
+
+extern unsigned int __cpuinitdata maxcpus;
+
+/*
+ * The Visual Workstation is Intel MP compliant in the hardware
+ * sense, but it doesn't have a BIOS(-configuration table).
+ * No problem for Linux.
+ */
+
+static void __init MP_processor_info (struct mpc_config_processor *m)
+{
+        int ver, logical_apicid;
+        physid_mask_t apic_cpus;
+
+        if (!(m->mpc_cpuflag & CPU_ENABLED))
+                return;
+
+        logical_apicid = m->mpc_apicid;
+        printk(KERN_INFO "%sCPU #%d %u:%u APIC version %d\n",
+               m->mpc_cpuflag & CPU_BOOTPROCESSOR ? "Bootup " : "",
+               m->mpc_apicid,
+               (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
+               (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
+               m->mpc_apicver);
+
+        if (m->mpc_cpuflag & CPU_BOOTPROCESSOR)
+                boot_cpu_physical_apicid = m->mpc_apicid;
+
+        ver = m->mpc_apicver;
+        if ((ver >= 0x14 && m->mpc_apicid >= 0xff) || m->mpc_apicid >= 0xf) {
+                printk(KERN_ERR "Processor #%d INVALID. (Max ID: %d).\n",
+                        m->mpc_apicid, MAX_APICS);
+                return;
+        }
+
+        apic_cpus = apicid_to_cpu_present(m->mpc_apicid);
+        physids_or(phys_cpu_present_map, phys_cpu_present_map, apic_cpus);
+        /*
+         * Validate version
+         */
+        if (ver == 0x0) {
+                printk(KERN_ERR "BIOS bug, APIC version is 0 for CPU#%d! "
+                        "fixing up to 0x10. (tell your hw vendor)\n",
+                        m->mpc_apicid);
+                ver = 0x10;
+        }
+        apic_version[m->mpc_apicid] = ver;
+}
+
+int __init visws_find_smp_config_quirk(unsigned int reserve)
+{
+        struct mpc_config_processor *mp = phys_to_virt(CO_CPU_TAB_PHYS);
+        unsigned short ncpus = readw(phys_to_virt(CO_CPU_NUM_PHYS));
+
+        if (ncpus > CO_CPU_MAX) {
+                printk(KERN_WARNING "find_visws_smp: got cpu count of %d at %p\n",
+                        ncpus, mp);
+
+                ncpus = CO_CPU_MAX;
+        }
+
+        if (ncpus > maxcpus)
+                ncpus = maxcpus;
+
+#ifdef CONFIG_X86_LOCAL_APIC
+        smp_found_config = 1;
+#endif
+        while (ncpus--)
+                MP_processor_info(mp++);
+
+        mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
+
+        return 1;
+}
+
 extern int visws_trap_init_quirk(void);
 
 void __init visws_early_detect(void)
@@ -141,21 +228,21 @@ void __init visws_early_detect(void)
         /*
          * Install special quirks for timer, interrupt and memory setup:
          */
-        arch_time_init_quirk = visws_time_init_quirk;
-        arch_pre_intr_init_quirk = visws_pre_intr_init_quirk;
-        arch_memory_setup_quirk = visws_memory_setup_quirk;
+        arch_time_init_quirk            = visws_time_init_quirk;
+        arch_pre_intr_init_quirk        = visws_pre_intr_init_quirk;
+        arch_memory_setup_quirk         = visws_memory_setup_quirk;
 
         /*
          * Fall back to generic behavior for traps:
          */
-        arch_intr_init_quirk = NULL;
-        arch_trap_init_quirk = visws_trap_init_quirk;
+        arch_intr_init_quirk            = NULL;
+        arch_trap_init_quirk            = visws_trap_init_quirk;
 
         /*
          * Install reboot quirks:
          */
-        pm_power_off = visws_machine_power_off;
-        machine_ops.emergency_restart = visws_machine_emergency_restart;
+        pm_power_off                    = visws_machine_power_off;
+        machine_ops.emergency_restart   = visws_machine_emergency_restart;
 
         /*
          * Do not use broadcast IPIs:
@@ -163,6 +250,12 @@ void __init visws_early_detect(void)
         no_broadcast = 0;
 
         /*
+         * Override generic MP-table parsing:
+         */
+        mach_get_smp_config_quirk       = visws_get_smp_config_quirk;
+        mach_find_smp_config_quirk      = visws_find_smp_config_quirk;
+
+        /*
          * Get Board rev.
          * First, we have to initialize the 307 part to allow us access
          * to the GPIO registers.  Let's map them at 0x0fc0 which is right