diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2007-10-11 05:16:38 -0400 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2007-10-11 05:16:38 -0400 |
commit | c2b84d8d1a66a0a886de51f1bfef5c4f16c0c784 (patch) | |
tree | dba8ae5777563f7df4e000725d253b7cd995bb7f /arch/x86/mach-visws/mpparse.c | |
parent | fb9aa6f1d4a1e11e66a680460b2c2b2b10b62f79 (diff) |
i386: move mach-visws
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/mach-visws/mpparse.c')
-rw-r--r-- | arch/x86/mach-visws/mpparse.c | 101 |
1 files changed, 101 insertions, 0 deletions
diff --git a/arch/x86/mach-visws/mpparse.c b/arch/x86/mach-visws/mpparse.c new file mode 100644 index 000000000000..f3c74fab8b95 --- /dev/null +++ b/arch/x86/mach-visws/mpparse.c | |||
@@ -0,0 +1,101 @@ | |||
1 | |||
2 | #include <linux/init.h> | ||
3 | #include <linux/smp.h> | ||
4 | |||
5 | #include <asm/smp.h> | ||
6 | #include <asm/io.h> | ||
7 | |||
8 | #include "cobalt.h" | ||
9 | #include "mach_apic.h" | ||
10 | |||
11 | /* Have we found an MP table */ | ||
12 | int smp_found_config; | ||
13 | |||
14 | /* | ||
15 | * Various Linux-internal data structures created from the | ||
16 | * MP-table. | ||
17 | */ | ||
18 | int apic_version [MAX_APICS]; | ||
19 | |||
20 | int pic_mode; | ||
21 | unsigned long mp_lapic_addr; | ||
22 | |||
23 | /* Processor that is doing the boot up */ | ||
24 | unsigned int boot_cpu_physical_apicid = -1U; | ||
25 | |||
26 | /* Bitmask of physically existing CPUs */ | ||
27 | physid_mask_t phys_cpu_present_map; | ||
28 | |||
29 | unsigned int __initdata maxcpus = NR_CPUS; | ||
30 | |||
31 | /* | ||
32 | * The Visual Workstation is Intel MP compliant in the hardware | ||
33 | * sense, but it doesn't have a BIOS(-configuration table). | ||
34 | * No problem for Linux. | ||
35 | */ | ||
36 | |||
37 | static void __init MP_processor_info (struct mpc_config_processor *m) | ||
38 | { | ||
39 | int ver, logical_apicid; | ||
40 | physid_mask_t apic_cpus; | ||
41 | |||
42 | if (!(m->mpc_cpuflag & CPU_ENABLED)) | ||
43 | return; | ||
44 | |||
45 | logical_apicid = m->mpc_apicid; | ||
46 | printk(KERN_INFO "%sCPU #%d %ld:%ld APIC version %d\n", | ||
47 | m->mpc_cpuflag & CPU_BOOTPROCESSOR ? "Bootup " : "", | ||
48 | m->mpc_apicid, | ||
49 | (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8, | ||
50 | (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4, | ||
51 | m->mpc_apicver); | ||
52 | |||
53 | if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) | ||
54 | boot_cpu_physical_apicid = m->mpc_apicid; | ||
55 | |||
56 | ver = m->mpc_apicver; | ||
57 | if ((ver >= 0x14 && m->mpc_apicid >= 0xff) || m->mpc_apicid >= 0xf) { | ||
58 | printk(KERN_ERR "Processor #%d INVALID. (Max ID: %d).\n", | ||
59 | m->mpc_apicid, MAX_APICS); | ||
60 | return; | ||
61 | } | ||
62 | |||
63 | apic_cpus = apicid_to_cpu_present(m->mpc_apicid); | ||
64 | physids_or(phys_cpu_present_map, phys_cpu_present_map, apic_cpus); | ||
65 | /* | ||
66 | * Validate version | ||
67 | */ | ||
68 | if (ver == 0x0) { | ||
69 | printk(KERN_ERR "BIOS bug, APIC version is 0 for CPU#%d! " | ||
70 | "fixing up to 0x10. (tell your hw vendor)\n", | ||
71 | m->mpc_apicid); | ||
72 | ver = 0x10; | ||
73 | } | ||
74 | apic_version[m->mpc_apicid] = ver; | ||
75 | } | ||
76 | |||
77 | void __init find_smp_config(void) | ||
78 | { | ||
79 | struct mpc_config_processor *mp = phys_to_virt(CO_CPU_TAB_PHYS); | ||
80 | unsigned short ncpus = readw(phys_to_virt(CO_CPU_NUM_PHYS)); | ||
81 | |||
82 | if (ncpus > CO_CPU_MAX) { | ||
83 | printk(KERN_WARNING "find_visws_smp: got cpu count of %d at %p\n", | ||
84 | ncpus, mp); | ||
85 | |||
86 | ncpus = CO_CPU_MAX; | ||
87 | } | ||
88 | |||
89 | if (ncpus > maxcpus) | ||
90 | ncpus = maxcpus; | ||
91 | |||
92 | smp_found_config = 1; | ||
93 | while (ncpus--) | ||
94 | MP_processor_info(mp++); | ||
95 | |||
96 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; | ||
97 | } | ||
98 | |||
99 | void __init get_smp_config (void) | ||
100 | { | ||
101 | } | ||