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authorH. Peter Anvin <hpa@zytor.com>2008-08-26 01:45:37 -0400
committerH. Peter Anvin <hpa@zytor.com>2008-08-26 01:45:37 -0400
commit94d4ac2f4a58c6e37876827c6688c61cef21290c (patch)
tree732f4e4794f3c116041242f69754637f75c0dd57 /arch/x86/lib
parented21763e7b0b3fb50e4efd9d4bc17ef5b035d304 (diff)
parent08970fc4e0385790a7b093adfaa4165a189f9eb0 (diff)
Merge branch 'x86/urgent' into x86/cleanups
Diffstat (limited to 'arch/x86/lib')
-rw-r--r--arch/x86/lib/msr-on-cpu.c22
1 files changed, 12 insertions, 10 deletions
diff --git a/arch/x86/lib/msr-on-cpu.c b/arch/x86/lib/msr-on-cpu.c
index d5a2b39f882b..01b868ba82f8 100644
--- a/arch/x86/lib/msr-on-cpu.c
+++ b/arch/x86/lib/msr-on-cpu.c
@@ -30,10 +30,11 @@ static int _rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h, int safe)
30 30
31 rv.msr_no = msr_no; 31 rv.msr_no = msr_no;
32 if (safe) { 32 if (safe) {
33 smp_call_function_single(cpu, __rdmsr_safe_on_cpu, &rv, 1); 33 err = smp_call_function_single(cpu, __rdmsr_safe_on_cpu,
34 err = rv.err; 34 &rv, 1);
35 err = err ? err : rv.err;
35 } else { 36 } else {
36 smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 1); 37 err = smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 1);
37 } 38 }
38 *l = rv.l; 39 *l = rv.l;
39 *h = rv.h; 40 *h = rv.h;
@@ -64,23 +65,24 @@ static int _wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h, int safe)
64 rv.l = l; 65 rv.l = l;
65 rv.h = h; 66 rv.h = h;
66 if (safe) { 67 if (safe) {
67 smp_call_function_single(cpu, __wrmsr_safe_on_cpu, &rv, 1); 68 err = smp_call_function_single(cpu, __wrmsr_safe_on_cpu,
68 err = rv.err; 69 &rv, 1);
70 err = err ? err : rv.err;
69 } else { 71 } else {
70 smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 1); 72 err = smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 1);
71 } 73 }
72 74
73 return err; 75 return err;
74} 76}
75 77
76void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) 78int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
77{ 79{
78 _wrmsr_on_cpu(cpu, msr_no, l, h, 0); 80 return _wrmsr_on_cpu(cpu, msr_no, l, h, 0);
79} 81}
80 82
81void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) 83int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
82{ 84{
83 _rdmsr_on_cpu(cpu, msr_no, l, h, 0); 85 return _rdmsr_on_cpu(cpu, msr_no, l, h, 0);
84} 86}
85 87
86/* These "safe" variants are slower and should be used when the target MSR 88/* These "safe" variants are slower and should be used when the target MSR