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authorGuillaume Thouvenin <guillaume.thouvenin@ext.bull.net>2008-09-12 07:52:18 -0400
committerAvi Kivity <avi@qumranet.com>2008-10-15 04:16:14 -0400
commitaa3a816b6d0bd59e1a9c548cc7d2dd829f26534f (patch)
tree979d3f1181f86647bab826149c141fa1d28c8e92 /arch/x86/kvm
parent8a9fee67fba585b4c4731a749367e1751ebf416c (diff)
KVM: x86 emulator: Use DstAcc for 'and'
For instruction 'and al,imm' we use DstAcc instead of doing the emulation directly into the instruction's opcode. Signed-off-by: Guillaume Thouvenin <guillaume.thouvenin@ext.bull.net> Signed-off-by: Avi Kivity <avi@qumranet.com>
Diffstat (limited to 'arch/x86/kvm')
-rw-r--r--arch/x86/kvm/x86_emulate.c21
1 files changed, 2 insertions, 19 deletions
diff --git a/arch/x86/kvm/x86_emulate.c b/arch/x86/kvm/x86_emulate.c
index 2b43208a38bc..ea051173b0da 100644
--- a/arch/x86/kvm/x86_emulate.c
+++ b/arch/x86/kvm/x86_emulate.c
@@ -96,7 +96,7 @@ static u16 opcode_table[256] = {
96 /* 0x20 - 0x27 */ 96 /* 0x20 - 0x27 */
97 ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM, 97 ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
98 ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM, 98 ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
99 SrcImmByte, SrcImm, 0, 0, 99 DstAcc | SrcImmByte, DstAcc | SrcImm, 0, 0,
100 /* 0x28 - 0x2F */ 100 /* 0x28 - 0x2F */
101 ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM, 101 ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
102 ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM, 102 ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
@@ -1392,27 +1392,10 @@ special_insn:
1392 sbb: /* sbb */ 1392 sbb: /* sbb */
1393 emulate_2op_SrcV("sbb", c->src, c->dst, ctxt->eflags); 1393 emulate_2op_SrcV("sbb", c->src, c->dst, ctxt->eflags);
1394 break; 1394 break;
1395 case 0x20 ... 0x23: 1395 case 0x20 ... 0x25:
1396 and: /* and */ 1396 and: /* and */
1397 emulate_2op_SrcV("and", c->src, c->dst, ctxt->eflags); 1397 emulate_2op_SrcV("and", c->src, c->dst, ctxt->eflags);
1398 break; 1398 break;
1399 case 0x24: /* and al imm8 */
1400 c->dst.type = OP_REG;
1401 c->dst.ptr = &c->regs[VCPU_REGS_RAX];
1402 c->dst.val = *(u8 *)c->dst.ptr;
1403 c->dst.bytes = 1;
1404 c->dst.orig_val = c->dst.val;
1405 goto and;
1406 case 0x25: /* and ax imm16, or eax imm32 */
1407 c->dst.type = OP_REG;
1408 c->dst.bytes = c->op_bytes;
1409 c->dst.ptr = &c->regs[VCPU_REGS_RAX];
1410 if (c->op_bytes == 2)
1411 c->dst.val = *(u16 *)c->dst.ptr;
1412 else
1413 c->dst.val = *(u32 *)c->dst.ptr;
1414 c->dst.orig_val = c->dst.val;
1415 goto and;
1416 case 0x28 ... 0x2d: 1399 case 0x28 ... 0x2d:
1417 sub: /* sub */ 1400 sub: /* sub */
1418 emulate_2op_SrcV("sub", c->src, c->dst, ctxt->eflags); 1401 emulate_2op_SrcV("sub", c->src, c->dst, ctxt->eflags);