Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull second round of KVM changes from Paolo Bonzini:
 "Here are the PPC and ARM changes for KVM, which I separated because
  they had small conflicts (respectively within KVM documentation, and
  with 3.16-rc changes).  Since they were all within the subsystem, I
  took care of them.

  Stephen Rothwell reported some snags in PPC builds, but they are all
  fixed now; the latest linux-next report was clean.

  New features for ARM include:
   - KVM VGIC v2 emulation on GICv3 hardware
   - Big-Endian support for arm/arm64 (guest and host)
   - Debug Architecture support for arm64 (arm32 is on Christoffer's todo list)

  And for PPC:
   - Book3S: Good number of LE host fixes, enable HV on LE
   - Book3S HV: Add in-guest debug support

  This release drops support for KVM on the PPC440.  As a result, the
  PPC merge removes more lines than it adds.  :)

  I also included an x86 change, since Davidlohr tied it to an
  independent bug report and the reporter quickly provided a Tested-by;
  there was no reason to wait for -rc2"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (122 commits)
  KVM: Move more code under CONFIG_HAVE_KVM_IRQFD
  KVM: nVMX: fix "acknowledge interrupt on exit" when APICv is in use
  KVM: nVMX: Fix nested vmexit ack intr before load vmcs01
  KVM: PPC: Enable IRQFD support for the XICS interrupt controller
  KVM: Give IRQFD its own separate enabling Kconfig option
  KVM: Move irq notifier implementation into eventfd.c
  KVM: Move all accesses to kvm::irq_routing into irqchip.c
  KVM: irqchip: Provide and use accessors for irq routing table
  KVM: Don't keep reference to irq routing table in irqfd struct
  KVM: PPC: drop duplicate tracepoint
  arm64: KVM: fix 64bit CP15 VM access for 32bit guests
  KVM: arm64: GICv3: mandate page-aligned GICV region
  arm64: KVM: GICv3: move system register access to msr_s/mrs_s
  KVM: PPC: PR: Handle FSCR feature deselects
  KVM: PPC: HV: Remove generic instruction emulation
  KVM: PPC: BOOKEHV: rename e500hv_spr to bookehv_spr
  KVM: PPC: Remove DCR handling
  KVM: PPC: Expose helper functions for data/inst faults
  KVM: PPC: Separate loadstore emulation from priv emulation
  KVM: PPC: Handle magic page in kvmppc_ld/st
  ...

5 files changed, 44 insertions, 17 deletions

diff --git a/arch/x86/kvm/Kconfig b/arch/x86/kvm/Kconfig
index 287e4c85fff9..f9d16ff56c6b 100644
--- a/arch/x86/kvm/Kconfig
+++ b/arch/x86/kvm/Kconfig
@@ -27,6 +27,7 @@ config KVM
         select MMU_NOTIFIER
         select ANON_INODES
         select HAVE_KVM_IRQCHIP
+        select HAVE_KVM_IRQFD
         select HAVE_KVM_IRQ_ROUTING
         select HAVE_KVM_EVENTFD
         select KVM_APIC_ARCHITECTURE
diff --git a/arch/x86/kvm/irq.c b/arch/x86/kvm/irq.c
index bd0da433e6d7..a1ec6a50a05a 100644
--- a/arch/x86/kvm/irq.c
+++ b/arch/x86/kvm/irq.c
@@ -108,7 +108,7 @@ int kvm_cpu_get_interrupt(struct kvm_vcpu *v)
 
         vector = kvm_cpu_get_extint(v);
 
-        if (kvm_apic_vid_enabled(v->kvm) || vector != -1)
+        if (vector != -1)
                 return vector;                  /* PIC */
 
         return kvm_get_apic_interrupt(v);       /* APIC */
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 3855103f71fd..08e8a899e005 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -352,25 +352,46 @@ static inline int apic_find_highest_irr(struct kvm_lapic *apic)
 
 static inline void apic_clear_irr(int vec, struct kvm_lapic *apic)
 {
-        apic->irr_pending = false;
+        struct kvm_vcpu *vcpu;
+
+        vcpu = apic->vcpu;
+
         apic_clear_vector(vec, apic->regs + APIC_IRR);
-        if (apic_search_irr(apic) != -1)
-                apic->irr_pending = true;
+        if (unlikely(kvm_apic_vid_enabled(vcpu->kvm)))
+                /* try to update RVI */
+                kvm_make_request(KVM_REQ_EVENT, vcpu);
+        else {
+                vec = apic_search_irr(apic);
+                apic->irr_pending = (vec != -1);
+        }
 }
 
 static inline void apic_set_isr(int vec, struct kvm_lapic *apic)
 {
-        /* Note that we never get here with APIC virtualization enabled.  */
+        struct kvm_vcpu *vcpu;
+
+        if (__apic_test_and_set_vector(vec, apic->regs + APIC_ISR))
+                return;
+
+        vcpu = apic->vcpu;
 
-        if (!__apic_test_and_set_vector(vec, apic->regs + APIC_ISR))
-                ++apic->isr_count;
-        BUG_ON(apic->isr_count > MAX_APIC_VECTOR);
         /*
-         * ISR (in service register) bit is set when injecting an interrupt.
-         * The highest vector is injected. Thus the latest bit set matches
-         * the highest bit in ISR.
+         * With APIC virtualization enabled, all caching is disabled
+         * because the processor can modify ISR under the hood.  Instead
+         * just set SVI.
          */
-        apic->highest_isr_cache = vec;
+        if (unlikely(kvm_apic_vid_enabled(vcpu->kvm)))
+                kvm_x86_ops->hwapic_isr_update(vcpu->kvm, vec);
+        else {
+                ++apic->isr_count;
+                BUG_ON(apic->isr_count > MAX_APIC_VECTOR);
+                /*
+                 * ISR (in service register) bit is set when injecting an interrupt.
+                 * The highest vector is injected. Thus the latest bit set matches
+                 * the highest bit in ISR.
+                 */
+                apic->highest_isr_cache = vec;
+        }
 }
 
 static inline int apic_find_highest_isr(struct kvm_lapic *apic)
@@ -1627,11 +1648,16 @@ int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu)
         int vector = kvm_apic_has_interrupt(vcpu);
         struct kvm_lapic *apic = vcpu->arch.apic;
 
-        /* Note that we never get here with APIC virtualization enabled.  */
-
         if (vector == -1)
                 return -1;
 
+        /*
+         * We get here even with APIC virtualization enabled, if doing
+         * nested virtualization and L1 runs with the "acknowledge interrupt
+         * on exit" mode.  Then we cannot inject the interrupt via RVI,
+         * because the process would deliver it through the IDT.
+         */
+
         apic_set_isr(vector, apic);
         apic_update_ppr(apic);
         apic_clear_irr(vector, apic);
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index e618f34bde2d..bfe11cf124a1 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -8754,6 +8754,8 @@ static void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 exit_reason,
         prepare_vmcs12(vcpu, vmcs12, exit_reason, exit_intr_info,
                        exit_qualification);
 
+        vmx_load_vmcs01(vcpu);
+
         if ((exit_reason == EXIT_REASON_EXTERNAL_INTERRUPT)
             && nested_exit_intr_ack_set(vcpu)) {
                 int irq = kvm_cpu_get_interrupt(vcpu);
@@ -8769,8 +8771,6 @@ static void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 exit_reason,
                                        vmcs12->vm_exit_intr_error_code,
                                        KVM_ISA_VMX);
 
-        vmx_load_vmcs01(vcpu);
-
         vm_entry_controls_init(vmx, vmcs_read32(VM_ENTRY_CONTROLS));
         vm_exit_controls_init(vmx, vmcs_read32(VM_EXIT_CONTROLS));
         vmx_segment_cache_clear(vmx);
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index ca3d760dd581..8f1e22d3b286 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -2636,7 +2636,7 @@ out:
         return r;
 }
 
-int kvm_dev_ioctl_check_extension(long ext)
+int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
 {
         int r;