diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-17 21:40:35 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-17 21:40:35 -0400 |
commit | ec0afc9311adcfb10b90e547c23250f63939f990 (patch) | |
tree | 2093d2668898a8a03f30acbfd5568e65b8c086b9 /arch/x86/kvm/x86.c | |
parent | 804f18536984939622ddca60ab6b25743e0ec68d (diff) | |
parent | 776e58ea3d3735f85678155398241d2513afa67a (diff) |
Merge branch 'kvm-updates/2.6.39' of git://git.kernel.org/pub/scm/virt/kvm/kvm
* 'kvm-updates/2.6.39' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (55 commits)
KVM: unbreak userspace that does not sets tss address
KVM: MMU: cleanup pte write path
KVM: MMU: introduce a common function to get no-dirty-logged slot
KVM: fix rcu usage in init_rmode_* functions
KVM: fix kvmclock regression due to missing clock update
KVM: emulator: Fix permission checking in io permission bitmap
KVM: emulator: Fix io permission checking for 64bit guest
KVM: SVM: Load %gs earlier if CONFIG_X86_32_LAZY_GS=n
KVM: x86: Remove useless regs_page pointer from kvm_lapic
KVM: improve comment on rcu use in irqfd_deassign
KVM: MMU: remove unused macros
KVM: MMU: cleanup page alloc and free
KVM: MMU: do not record gfn in kvm_mmu_pte_write
KVM: MMU: move mmu pages calculated out of mmu lock
KVM: MMU: set spte accessed bit properly
KVM: MMU: fix kvm_mmu_slot_remove_write_access dropping intermediate W bits
KVM: Start lock documentation
KVM: better readability of efer_reserved_bits
KVM: Clear async page fault hash after switching to real mode
KVM: VMX: Initialize vm86 TSS only once.
...
Diffstat (limited to 'arch/x86/kvm/x86.c')
-rw-r--r-- | arch/x86/kvm/x86.c | 153 |
1 files changed, 81 insertions, 72 deletions
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index bcc0efce85bf..f1e4025f1ae2 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c | |||
@@ -81,9 +81,10 @@ | |||
81 | * - enable LME and LMA per default on 64 bit KVM | 81 | * - enable LME and LMA per default on 64 bit KVM |
82 | */ | 82 | */ |
83 | #ifdef CONFIG_X86_64 | 83 | #ifdef CONFIG_X86_64 |
84 | static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL; | 84 | static |
85 | u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA)); | ||
85 | #else | 86 | #else |
86 | static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL; | 87 | static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE); |
87 | #endif | 88 | #endif |
88 | 89 | ||
89 | #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM | 90 | #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM |
@@ -360,8 +361,8 @@ void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault) | |||
360 | 361 | ||
361 | void kvm_inject_nmi(struct kvm_vcpu *vcpu) | 362 | void kvm_inject_nmi(struct kvm_vcpu *vcpu) |
362 | { | 363 | { |
364 | kvm_make_request(KVM_REQ_NMI, vcpu); | ||
363 | kvm_make_request(KVM_REQ_EVENT, vcpu); | 365 | kvm_make_request(KVM_REQ_EVENT, vcpu); |
364 | vcpu->arch.nmi_pending = 1; | ||
365 | } | 366 | } |
366 | EXPORT_SYMBOL_GPL(kvm_inject_nmi); | 367 | EXPORT_SYMBOL_GPL(kvm_inject_nmi); |
367 | 368 | ||
@@ -525,8 +526,10 @@ int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) | |||
525 | 526 | ||
526 | kvm_x86_ops->set_cr0(vcpu, cr0); | 527 | kvm_x86_ops->set_cr0(vcpu, cr0); |
527 | 528 | ||
528 | if ((cr0 ^ old_cr0) & X86_CR0_PG) | 529 | if ((cr0 ^ old_cr0) & X86_CR0_PG) { |
529 | kvm_clear_async_pf_completion_queue(vcpu); | 530 | kvm_clear_async_pf_completion_queue(vcpu); |
531 | kvm_async_pf_hash_reset(vcpu); | ||
532 | } | ||
530 | 533 | ||
531 | if ((cr0 ^ old_cr0) & update_bits) | 534 | if ((cr0 ^ old_cr0) & update_bits) |
532 | kvm_mmu_reset_context(vcpu); | 535 | kvm_mmu_reset_context(vcpu); |
@@ -1017,7 +1020,7 @@ void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data) | |||
1017 | unsigned long flags; | 1020 | unsigned long flags; |
1018 | s64 sdiff; | 1021 | s64 sdiff; |
1019 | 1022 | ||
1020 | spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags); | 1023 | raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags); |
1021 | offset = data - native_read_tsc(); | 1024 | offset = data - native_read_tsc(); |
1022 | ns = get_kernel_ns(); | 1025 | ns = get_kernel_ns(); |
1023 | elapsed = ns - kvm->arch.last_tsc_nsec; | 1026 | elapsed = ns - kvm->arch.last_tsc_nsec; |
@@ -1050,7 +1053,7 @@ void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data) | |||
1050 | kvm->arch.last_tsc_write = data; | 1053 | kvm->arch.last_tsc_write = data; |
1051 | kvm->arch.last_tsc_offset = offset; | 1054 | kvm->arch.last_tsc_offset = offset; |
1052 | kvm_x86_ops->write_tsc_offset(vcpu, offset); | 1055 | kvm_x86_ops->write_tsc_offset(vcpu, offset); |
1053 | spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags); | 1056 | raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags); |
1054 | 1057 | ||
1055 | /* Reset of TSC must disable overshoot protection below */ | 1058 | /* Reset of TSC must disable overshoot protection below */ |
1056 | vcpu->arch.hv_clock.tsc_timestamp = 0; | 1059 | vcpu->arch.hv_clock.tsc_timestamp = 0; |
@@ -1453,6 +1456,14 @@ static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data) | |||
1453 | return 0; | 1456 | return 0; |
1454 | } | 1457 | } |
1455 | 1458 | ||
1459 | static void kvmclock_reset(struct kvm_vcpu *vcpu) | ||
1460 | { | ||
1461 | if (vcpu->arch.time_page) { | ||
1462 | kvm_release_page_dirty(vcpu->arch.time_page); | ||
1463 | vcpu->arch.time_page = NULL; | ||
1464 | } | ||
1465 | } | ||
1466 | |||
1456 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) | 1467 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) |
1457 | { | 1468 | { |
1458 | switch (msr) { | 1469 | switch (msr) { |
@@ -1510,10 +1521,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) | |||
1510 | break; | 1521 | break; |
1511 | case MSR_KVM_SYSTEM_TIME_NEW: | 1522 | case MSR_KVM_SYSTEM_TIME_NEW: |
1512 | case MSR_KVM_SYSTEM_TIME: { | 1523 | case MSR_KVM_SYSTEM_TIME: { |
1513 | if (vcpu->arch.time_page) { | 1524 | kvmclock_reset(vcpu); |
1514 | kvm_release_page_dirty(vcpu->arch.time_page); | ||
1515 | vcpu->arch.time_page = NULL; | ||
1516 | } | ||
1517 | 1525 | ||
1518 | vcpu->arch.time = data; | 1526 | vcpu->arch.time = data; |
1519 | kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu); | 1527 | kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu); |
@@ -1592,6 +1600,12 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) | |||
1592 | } else | 1600 | } else |
1593 | return set_msr_hyperv(vcpu, msr, data); | 1601 | return set_msr_hyperv(vcpu, msr, data); |
1594 | break; | 1602 | break; |
1603 | case MSR_IA32_BBL_CR_CTL3: | ||
1604 | /* Drop writes to this legacy MSR -- see rdmsr | ||
1605 | * counterpart for further detail. | ||
1606 | */ | ||
1607 | pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data); | ||
1608 | break; | ||
1595 | default: | 1609 | default: |
1596 | if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr)) | 1610 | if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr)) |
1597 | return xen_hvm_config(vcpu, data); | 1611 | return xen_hvm_config(vcpu, data); |
@@ -1846,6 +1860,19 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) | |||
1846 | } else | 1860 | } else |
1847 | return get_msr_hyperv(vcpu, msr, pdata); | 1861 | return get_msr_hyperv(vcpu, msr, pdata); |
1848 | break; | 1862 | break; |
1863 | case MSR_IA32_BBL_CR_CTL3: | ||
1864 | /* This legacy MSR exists but isn't fully documented in current | ||
1865 | * silicon. It is however accessed by winxp in very narrow | ||
1866 | * scenarios where it sets bit #19, itself documented as | ||
1867 | * a "reserved" bit. Best effort attempt to source coherent | ||
1868 | * read data here should the balance of the register be | ||
1869 | * interpreted by the guest: | ||
1870 | * | ||
1871 | * L2 cache control register 3: 64GB range, 256KB size, | ||
1872 | * enabled, latency 0x1, configured | ||
1873 | */ | ||
1874 | data = 0xbe702111; | ||
1875 | break; | ||
1849 | default: | 1876 | default: |
1850 | if (!ignore_msrs) { | 1877 | if (!ignore_msrs) { |
1851 | pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr); | 1878 | pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr); |
@@ -2100,8 +2127,8 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) | |||
2100 | if (check_tsc_unstable()) { | 2127 | if (check_tsc_unstable()) { |
2101 | kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta); | 2128 | kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta); |
2102 | vcpu->arch.tsc_catchup = 1; | 2129 | vcpu->arch.tsc_catchup = 1; |
2103 | kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu); | ||
2104 | } | 2130 | } |
2131 | kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu); | ||
2105 | if (vcpu->cpu != cpu) | 2132 | if (vcpu->cpu != cpu) |
2106 | kvm_migrate_timers(vcpu); | 2133 | kvm_migrate_timers(vcpu); |
2107 | vcpu->cpu = cpu; | 2134 | vcpu->cpu = cpu; |
@@ -2575,9 +2602,6 @@ static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu, | |||
2575 | if (mce->status & MCI_STATUS_UC) { | 2602 | if (mce->status & MCI_STATUS_UC) { |
2576 | if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) || | 2603 | if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) || |
2577 | !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) { | 2604 | !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) { |
2578 | printk(KERN_DEBUG "kvm: set_mce: " | ||
2579 | "injects mce exception while " | ||
2580 | "previous one is in progress!\n"); | ||
2581 | kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu); | 2605 | kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu); |
2582 | return 0; | 2606 | return 0; |
2583 | } | 2607 | } |
@@ -2648,8 +2672,6 @@ static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu, | |||
2648 | vcpu->arch.interrupt.pending = events->interrupt.injected; | 2672 | vcpu->arch.interrupt.pending = events->interrupt.injected; |
2649 | vcpu->arch.interrupt.nr = events->interrupt.nr; | 2673 | vcpu->arch.interrupt.nr = events->interrupt.nr; |
2650 | vcpu->arch.interrupt.soft = events->interrupt.soft; | 2674 | vcpu->arch.interrupt.soft = events->interrupt.soft; |
2651 | if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm)) | ||
2652 | kvm_pic_clear_isr_ack(vcpu->kvm); | ||
2653 | if (events->flags & KVM_VCPUEVENT_VALID_SHADOW) | 2675 | if (events->flags & KVM_VCPUEVENT_VALID_SHADOW) |
2654 | kvm_x86_ops->set_interrupt_shadow(vcpu, | 2676 | kvm_x86_ops->set_interrupt_shadow(vcpu, |
2655 | events->interrupt.shadow); | 2677 | events->interrupt.shadow); |
@@ -4140,8 +4162,8 @@ static unsigned long emulator_get_cached_segment_base(int seg, | |||
4140 | return get_segment_base(vcpu, seg); | 4162 | return get_segment_base(vcpu, seg); |
4141 | } | 4163 | } |
4142 | 4164 | ||
4143 | static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg, | 4165 | static bool emulator_get_cached_descriptor(struct desc_struct *desc, u32 *base3, |
4144 | struct kvm_vcpu *vcpu) | 4166 | int seg, struct kvm_vcpu *vcpu) |
4145 | { | 4167 | { |
4146 | struct kvm_segment var; | 4168 | struct kvm_segment var; |
4147 | 4169 | ||
@@ -4154,6 +4176,10 @@ static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg, | |||
4154 | var.limit >>= 12; | 4176 | var.limit >>= 12; |
4155 | set_desc_limit(desc, var.limit); | 4177 | set_desc_limit(desc, var.limit); |
4156 | set_desc_base(desc, (unsigned long)var.base); | 4178 | set_desc_base(desc, (unsigned long)var.base); |
4179 | #ifdef CONFIG_X86_64 | ||
4180 | if (base3) | ||
4181 | *base3 = var.base >> 32; | ||
4182 | #endif | ||
4157 | desc->type = var.type; | 4183 | desc->type = var.type; |
4158 | desc->s = var.s; | 4184 | desc->s = var.s; |
4159 | desc->dpl = var.dpl; | 4185 | desc->dpl = var.dpl; |
@@ -4166,8 +4192,8 @@ static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg, | |||
4166 | return true; | 4192 | return true; |
4167 | } | 4193 | } |
4168 | 4194 | ||
4169 | static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg, | 4195 | static void emulator_set_cached_descriptor(struct desc_struct *desc, u32 base3, |
4170 | struct kvm_vcpu *vcpu) | 4196 | int seg, struct kvm_vcpu *vcpu) |
4171 | { | 4197 | { |
4172 | struct kvm_segment var; | 4198 | struct kvm_segment var; |
4173 | 4199 | ||
@@ -4175,6 +4201,9 @@ static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg, | |||
4175 | kvm_get_segment(vcpu, &var, seg); | 4201 | kvm_get_segment(vcpu, &var, seg); |
4176 | 4202 | ||
4177 | var.base = get_desc_base(desc); | 4203 | var.base = get_desc_base(desc); |
4204 | #ifdef CONFIG_X86_64 | ||
4205 | var.base |= ((u64)base3) << 32; | ||
4206 | #endif | ||
4178 | var.limit = get_desc_limit(desc); | 4207 | var.limit = get_desc_limit(desc); |
4179 | if (desc->g) | 4208 | if (desc->g) |
4180 | var.limit = (var.limit << 12) | 0xfff; | 4209 | var.limit = (var.limit << 12) | 0xfff; |
@@ -4390,41 +4419,16 @@ int x86_emulate_instruction(struct kvm_vcpu *vcpu, | |||
4390 | vcpu->arch.emulate_ctxt.have_exception = false; | 4419 | vcpu->arch.emulate_ctxt.have_exception = false; |
4391 | vcpu->arch.emulate_ctxt.perm_ok = false; | 4420 | vcpu->arch.emulate_ctxt.perm_ok = false; |
4392 | 4421 | ||
4422 | vcpu->arch.emulate_ctxt.only_vendor_specific_insn | ||
4423 | = emulation_type & EMULTYPE_TRAP_UD; | ||
4424 | |||
4393 | r = x86_decode_insn(&vcpu->arch.emulate_ctxt, insn, insn_len); | 4425 | r = x86_decode_insn(&vcpu->arch.emulate_ctxt, insn, insn_len); |
4394 | if (r == X86EMUL_PROPAGATE_FAULT) | ||
4395 | goto done; | ||
4396 | 4426 | ||
4397 | trace_kvm_emulate_insn_start(vcpu); | 4427 | trace_kvm_emulate_insn_start(vcpu); |
4398 | |||
4399 | /* Only allow emulation of specific instructions on #UD | ||
4400 | * (namely VMMCALL, sysenter, sysexit, syscall)*/ | ||
4401 | if (emulation_type & EMULTYPE_TRAP_UD) { | ||
4402 | if (!c->twobyte) | ||
4403 | return EMULATE_FAIL; | ||
4404 | switch (c->b) { | ||
4405 | case 0x01: /* VMMCALL */ | ||
4406 | if (c->modrm_mod != 3 || c->modrm_rm != 1) | ||
4407 | return EMULATE_FAIL; | ||
4408 | break; | ||
4409 | case 0x34: /* sysenter */ | ||
4410 | case 0x35: /* sysexit */ | ||
4411 | if (c->modrm_mod != 0 || c->modrm_rm != 0) | ||
4412 | return EMULATE_FAIL; | ||
4413 | break; | ||
4414 | case 0x05: /* syscall */ | ||
4415 | if (c->modrm_mod != 0 || c->modrm_rm != 0) | ||
4416 | return EMULATE_FAIL; | ||
4417 | break; | ||
4418 | default: | ||
4419 | return EMULATE_FAIL; | ||
4420 | } | ||
4421 | |||
4422 | if (!(c->modrm_reg == 0 || c->modrm_reg == 3)) | ||
4423 | return EMULATE_FAIL; | ||
4424 | } | ||
4425 | |||
4426 | ++vcpu->stat.insn_emulation; | 4428 | ++vcpu->stat.insn_emulation; |
4427 | if (r) { | 4429 | if (r) { |
4430 | if (emulation_type & EMULTYPE_TRAP_UD) | ||
4431 | return EMULATE_FAIL; | ||
4428 | if (reexecute_instruction(vcpu, cr2)) | 4432 | if (reexecute_instruction(vcpu, cr2)) |
4429 | return EMULATE_DONE; | 4433 | return EMULATE_DONE; |
4430 | if (emulation_type & EMULTYPE_SKIP) | 4434 | if (emulation_type & EMULTYPE_SKIP) |
@@ -4452,7 +4456,6 @@ restart: | |||
4452 | return handle_emulation_failure(vcpu); | 4456 | return handle_emulation_failure(vcpu); |
4453 | } | 4457 | } |
4454 | 4458 | ||
4455 | done: | ||
4456 | if (vcpu->arch.emulate_ctxt.have_exception) { | 4459 | if (vcpu->arch.emulate_ctxt.have_exception) { |
4457 | inject_emulated_exception(vcpu); | 4460 | inject_emulated_exception(vcpu); |
4458 | r = EMULATE_DONE; | 4461 | r = EMULATE_DONE; |
@@ -4562,7 +4565,7 @@ static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long va | |||
4562 | 4565 | ||
4563 | smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1); | 4566 | smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1); |
4564 | 4567 | ||
4565 | spin_lock(&kvm_lock); | 4568 | raw_spin_lock(&kvm_lock); |
4566 | list_for_each_entry(kvm, &vm_list, vm_list) { | 4569 | list_for_each_entry(kvm, &vm_list, vm_list) { |
4567 | kvm_for_each_vcpu(i, vcpu, kvm) { | 4570 | kvm_for_each_vcpu(i, vcpu, kvm) { |
4568 | if (vcpu->cpu != freq->cpu) | 4571 | if (vcpu->cpu != freq->cpu) |
@@ -4572,7 +4575,7 @@ static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long va | |||
4572 | send_ipi = 1; | 4575 | send_ipi = 1; |
4573 | } | 4576 | } |
4574 | } | 4577 | } |
4575 | spin_unlock(&kvm_lock); | 4578 | raw_spin_unlock(&kvm_lock); |
4576 | 4579 | ||
4577 | if (freq->old < freq->new && send_ipi) { | 4580 | if (freq->old < freq->new && send_ipi) { |
4578 | /* | 4581 | /* |
@@ -5185,6 +5188,8 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu) | |||
5185 | r = 1; | 5188 | r = 1; |
5186 | goto out; | 5189 | goto out; |
5187 | } | 5190 | } |
5191 | if (kvm_check_request(KVM_REQ_NMI, vcpu)) | ||
5192 | vcpu->arch.nmi_pending = true; | ||
5188 | } | 5193 | } |
5189 | 5194 | ||
5190 | r = kvm_mmu_reload(vcpu); | 5195 | r = kvm_mmu_reload(vcpu); |
@@ -5213,14 +5218,18 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu) | |||
5213 | kvm_load_guest_fpu(vcpu); | 5218 | kvm_load_guest_fpu(vcpu); |
5214 | kvm_load_guest_xcr0(vcpu); | 5219 | kvm_load_guest_xcr0(vcpu); |
5215 | 5220 | ||
5216 | atomic_set(&vcpu->guest_mode, 1); | 5221 | vcpu->mode = IN_GUEST_MODE; |
5217 | smp_wmb(); | 5222 | |
5223 | /* We should set ->mode before check ->requests, | ||
5224 | * see the comment in make_all_cpus_request. | ||
5225 | */ | ||
5226 | smp_mb(); | ||
5218 | 5227 | ||
5219 | local_irq_disable(); | 5228 | local_irq_disable(); |
5220 | 5229 | ||
5221 | if (!atomic_read(&vcpu->guest_mode) || vcpu->requests | 5230 | if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests |
5222 | || need_resched() || signal_pending(current)) { | 5231 | || need_resched() || signal_pending(current)) { |
5223 | atomic_set(&vcpu->guest_mode, 0); | 5232 | vcpu->mode = OUTSIDE_GUEST_MODE; |
5224 | smp_wmb(); | 5233 | smp_wmb(); |
5225 | local_irq_enable(); | 5234 | local_irq_enable(); |
5226 | preempt_enable(); | 5235 | preempt_enable(); |
@@ -5256,7 +5265,7 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu) | |||
5256 | 5265 | ||
5257 | kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc); | 5266 | kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc); |
5258 | 5267 | ||
5259 | atomic_set(&vcpu->guest_mode, 0); | 5268 | vcpu->mode = OUTSIDE_GUEST_MODE; |
5260 | smp_wmb(); | 5269 | smp_wmb(); |
5261 | local_irq_enable(); | 5270 | local_irq_enable(); |
5262 | 5271 | ||
@@ -5574,7 +5583,7 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, | |||
5574 | struct kvm_sregs *sregs) | 5583 | struct kvm_sregs *sregs) |
5575 | { | 5584 | { |
5576 | int mmu_reset_needed = 0; | 5585 | int mmu_reset_needed = 0; |
5577 | int pending_vec, max_bits; | 5586 | int pending_vec, max_bits, idx; |
5578 | struct desc_ptr dt; | 5587 | struct desc_ptr dt; |
5579 | 5588 | ||
5580 | dt.size = sregs->idt.limit; | 5589 | dt.size = sregs->idt.limit; |
@@ -5603,10 +5612,13 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, | |||
5603 | kvm_x86_ops->set_cr4(vcpu, sregs->cr4); | 5612 | kvm_x86_ops->set_cr4(vcpu, sregs->cr4); |
5604 | if (sregs->cr4 & X86_CR4_OSXSAVE) | 5613 | if (sregs->cr4 & X86_CR4_OSXSAVE) |
5605 | update_cpuid(vcpu); | 5614 | update_cpuid(vcpu); |
5615 | |||
5616 | idx = srcu_read_lock(&vcpu->kvm->srcu); | ||
5606 | if (!is_long_mode(vcpu) && is_pae(vcpu)) { | 5617 | if (!is_long_mode(vcpu) && is_pae(vcpu)) { |
5607 | load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)); | 5618 | load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)); |
5608 | mmu_reset_needed = 1; | 5619 | mmu_reset_needed = 1; |
5609 | } | 5620 | } |
5621 | srcu_read_unlock(&vcpu->kvm->srcu, idx); | ||
5610 | 5622 | ||
5611 | if (mmu_reset_needed) | 5623 | if (mmu_reset_needed) |
5612 | kvm_mmu_reset_context(vcpu); | 5624 | kvm_mmu_reset_context(vcpu); |
@@ -5617,8 +5629,6 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, | |||
5617 | if (pending_vec < max_bits) { | 5629 | if (pending_vec < max_bits) { |
5618 | kvm_queue_interrupt(vcpu, pending_vec, false); | 5630 | kvm_queue_interrupt(vcpu, pending_vec, false); |
5619 | pr_debug("Set back pending irq %d\n", pending_vec); | 5631 | pr_debug("Set back pending irq %d\n", pending_vec); |
5620 | if (irqchip_in_kernel(vcpu->kvm)) | ||
5621 | kvm_pic_clear_isr_ack(vcpu->kvm); | ||
5622 | } | 5632 | } |
5623 | 5633 | ||
5624 | kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS); | 5634 | kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS); |
@@ -5814,10 +5824,7 @@ void kvm_put_guest_fpu(struct kvm_vcpu *vcpu) | |||
5814 | 5824 | ||
5815 | void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu) | 5825 | void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu) |
5816 | { | 5826 | { |
5817 | if (vcpu->arch.time_page) { | 5827 | kvmclock_reset(vcpu); |
5818 | kvm_release_page_dirty(vcpu->arch.time_page); | ||
5819 | vcpu->arch.time_page = NULL; | ||
5820 | } | ||
5821 | 5828 | ||
5822 | free_cpumask_var(vcpu->arch.wbinvd_dirty_mask); | 5829 | free_cpumask_var(vcpu->arch.wbinvd_dirty_mask); |
5823 | fx_free(vcpu); | 5830 | fx_free(vcpu); |
@@ -5878,6 +5885,8 @@ int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu) | |||
5878 | kvm_make_request(KVM_REQ_EVENT, vcpu); | 5885 | kvm_make_request(KVM_REQ_EVENT, vcpu); |
5879 | vcpu->arch.apf.msr_val = 0; | 5886 | vcpu->arch.apf.msr_val = 0; |
5880 | 5887 | ||
5888 | kvmclock_reset(vcpu); | ||
5889 | |||
5881 | kvm_clear_async_pf_completion_queue(vcpu); | 5890 | kvm_clear_async_pf_completion_queue(vcpu); |
5882 | kvm_async_pf_hash_reset(vcpu); | 5891 | kvm_async_pf_hash_reset(vcpu); |
5883 | vcpu->arch.apf.halted = false; | 5892 | vcpu->arch.apf.halted = false; |
@@ -6005,7 +6014,7 @@ int kvm_arch_init_vm(struct kvm *kvm) | |||
6005 | /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */ | 6014 | /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */ |
6006 | set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap); | 6015 | set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap); |
6007 | 6016 | ||
6008 | spin_lock_init(&kvm->arch.tsc_write_lock); | 6017 | raw_spin_lock_init(&kvm->arch.tsc_write_lock); |
6009 | 6018 | ||
6010 | return 0; | 6019 | return 0; |
6011 | } | 6020 | } |
@@ -6103,7 +6112,7 @@ void kvm_arch_commit_memory_region(struct kvm *kvm, | |||
6103 | int user_alloc) | 6112 | int user_alloc) |
6104 | { | 6113 | { |
6105 | 6114 | ||
6106 | int npages = mem->memory_size >> PAGE_SHIFT; | 6115 | int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT; |
6107 | 6116 | ||
6108 | if (!user_alloc && !old.user_alloc && old.rmap && !npages) { | 6117 | if (!user_alloc && !old.user_alloc && old.rmap && !npages) { |
6109 | int ret; | 6118 | int ret; |
@@ -6118,12 +6127,12 @@ void kvm_arch_commit_memory_region(struct kvm *kvm, | |||
6118 | "failed to munmap memory\n"); | 6127 | "failed to munmap memory\n"); |
6119 | } | 6128 | } |
6120 | 6129 | ||
6130 | if (!kvm->arch.n_requested_mmu_pages) | ||
6131 | nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm); | ||
6132 | |||
6121 | spin_lock(&kvm->mmu_lock); | 6133 | spin_lock(&kvm->mmu_lock); |
6122 | if (!kvm->arch.n_requested_mmu_pages) { | 6134 | if (nr_mmu_pages) |
6123 | unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm); | ||
6124 | kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages); | 6135 | kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages); |
6125 | } | ||
6126 | |||
6127 | kvm_mmu_slot_remove_write_access(kvm, mem->slot); | 6136 | kvm_mmu_slot_remove_write_access(kvm, mem->slot); |
6128 | spin_unlock(&kvm->mmu_lock); | 6137 | spin_unlock(&kvm->mmu_lock); |
6129 | } | 6138 | } |
@@ -6157,7 +6166,7 @@ void kvm_vcpu_kick(struct kvm_vcpu *vcpu) | |||
6157 | 6166 | ||
6158 | me = get_cpu(); | 6167 | me = get_cpu(); |
6159 | if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu)) | 6168 | if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu)) |
6160 | if (atomic_xchg(&vcpu->guest_mode, 0)) | 6169 | if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE) |
6161 | smp_send_reschedule(cpu); | 6170 | smp_send_reschedule(cpu); |
6162 | put_cpu(); | 6171 | put_cpu(); |
6163 | } | 6172 | } |