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authorSheng Yang <sheng.yang@intel.com>2008-06-18 02:43:38 -0400
committerAvi Kivity <avi@qumranet.com>2008-07-20 05:42:36 -0400
commit65267ea1b3e768dc54b63cd7fad520d89c27d350 (patch)
tree403dd76e60a43dd93a3467e4e6c50f40196d1590 /arch/x86/kvm/vmx.c
parentdb475c39eca0f2e44953d96e768d7ce808ab85bd (diff)
KVM: VMX: Fix a wrong usage of vmcs_config
The function ept_update_paging_mode_cr0() write to CPU_BASED_VM_EXEC_CONTROL based on vmcs_config.cpu_based_exec_ctrl. That's wrong because the variable may not consistent with the content in the CPU_BASE_VM_EXEC_CONTROL MSR. Signed-off-by: Sheng Yang <sheng.yang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
Diffstat (limited to 'arch/x86/kvm/vmx.c')
-rw-r--r--arch/x86/kvm/vmx.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 1bb994657208..6a3a4038f3b9 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -1441,7 +1441,7 @@ static void ept_update_paging_mode_cr0(unsigned long *hw_cr0,
1441 if (!(cr0 & X86_CR0_PG)) { 1441 if (!(cr0 & X86_CR0_PG)) {
1442 /* From paging/starting to nonpaging */ 1442 /* From paging/starting to nonpaging */
1443 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, 1443 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL,
1444 vmcs_config.cpu_based_exec_ctrl | 1444 vmcs_read32(CPU_BASED_VM_EXEC_CONTROL) |
1445 (CPU_BASED_CR3_LOAD_EXITING | 1445 (CPU_BASED_CR3_LOAD_EXITING |
1446 CPU_BASED_CR3_STORE_EXITING)); 1446 CPU_BASED_CR3_STORE_EXITING));
1447 vcpu->arch.cr0 = cr0; 1447 vcpu->arch.cr0 = cr0;
@@ -1451,7 +1451,7 @@ static void ept_update_paging_mode_cr0(unsigned long *hw_cr0,
1451 } else if (!is_paging(vcpu)) { 1451 } else if (!is_paging(vcpu)) {
1452 /* From nonpaging to paging */ 1452 /* From nonpaging to paging */
1453 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, 1453 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL,
1454 vmcs_config.cpu_based_exec_ctrl & 1454 vmcs_read32(CPU_BASED_VM_EXEC_CONTROL) &
1455 ~(CPU_BASED_CR3_LOAD_EXITING | 1455 ~(CPU_BASED_CR3_LOAD_EXITING |
1456 CPU_BASED_CR3_STORE_EXITING)); 1456 CPU_BASED_CR3_STORE_EXITING));
1457 vcpu->arch.cr0 = cr0; 1457 vcpu->arch.cr0 = cr0;