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authorSheng Yang <sheng@linux.intel.com>2008-10-09 04:01:57 -0400
committerAvi Kivity <avi@redhat.com>2008-12-31 09:51:45 -0500
commit64d4d521757117aa5c1cfe79d3baa6cf57703f81 (patch)
treec12f1615e794408edd2930bd220722b6d5323938 /arch/x86/kvm/vmx.c
parent74be52e3e6285fc6e872a2a7baea544106f399ea (diff)
KVM: Enable MTRR for EPT
The effective memory type of EPT is the mixture of MSR_IA32_CR_PAT and memory type field of EPT entry. Signed-off-by: Sheng Yang <sheng@linux.intel.com> Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'arch/x86/kvm/vmx.c')
-rw-r--r--arch/x86/kvm/vmx.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index b4c95a501cca..dae134fa09e7 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -3574,6 +3574,11 @@ static int get_ept_level(void)
3574 return VMX_EPT_DEFAULT_GAW + 1; 3574 return VMX_EPT_DEFAULT_GAW + 1;
3575} 3575}
3576 3576
3577static int vmx_get_mt_mask_shift(void)
3578{
3579 return VMX_EPT_MT_EPTE_SHIFT;
3580}
3581
3577static struct kvm_x86_ops vmx_x86_ops = { 3582static struct kvm_x86_ops vmx_x86_ops = {
3578 .cpu_has_kvm_support = cpu_has_kvm_support, 3583 .cpu_has_kvm_support = cpu_has_kvm_support,
3579 .disabled_by_bios = vmx_disabled_by_bios, 3584 .disabled_by_bios = vmx_disabled_by_bios,
@@ -3629,6 +3634,7 @@ static struct kvm_x86_ops vmx_x86_ops = {
3629 3634
3630 .set_tss_addr = vmx_set_tss_addr, 3635 .set_tss_addr = vmx_set_tss_addr,
3631 .get_tdp_level = get_ept_level, 3636 .get_tdp_level = get_ept_level,
3637 .get_mt_mask_shift = vmx_get_mt_mask_shift,
3632}; 3638};
3633 3639
3634static int __init vmx_init(void) 3640static int __init vmx_init(void)
@@ -3685,10 +3691,10 @@ static int __init vmx_init(void)
3685 bypass_guest_pf = 0; 3691 bypass_guest_pf = 0;
3686 kvm_mmu_set_base_ptes(VMX_EPT_READABLE_MASK | 3692 kvm_mmu_set_base_ptes(VMX_EPT_READABLE_MASK |
3687 VMX_EPT_WRITABLE_MASK | 3693 VMX_EPT_WRITABLE_MASK |
3688 VMX_EPT_DEFAULT_MT << VMX_EPT_MT_EPTE_SHIFT |
3689 VMX_EPT_IGMT_BIT); 3694 VMX_EPT_IGMT_BIT);
3690 kvm_mmu_set_mask_ptes(0ull, 0ull, 0ull, 0ull, 3695 kvm_mmu_set_mask_ptes(0ull, 0ull, 0ull, 0ull,
3691 VMX_EPT_EXECUTABLE_MASK); 3696 VMX_EPT_EXECUTABLE_MASK,
3697 VMX_EPT_DEFAULT_MT << VMX_EPT_MT_EPTE_SHIFT);
3692 kvm_enable_tdp(); 3698 kvm_enable_tdp();
3693 } else 3699 } else
3694 kvm_disable_tdp(); 3700 kvm_disable_tdp();