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authorZhang Xiantao <xiantao.zhang@intel.com>2007-12-17 00:59:56 -0500
committerAvi Kivity <avi@qumranet.com>2008-01-30 11:01:19 -0500
commit82470196fa346f50ab4071935597017de33c9ee3 (patch)
tree2dc26c39f17d13555badb8e451c2d6fbe80902ec /arch/x86/kvm/irq.h
parent0fce5623ba248d3af0d7fb719d5ac367cc9d5192 (diff)
KVM: Move irqchip declarations into new ioapic.h and lapic.h
This allows reuse of ioapic in ia64. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
Diffstat (limited to 'arch/x86/kvm/irq.h')
-rw-r--r--arch/x86/kvm/irq.h115
1 files changed, 5 insertions, 110 deletions
diff --git a/arch/x86/kvm/irq.h b/arch/x86/kvm/irq.h
index 6316638eec9f..c376b5b41bba 100644
--- a/arch/x86/kvm/irq.h
+++ b/arch/x86/kvm/irq.h
@@ -25,7 +25,10 @@
25#include <linux/mm_types.h> 25#include <linux/mm_types.h>
26#include <linux/hrtimer.h> 26#include <linux/hrtimer.h>
27#include <linux/kvm_host.h> 27#include <linux/kvm_host.h>
28
28#include "iodev.h" 29#include "iodev.h"
30#include "ioapic.h"
31#include "lapic.h"
29 32
30struct kvm; 33struct kvm;
31struct kvm_vcpu; 34struct kvm_vcpu;
@@ -65,131 +68,23 @@ void kvm_pic_set_irq(void *opaque, int irq, int level);
65int kvm_pic_read_irq(struct kvm_pic *s); 68int kvm_pic_read_irq(struct kvm_pic *s);
66void kvm_pic_update_irq(struct kvm_pic *s); 69void kvm_pic_update_irq(struct kvm_pic *s);
67 70
68#define IOAPIC_NUM_PINS KVM_IOAPIC_NUM_PINS
69#define IOAPIC_VERSION_ID 0x11 /* IOAPIC version */
70#define IOAPIC_EDGE_TRIG 0
71#define IOAPIC_LEVEL_TRIG 1
72
73#define IOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000
74#define IOAPIC_MEM_LENGTH 0x100
75
76/* Direct registers. */
77#define IOAPIC_REG_SELECT 0x00
78#define IOAPIC_REG_WINDOW 0x10
79#define IOAPIC_REG_EOI 0x40 /* IA64 IOSAPIC only */
80
81/* Indirect registers. */
82#define IOAPIC_REG_APIC_ID 0x00 /* x86 IOAPIC only */
83#define IOAPIC_REG_VERSION 0x01
84#define IOAPIC_REG_ARB_ID 0x02 /* x86 IOAPIC only */
85
86/*ioapic delivery mode*/
87#define IOAPIC_FIXED 0x0
88#define IOAPIC_LOWEST_PRIORITY 0x1
89#define IOAPIC_PMI 0x2
90#define IOAPIC_NMI 0x4
91#define IOAPIC_INIT 0x5
92#define IOAPIC_EXTINT 0x7
93
94struct kvm_ioapic {
95 u64 base_address;
96 u32 ioregsel;
97 u32 id;
98 u32 irr;
99 u32 pad;
100 union ioapic_redir_entry {
101 u64 bits;
102 struct {
103 u8 vector;
104 u8 delivery_mode:3;
105 u8 dest_mode:1;
106 u8 delivery_status:1;
107 u8 polarity:1;
108 u8 remote_irr:1;
109 u8 trig_mode:1;
110 u8 mask:1;
111 u8 reserve:7;
112 u8 reserved[4];
113 u8 dest_id;
114 } fields;
115 } redirtbl[IOAPIC_NUM_PINS];
116 struct kvm_io_device dev;
117 struct kvm *kvm;
118};
119
120struct kvm_lapic {
121 unsigned long base_address;
122 struct kvm_io_device dev;
123 struct {
124 atomic_t pending;
125 s64 period; /* unit: ns */
126 u32 divide_count;
127 ktime_t last_update;
128 struct hrtimer dev;
129 } timer;
130 struct kvm_vcpu *vcpu;
131 struct page *regs_page;
132 void *regs;
133};
134
135#ifdef DEBUG
136#define ASSERT(x) \
137do { \
138 if (!(x)) { \
139 printk(KERN_EMERG "assertion failed %s: %d: %s\n", \
140 __FILE__, __LINE__, #x); \
141 BUG(); \
142 } \
143} while (0)
144#else
145#define ASSERT(x) do { } while (0)
146#endif
147
148static inline struct kvm_pic *pic_irqchip(struct kvm *kvm) 71static inline struct kvm_pic *pic_irqchip(struct kvm *kvm)
149{ 72{
150 return kvm->arch.vpic; 73 return kvm->arch.vpic;
151} 74}
152 75
153static inline struct kvm_ioapic *ioapic_irqchip(struct kvm *kvm)
154{
155 return kvm->arch.vioapic;
156}
157
158static inline int irqchip_in_kernel(struct kvm *kvm) 76static inline int irqchip_in_kernel(struct kvm *kvm)
159{ 77{
160 return pic_irqchip(kvm) != NULL; 78 return pic_irqchip(kvm) != NULL;
161} 79}
162 80
163void kvm_vcpu_kick(struct kvm_vcpu *vcpu);
164int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu);
165int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu);
166int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu);
167int kvm_create_lapic(struct kvm_vcpu *vcpu);
168void kvm_lapic_reset(struct kvm_vcpu *vcpu);
169void kvm_pic_reset(struct kvm_kpic_state *s); 81void kvm_pic_reset(struct kvm_kpic_state *s);
170void kvm_ioapic_reset(struct kvm_ioapic *ioapic);
171void kvm_free_lapic(struct kvm_vcpu *vcpu);
172u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu);
173void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8);
174void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value);
175 82
176struct kvm_vcpu *kvm_get_lowest_prio_vcpu(struct kvm *kvm, u8 vector,
177 unsigned long bitmap);
178u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
179void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data);
180int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest);
181void kvm_ioapic_update_eoi(struct kvm *kvm, int vector);
182int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda);
183int kvm_apic_set_irq(struct kvm_vcpu *vcpu, u8 vec, u8 trig);
184void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu);
185int kvm_ioapic_init(struct kvm *kvm);
186void kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int level);
187int kvm_lapic_enabled(struct kvm_vcpu *vcpu);
188int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
189void kvm_apic_timer_intr_post(struct kvm_vcpu *vcpu, int vec);
190void kvm_timer_intr_post(struct kvm_vcpu *vcpu, int vec); 83void kvm_timer_intr_post(struct kvm_vcpu *vcpu, int vec);
191void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu); 84void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu);
192void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu); 85void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu);
193void kvm_migrate_apic_timer(struct kvm_vcpu *vcpu); 86void kvm_migrate_apic_timer(struct kvm_vcpu *vcpu);
194 87
88void kvm_vcpu_kick(struct kvm_vcpu *vcpu);
89
195#endif 90#endif