diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-05-28 15:57:01 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-05-28 15:57:01 -0400 |
commit | a947e23a8ec04bccbfe98c5a2d64cd1f88b612d5 (patch) | |
tree | d64bfae3af141014e93b32036ee8cb3202655ecc /arch/x86/kernel | |
parent | 08a8b79600101fd6e13dcf05409b330e7f5b0478 (diff) | |
parent | 9a3865b185e77d1a4ca2d8356e37c19b78168961 (diff) |
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86, asm: Clean up desc.h a bit
x86, amd: Do not enable ARAT feature on AMD processors below family 0x12
x86: Move do_page_fault()'s error path under unlikely()
x86, efi: Retain boot service code until after switching to virtual mode
x86: Remove unnecessary check in detect_ht()
x86: Reorder mm_context_t to remove x86_64 alignment padding and thus shrink mm_struct
x86, UV: Clean up uv_tlb.c
x86, UV: Add support for SGI UV2 hub chip
x86, cpufeature: Update CPU feature RDRND to RDRAND
Diffstat (limited to 'arch/x86/kernel')
-rw-r--r-- | arch/x86/kernel/apic/x2apic_uv_x.c | 40 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/amd.c | 7 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/common.c | 7 | ||||
-rw-r--r-- | arch/x86/kernel/setup.c | 7 |
4 files changed, 43 insertions, 18 deletions
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index f450b683dfcf..b511a011b7d0 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c | |||
@@ -91,6 +91,10 @@ static int __init early_get_pnodeid(void) | |||
91 | m_n_config.v = uv_early_read_mmr(UVH_RH_GAM_CONFIG_MMR); | 91 | m_n_config.v = uv_early_read_mmr(UVH_RH_GAM_CONFIG_MMR); |
92 | uv_min_hub_revision_id = node_id.s.revision; | 92 | uv_min_hub_revision_id = node_id.s.revision; |
93 | 93 | ||
94 | if (node_id.s.part_number == UV2_HUB_PART_NUMBER) | ||
95 | uv_min_hub_revision_id += UV2_HUB_REVISION_BASE - 1; | ||
96 | |||
97 | uv_hub_info->hub_revision = uv_min_hub_revision_id; | ||
94 | pnode = (node_id.s.node_id >> 1) & ((1 << m_n_config.s.n_skt) - 1); | 98 | pnode = (node_id.s.node_id >> 1) & ((1 << m_n_config.s.n_skt) - 1); |
95 | return pnode; | 99 | return pnode; |
96 | } | 100 | } |
@@ -112,17 +116,25 @@ static void __init early_get_apic_pnode_shift(void) | |||
112 | */ | 116 | */ |
113 | static void __init uv_set_apicid_hibit(void) | 117 | static void __init uv_set_apicid_hibit(void) |
114 | { | 118 | { |
115 | union uvh_lb_target_physical_apic_id_mask_u apicid_mask; | 119 | union uv1h_lb_target_physical_apic_id_mask_u apicid_mask; |
116 | 120 | ||
117 | apicid_mask.v = uv_early_read_mmr(UVH_LB_TARGET_PHYSICAL_APIC_ID_MASK); | 121 | if (is_uv1_hub()) { |
118 | uv_apicid_hibits = apicid_mask.s.bit_enables & UV_APICID_HIBIT_MASK; | 122 | apicid_mask.v = |
123 | uv_early_read_mmr(UV1H_LB_TARGET_PHYSICAL_APIC_ID_MASK); | ||
124 | uv_apicid_hibits = | ||
125 | apicid_mask.s1.bit_enables & UV_APICID_HIBIT_MASK; | ||
126 | } | ||
119 | } | 127 | } |
120 | 128 | ||
121 | static int __init uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | 129 | static int __init uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
122 | { | 130 | { |
123 | int pnodeid; | 131 | int pnodeid, is_uv1, is_uv2; |
124 | 132 | ||
125 | if (!strcmp(oem_id, "SGI")) { | 133 | is_uv1 = !strcmp(oem_id, "SGI"); |
134 | is_uv2 = !strcmp(oem_id, "SGI2"); | ||
135 | if (is_uv1 || is_uv2) { | ||
136 | uv_hub_info->hub_revision = | ||
137 | is_uv1 ? UV1_HUB_REVISION_BASE : UV2_HUB_REVISION_BASE; | ||
126 | pnodeid = early_get_pnodeid(); | 138 | pnodeid = early_get_pnodeid(); |
127 | early_get_apic_pnode_shift(); | 139 | early_get_apic_pnode_shift(); |
128 | x86_platform.is_untracked_pat_range = uv_is_untracked_pat_range; | 140 | x86_platform.is_untracked_pat_range = uv_is_untracked_pat_range; |
@@ -484,12 +496,19 @@ static __init void map_mmr_high(int max_pnode) | |||
484 | static __init void map_mmioh_high(int max_pnode) | 496 | static __init void map_mmioh_high(int max_pnode) |
485 | { | 497 | { |
486 | union uvh_rh_gam_mmioh_overlay_config_mmr_u mmioh; | 498 | union uvh_rh_gam_mmioh_overlay_config_mmr_u mmioh; |
487 | int shift = UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_SHFT; | 499 | int shift; |
488 | 500 | ||
489 | mmioh.v = uv_read_local_mmr(UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR); | 501 | mmioh.v = uv_read_local_mmr(UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR); |
490 | if (mmioh.s.enable) | 502 | if (is_uv1_hub() && mmioh.s1.enable) { |
491 | map_high("MMIOH", mmioh.s.base, shift, mmioh.s.m_io, | 503 | shift = UV1H_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_SHFT; |
504 | map_high("MMIOH", mmioh.s1.base, shift, mmioh.s1.m_io, | ||
505 | max_pnode, map_uc); | ||
506 | } | ||
507 | if (is_uv2_hub() && mmioh.s2.enable) { | ||
508 | shift = UV2H_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_SHFT; | ||
509 | map_high("MMIOH", mmioh.s2.base, shift, mmioh.s2.m_io, | ||
492 | max_pnode, map_uc); | 510 | max_pnode, map_uc); |
511 | } | ||
493 | } | 512 | } |
494 | 513 | ||
495 | static __init void map_low_mmrs(void) | 514 | static __init void map_low_mmrs(void) |
@@ -736,13 +755,14 @@ void __init uv_system_init(void) | |||
736 | unsigned long mmr_base, present, paddr; | 755 | unsigned long mmr_base, present, paddr; |
737 | unsigned short pnode_mask, pnode_io_mask; | 756 | unsigned short pnode_mask, pnode_io_mask; |
738 | 757 | ||
758 | printk(KERN_INFO "UV: Found %s hub\n", is_uv1_hub() ? "UV1" : "UV2"); | ||
739 | map_low_mmrs(); | 759 | map_low_mmrs(); |
740 | 760 | ||
741 | m_n_config.v = uv_read_local_mmr(UVH_RH_GAM_CONFIG_MMR ); | 761 | m_n_config.v = uv_read_local_mmr(UVH_RH_GAM_CONFIG_MMR ); |
742 | m_val = m_n_config.s.m_skt; | 762 | m_val = m_n_config.s.m_skt; |
743 | n_val = m_n_config.s.n_skt; | 763 | n_val = m_n_config.s.n_skt; |
744 | mmioh.v = uv_read_local_mmr(UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR); | 764 | mmioh.v = uv_read_local_mmr(UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR); |
745 | n_io = mmioh.s.n_io; | 765 | n_io = is_uv1_hub() ? mmioh.s1.n_io : mmioh.s2.n_io; |
746 | mmr_base = | 766 | mmr_base = |
747 | uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR) & | 767 | uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR) & |
748 | ~UV_MMR_ENABLE; | 768 | ~UV_MMR_ENABLE; |
@@ -811,6 +831,8 @@ void __init uv_system_init(void) | |||
811 | */ | 831 | */ |
812 | uv_cpu_hub_info(cpu)->pnode_mask = pnode_mask; | 832 | uv_cpu_hub_info(cpu)->pnode_mask = pnode_mask; |
813 | uv_cpu_hub_info(cpu)->apic_pnode_shift = uvh_apicid.s.pnode_shift; | 833 | uv_cpu_hub_info(cpu)->apic_pnode_shift = uvh_apicid.s.pnode_shift; |
834 | uv_cpu_hub_info(cpu)->hub_revision = uv_hub_info->hub_revision; | ||
835 | |||
814 | pnode = uv_apicid_to_pnode(apicid); | 836 | pnode = uv_apicid_to_pnode(apicid); |
815 | blade = boot_pnode_to_blade(pnode); | 837 | blade = boot_pnode_to_blade(pnode); |
816 | lcpu = uv_blade_info[blade].nr_possible_cpus; | 838 | lcpu = uv_blade_info[blade].nr_possible_cpus; |
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 8f5cabb3c5b0..b13ed393dfce 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c | |||
@@ -612,8 +612,11 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) | |||
612 | } | 612 | } |
613 | #endif | 613 | #endif |
614 | 614 | ||
615 | /* As a rule processors have APIC timer running in deep C states */ | 615 | /* |
616 | if (c->x86 > 0xf && !cpu_has_amd_erratum(amd_erratum_400)) | 616 | * Family 0x12 and above processors have APIC timer |
617 | * running in deep C states. | ||
618 | */ | ||
619 | if (c->x86 > 0x11) | ||
617 | set_cpu_cap(c, X86_FEATURE_ARAT); | 620 | set_cpu_cap(c, X86_FEATURE_ARAT); |
618 | 621 | ||
619 | /* | 622 | /* |
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index c8b41623377f..53f02f5d8cce 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c | |||
@@ -477,13 +477,6 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c) | |||
477 | if (smp_num_siblings <= 1) | 477 | if (smp_num_siblings <= 1) |
478 | goto out; | 478 | goto out; |
479 | 479 | ||
480 | if (smp_num_siblings > nr_cpu_ids) { | ||
481 | pr_warning("CPU: Unsupported number of siblings %d", | ||
482 | smp_num_siblings); | ||
483 | smp_num_siblings = 1; | ||
484 | return; | ||
485 | } | ||
486 | |||
487 | index_msb = get_count_order(smp_num_siblings); | 480 | index_msb = get_count_order(smp_num_siblings); |
488 | c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, index_msb); | 481 | c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, index_msb); |
489 | 482 | ||
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index a3e5948670c2..afaf38447ef5 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c | |||
@@ -910,6 +910,13 @@ void __init setup_arch(char **cmdline_p) | |||
910 | memblock.current_limit = get_max_mapped(); | 910 | memblock.current_limit = get_max_mapped(); |
911 | memblock_x86_fill(); | 911 | memblock_x86_fill(); |
912 | 912 | ||
913 | /* | ||
914 | * The EFI specification says that boot service code won't be called | ||
915 | * after ExitBootServices(). This is, in fact, a lie. | ||
916 | */ | ||
917 | if (efi_enabled) | ||
918 | efi_reserve_boot_services(); | ||
919 | |||
913 | /* preallocate 4k for mptable mpc */ | 920 | /* preallocate 4k for mptable mpc */ |
914 | early_reserve_e820_mpc_new(); | 921 | early_reserve_e820_mpc_new(); |
915 | 922 | ||