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authorJan Beulich <jbeulich@novell.com>2008-04-22 11:22:21 -0400
committerIngo Molnar <mingo@elte.hu>2008-04-26 11:35:46 -0400
commit911f6a7ba21795865ab30fc5f88aa198b0daee5f (patch)
tree3f1143d311a78a42b884c3689e6540b3d1126783 /arch/x86/kernel
parent79bf0e0353e0a34dbe0b2ef659a9bdd8056ca524 (diff)
x86-64: extend MCE CPU quirk handling
At least on my Barcelona, I see MCE log entries after cold boot caused by BIOS not properly clearing the respective registers. Therefore, this patch extends the workaround to families 0x10 and 0x11 (the latter just for completeness, I have nothing to verify this against). At the same time, provide a way to make these entries visible via the 'mce=bootlog' command line option even on these machines. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel')
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_64.c18
1 files changed, 10 insertions, 8 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c
index 9a699ed03598..e07e8c068ae0 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_64.c
@@ -49,7 +49,7 @@ static int banks;
49static unsigned long bank[NR_BANKS] = { [0 ... NR_BANKS-1] = ~0UL }; 49static unsigned long bank[NR_BANKS] = { [0 ... NR_BANKS-1] = ~0UL };
50static unsigned long notify_user; 50static unsigned long notify_user;
51static int rip_msr; 51static int rip_msr;
52static int mce_bootlog = 1; 52static int mce_bootlog = -1;
53static atomic_t mce_events; 53static atomic_t mce_events;
54 54
55static char trigger[128]; 55static char trigger[128];
@@ -471,13 +471,15 @@ static void mce_init(void *dummy)
471static void __cpuinit mce_cpu_quirks(struct cpuinfo_x86 *c) 471static void __cpuinit mce_cpu_quirks(struct cpuinfo_x86 *c)
472{ 472{
473 /* This should be disabled by the BIOS, but isn't always */ 473 /* This should be disabled by the BIOS, but isn't always */
474 if (c->x86_vendor == X86_VENDOR_AMD && c->x86 == 15) { 474 if (c->x86_vendor == X86_VENDOR_AMD) {
475 /* disable GART TBL walk error reporting, which trips off 475 if(c->x86 == 15)
476 incorrectly with the IOMMU & 3ware & Cerberus. */ 476 /* disable GART TBL walk error reporting, which trips off
477 clear_bit(10, &bank[4]); 477 incorrectly with the IOMMU & 3ware & Cerberus. */
478 /* Lots of broken BIOS around that don't clear them 478 clear_bit(10, &bank[4]);
479 by default and leave crap in there. Don't log. */ 479 if(c->x86 <= 17 && mce_bootlog < 0)
480 mce_bootlog = 0; 480 /* Lots of broken BIOS around that don't clear them
481 by default and leave crap in there. Don't log. */
482 mce_bootlog = 0;
481 } 483 }
482 484
483} 485}