Merge branch 'x86/cpu' into x86/xsave

Conflicts:

	arch/x86/kernel/cpu/feature_names.c
	include/asm-x86/cpufeature.h

50 files changed, 766 insertions, 490 deletions

diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 12e260e8fb2a..27ef365e757d 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -97,6 +97,8 @@ static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
 #warning ACPI uses CMPXCHG, i486 and later hardware
 #endif
 
+static int acpi_mcfg_64bit_base_addr __initdata = FALSE;
+
 /* --------------------------------------------------------------------------
                               Boot-time Configuration
    -------------------------------------------------------------------------- */
@@ -158,6 +160,14 @@ char *__init __acpi_map_table(unsigned long phys, unsigned long size)
 struct acpi_mcfg_allocation *pci_mmcfg_config;
 int pci_mmcfg_config_num;
 
+static int __init acpi_mcfg_oem_check(struct acpi_table_mcfg *mcfg)
+{
+        if (!strcmp(mcfg->header.oem_id, "SGI"))
+                acpi_mcfg_64bit_base_addr = TRUE;
+
+        return 0;
+}
+
 int __init acpi_parse_mcfg(struct acpi_table_header *header)
 {
         struct acpi_table_mcfg *mcfg;
@@ -190,8 +200,12 @@ int __init acpi_parse_mcfg(struct acpi_table_header *header)
         }
 
         memcpy(pci_mmcfg_config, &mcfg[1], config_size);
+
+        acpi_mcfg_oem_check(mcfg);
+
         for (i = 0; i < pci_mmcfg_config_num; ++i) {
-                if (pci_mmcfg_config[i].address > 0xFFFFFFFF) {
+                if ((pci_mmcfg_config[i].address > 0xFFFFFFFF) &&
+                    !acpi_mcfg_64bit_base_addr) {
                         printk(KERN_ERR PREFIX
                                "MMCONFIG not in low 4GB of memory\n");
                         kfree(pci_mmcfg_config);
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index fa2161d5003b..426e5d91b63a 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -20,7 +20,7 @@ unsigned long acpi_realmode_flags;
 /* address in low memory of the wakeup routine. */
 static unsigned long acpi_realmode;
 
-#ifdef CONFIG_64BIT
+#if defined(CONFIG_SMP) && defined(CONFIG_64BIT)
 static char temp_stack[10240];
 #endif
 
@@ -86,7 +86,7 @@ int acpi_save_state_mem(void)
 #endif /* !CONFIG_64BIT */
 
         header->pmode_cr0 = read_cr0();
-        header->pmode_cr4 = read_cr4();
+        header->pmode_cr4 = read_cr4_safe();
         header->realmode_flags = acpi_realmode_flags;
         header->real_magic = 0x12345678;
 
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index 2763cb37b553..65a0c1b48696 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -145,35 +145,25 @@ static const unsigned char *const p6_nops[ASM_NOP_MAX+1] = {
 extern char __vsyscall_0;
 const unsigned char *const *find_nop_table(void)
 {
-        return boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ||
-               boot_cpu_data.x86 < 6 ? k8_nops : p6_nops;
+        if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
+            boot_cpu_has(X86_FEATURE_NOPL))
+                return p6_nops;
+        else
+                return k8_nops;
 }
 
 #else /* CONFIG_X86_64 */
 
-static const struct nop {
-        int cpuid;
-        const unsigned char *const *noptable;
-} noptypes[] = {
-        { X86_FEATURE_K8, k8_nops },
-        { X86_FEATURE_K7, k7_nops },
-        { X86_FEATURE_P4, p6_nops },
-        { X86_FEATURE_P3, p6_nops },
-        { -1, NULL }
-};
-
 const unsigned char *const *find_nop_table(void)
 {
-        const unsigned char *const *noptable = intel_nops;
-        int i;
-
-        for (i = 0; noptypes[i].cpuid >= 0; i++) {
-                if (boot_cpu_has(noptypes[i].cpuid)) {
-                        noptable = noptypes[i].noptable;
-                        break;
-                }
-        }
-        return noptable;
+        if (boot_cpu_has(X86_FEATURE_K8))
+                return k8_nops;
+        else if (boot_cpu_has(X86_FEATURE_K7))
+                return k7_nops;
+        else if (boot_cpu_has(X86_FEATURE_NOPL))
+                return p6_nops;
+        else
+                return intel_nops;
 }
 
 #endif /* CONFIG_X86_64 */
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index 22d7d050905d..69b4d060b21c 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -65,7 +65,7 @@ static int __iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd)
         u8 *target;
 
         tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
-        target = (iommu->cmd_buf + tail);
+        target = iommu->cmd_buf + tail;
         memcpy_toio(target, cmd, sizeof(*cmd));
         tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size;
         head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET);
@@ -101,16 +101,13 @@ static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd)
  */
 static int iommu_completion_wait(struct amd_iommu *iommu)
 {
-        int ret;
+        int ret, ready = 0;
+        unsigned status = 0;
         struct iommu_cmd cmd;
-        volatile u64 ready = 0;
-        unsigned long ready_phys = virt_to_phys(&ready);
         unsigned long i = 0;
 
         memset(&cmd, 0, sizeof(cmd));
-        cmd.data[0] = LOW_U32(ready_phys) | CMD_COMPL_WAIT_STORE_MASK;
-        cmd.data[1] = upper_32_bits(ready_phys);
-        cmd.data[2] = 1; /* value written to 'ready' */
+        cmd.data[0] = CMD_COMPL_WAIT_INT_MASK;
         CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT);
 
         iommu->need_sync = 0;
@@ -122,9 +119,15 @@ static int iommu_completion_wait(struct amd_iommu *iommu)
 
         while (!ready && (i < EXIT_LOOP_COUNT)) {
                 ++i;
-                cpu_relax();
+                /* wait for the bit to become one */
+                status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET);
+                ready = status & MMIO_STATUS_COM_WAIT_INT_MASK;
         }
 
+        /* set bit back to zero */
+        status &= ~MMIO_STATUS_COM_WAIT_INT_MASK;
+        writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET);
+
         if (unlikely((i == EXIT_LOOP_COUNT) && printk_ratelimit()))
                 printk(KERN_WARNING "AMD IOMMU: Completion wait loop failed\n");
 
@@ -161,7 +164,7 @@ static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
         address &= PAGE_MASK;
         CMD_SET_TYPE(&cmd, CMD_INV_IOMMU_PAGES);
         cmd.data[1] |= domid;
-        cmd.data[2] = LOW_U32(address);
+        cmd.data[2] = lower_32_bits(address);
         cmd.data[3] = upper_32_bits(address);
         if (s) /* size bit - we flush more than one 4kb page */
                 cmd.data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK;
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index d9a9da597e79..a69cc0f52042 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -801,6 +801,21 @@ static int __init init_memory_definitions(struct acpi_table_header *table)
 }
 
 /*
+ * Init the device table to not allow DMA access for devices and
+ * suppress all page faults
+ */
+static void init_device_table(void)
+{
+        u16 devid;
+
+        for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) {
+                set_dev_entry_bit(devid, DEV_ENTRY_VALID);
+                set_dev_entry_bit(devid, DEV_ENTRY_TRANSLATION);
+                set_dev_entry_bit(devid, DEV_ENTRY_NO_PAGE_FAULT);
+        }
+}
+
+/*
  * This function finally enables all IOMMUs found in the system after
  * they have been initialized
  */
@@ -931,6 +946,9 @@ int __init amd_iommu_init(void)
         if (amd_iommu_pd_alloc_bitmap == NULL)
                 goto free;
 
+        /* init the device table */
+        init_device_table();
+
         /*
          * let all alias entries point to itself
          */
@@ -954,15 +972,15 @@ int __init amd_iommu_init(void)
         if (acpi_table_parse("IVRS", init_memory_definitions) != 0)
                 goto free;
 
-        ret = amd_iommu_init_dma_ops();
+        ret = sysdev_class_register(&amd_iommu_sysdev_class);
         if (ret)
                 goto free;
 
-        ret = sysdev_class_register(&amd_iommu_sysdev_class);
+        ret = sysdev_register(&device_amd_iommu);
         if (ret)
                 goto free;
 
-        ret = sysdev_register(&device_amd_iommu);
+        ret = amd_iommu_init_dma_ops();
         if (ret)
                 goto free;
 
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 8228222ec917..44cae65e32ef 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -1487,8 +1487,6 @@ void disconnect_bsp_APIC(int virt_wire_setup)
         }
 }
 
-unsigned int __cpuinitdata maxcpus = NR_CPUS;
-
 void __cpuinit generic_processor_info(int apicid, int version)
 {
         int cpu;
@@ -1515,12 +1513,6 @@ void __cpuinit generic_processor_info(int apicid, int version)
                 return;
         }
 
-        if (num_processors >= maxcpus) {
-                printk(KERN_WARNING "WARNING: maxcpus limit of %i reached."
-                        " Processor ignored.\n", maxcpus);
-                return;
-        }
-
         num_processors++;
         cpus_complement(tmp_map, cpu_present_map);
         cpu = first_cpu(tmp_map);
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index cd63c0bc6180..b6256587f99e 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -97,7 +97,6 @@ static unsigned long apic_phys;
 
 unsigned long mp_lapic_addr;
 
-unsigned int __cpuinitdata maxcpus = NR_CPUS;
 /*
  * Get the LAPIC version
  */
@@ -1259,12 +1258,6 @@ void __cpuinit generic_processor_info(int apicid, int version)
                 return;
         }
 
-        if (num_processors >= maxcpus) {
-                printk(KERN_WARNING "WARNING: maxcpus limit of %i reached."
-                       " Processor ignored.\n", maxcpus);
-                return;
-        }
-
         num_processors++;
         cpus_complement(tmp_map, cpu_present_map);
         cpu = first_cpu(tmp_map);
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index ee76eaad3001..3ede19a4e0b2 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -3,22 +3,32 @@
 #
 
 obj-y                   := intel_cacheinfo.o addon_cpuid_features.o
-obj-y                   += proc.o feature_names.o
+obj-y                   += proc.o capflags.o powerflags.o
 
-obj-$(CONFIG_X86_32)    += common.o bugs.o
+obj-$(CONFIG_X86_32)    += common.o bugs.o cmpxchg.o
 obj-$(CONFIG_X86_64)    += common_64.o bugs_64.o
-obj-$(CONFIG_X86_32)    += amd.o
-obj-$(CONFIG_X86_64)    += amd_64.o
-obj-$(CONFIG_X86_32)    += cyrix.o
-obj-$(CONFIG_X86_32)    += centaur.o
-obj-$(CONFIG_X86_64)    += centaur_64.o
-obj-$(CONFIG_X86_32)    += transmeta.o
-obj-$(CONFIG_X86_32)    += intel.o
-obj-$(CONFIG_X86_64)    += intel_64.o
-obj-$(CONFIG_X86_32)    += umc.o
+
+obj-$(CONFIG_CPU_SUP_AMD_32)            += amd.o
+obj-$(CONFIG_CPU_SUP_AMD_64)            += amd_64.o
+obj-$(CONFIG_CPU_SUP_CYRIX_32)          += cyrix.o
+obj-$(CONFIG_CPU_SUP_CENTAUR_32)        += centaur.o
+obj-$(CONFIG_CPU_SUP_CENTAUR_64)        += centaur_64.o
+obj-$(CONFIG_CPU_SUP_TRANSMETA_32)      += transmeta.o
+obj-$(CONFIG_CPU_SUP_INTEL_32)          += intel.o
+obj-$(CONFIG_CPU_SUP_INTEL_64)          += intel_64.o
+obj-$(CONFIG_CPU_SUP_UMC_32)            += umc.o
 
 obj-$(CONFIG_X86_MCE)   += mcheck/
 obj-$(CONFIG_MTRR)      += mtrr/
 obj-$(CONFIG_CPU_FREQ)  += cpufreq/
 
 obj-$(CONFIG_X86_LOCAL_APIC) += perfctr-watchdog.o
+
+quiet_cmd_mkcapflags = MKCAP   $@
+      cmd_mkcapflags = $(PERL) $(srctree)/$(src)/mkcapflags.pl $< $@
+
+cpufeature = $(src)/../../../../include/asm-x86/cpufeature.h
+
+targets += capflags.c
+$(obj)/capflags.c: $(cpufeature) $(src)/mkcapflags.pl FORCE
+        $(call if_changed,mkcapflags)
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 84a8220a6072..a6ef672adbba 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -56,9 +56,22 @@ void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
 
         switch (c->x86_vendor) {
         case X86_VENDOR_INTEL:
-                if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
+                /*
+                 * There is a known erratum on Pentium III and Core Solo
+                 * and Core Duo CPUs.
+                 * " Page with PAT set to WC while associated MTRR is UC
+                 *   may consolidate to UC "
+                 * Because of this erratum, it is better to stick with
+                 * setting WC in MTRR rather than using PAT on these CPUs.
+                 *
+                 * Enable PAT WC only on P4, Core 2 or later CPUs.
+                 */
+                if (c->x86 > 0x6 || (c->x86 == 6 && c->x86_model >= 15))
                         return;
-                break;
+
+                pat_disable("PAT WC disabled due to known CPU erratum.");
+                return;
+
         case X86_VENDOR_AMD:
         case X86_VENDOR_CENTAUR:
         case X86_VENDOR_TRANSMETA:
diff --git a/arch/x86/kernel/cpu/cmpxchg.c b/arch/x86/kernel/cpu/cmpxchg.c
new file mode 100644
index 000000000000..2056ccf572cc
--- /dev/null
+++ b/arch/x86/kernel/cpu/cmpxchg.c
@@ -0,0 +1,72 @@
+/*
+ * cmpxchg*() fallbacks for CPU not supporting these instructions
+ */
+
+#include <linux/kernel.h>
+#include <linux/smp.h>
+#include <linux/module.h>
+
+#ifndef CONFIG_X86_CMPXCHG
+unsigned long cmpxchg_386_u8(volatile void *ptr, u8 old, u8 new)
+{
+        u8 prev;
+        unsigned long flags;
+
+        /* Poor man's cmpxchg for 386. Unsuitable for SMP */
+        local_irq_save(flags);
+        prev = *(u8 *)ptr;
+        if (prev == old)
+                *(u8 *)ptr = new;
+        local_irq_restore(flags);
+        return prev;
+}
+EXPORT_SYMBOL(cmpxchg_386_u8);
+
+unsigned long cmpxchg_386_u16(volatile void *ptr, u16 old, u16 new)
+{
+        u16 prev;
+        unsigned long flags;
+
+        /* Poor man's cmpxchg for 386. Unsuitable for SMP */
+        local_irq_save(flags);
+        prev = *(u16 *)ptr;
+        if (prev == old)
+                *(u16 *)ptr = new;
+        local_irq_restore(flags);
+        return prev;
+}
+EXPORT_SYMBOL(cmpxchg_386_u16);
+
+unsigned long cmpxchg_386_u32(volatile void *ptr, u32 old, u32 new)
+{
+        u32 prev;
+        unsigned long flags;
+
+        /* Poor man's cmpxchg for 386. Unsuitable for SMP */
+        local_irq_save(flags);
+        prev = *(u32 *)ptr;
+        if (prev == old)
+                *(u32 *)ptr = new;
+        local_irq_restore(flags);
+        return prev;
+}
+EXPORT_SYMBOL(cmpxchg_386_u32);
+#endif
+
+#ifndef CONFIG_X86_CMPXCHG64
+unsigned long long cmpxchg_486_u64(volatile void *ptr, u64 old, u64 new)
+{
+        u64 prev;
+        unsigned long flags;
+
+        /* Poor man's cmpxchg8b for 386 and 486. Unsuitable for SMP */
+        local_irq_save(flags);
+        prev = *(u64 *)ptr;
+        if (prev == old)
+                *(u64 *)ptr = new;
+        local_irq_restore(flags);
+        return prev;
+}
+EXPORT_SYMBOL(cmpxchg_486_u64);
+#endif
+
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 6c2b9e756db2..c63ec65f484c 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -13,6 +13,7 @@
 #include <asm/mtrr.h>
 #include <asm/mce.h>
 #include <asm/pat.h>
+#include <asm/asm.h>
 #ifdef CONFIG_X86_LOCAL_APIC
 #include <asm/mpspec.h>
 #include <asm/apic.h>
@@ -341,6 +342,35 @@ static void __init early_cpu_detect(void)
         early_get_cap(c);
 }
 
+/*
+ * The NOPL instruction is supposed to exist on all CPUs with
+ * family >= 6, unfortunately, that's not true in practice because
+ * of early VIA chips and (more importantly) broken virtualizers that
+ * are not easy to detect.  Hence, probe for it based on first
+ * principles.
+ */
+static void __cpuinit detect_nopl(struct cpuinfo_x86 *c)
+{
+        const u32 nopl_signature = 0x888c53b1; /* Random number */
+        u32 has_nopl = nopl_signature;
+
+        clear_cpu_cap(c, X86_FEATURE_NOPL);
+        if (c->x86 >= 6) {
+                asm volatile("\n"
+                             "1:      .byte 0x0f,0x1f,0xc0\n" /* nopl %eax */
+                             "2:\n"
+                             "        .section .fixup,\"ax\"\n"
+                             "3:      xor %0,%0\n"
+                             "        jmp 2b\n"
+                             "        .previous\n"
+                             _ASM_EXTABLE(1b,3b)
+                             : "+a" (has_nopl));
+
+                if (has_nopl == nopl_signature)
+                        set_cpu_cap(c, X86_FEATURE_NOPL);
+        }
+}
+
 static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
 {
         u32 tfms, xlvl;
@@ -395,8 +425,8 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
                 }
 
                 init_scattered_cpuid_features(c);
+                detect_nopl(c);
         }
-
 }
 
 static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
diff --git a/arch/x86/kernel/cpu/common_64.c b/arch/x86/kernel/cpu/common_64.c
index 6f9b8924bdc0..af569a964e74 100644
--- a/arch/x86/kernel/cpu/common_64.c
+++ b/arch/x86/kernel/cpu/common_64.c
@@ -18,6 +18,7 @@
 #include <asm/mtrr.h>
 #include <asm/mce.h>
 #include <asm/pat.h>
+#include <asm/asm.h>
 #include <asm/numa.h>
 #ifdef CONFIG_X86_LOCAL_APIC
 #include <asm/mpspec.h>
@@ -215,6 +216,39 @@ static void __init early_cpu_support_print(void)
         }
 }
 
+/*
+ * The NOPL instruction is supposed to exist on all CPUs with
+ * family >= 6, unfortunately, that's not true in practice because
+ * of early VIA chips and (more importantly) broken virtualizers that
+ * are not easy to detect.  Hence, probe for it based on first
+ * principles.
+ *
+ * Note: no 64-bit chip is known to lack these, but put the code here
+ * for consistency with 32 bits, and to make it utterly trivial to
+ * diagnose the problem should it ever surface.
+ */
+static void __cpuinit detect_nopl(struct cpuinfo_x86 *c)
+{
+        const u32 nopl_signature = 0x888c53b1; /* Random number */
+        u32 has_nopl = nopl_signature;
+
+        clear_cpu_cap(c, X86_FEATURE_NOPL);
+        if (c->x86 >= 6) {
+                asm volatile("\n"
+                             "1:      .byte 0x0f,0x1f,0xc0\n" /* nopl %eax */
+                             "2:\n"
+                             "        .section .fixup,\"ax\"\n"
+                             "3:      xor %0,%0\n"
+                             "        jmp 2b\n"
+                             "        .previous\n"
+                             _ASM_EXTABLE(1b,3b)
+                             : "+a" (has_nopl));
+
+                if (has_nopl == nopl_signature)
+                        set_cpu_cap(c, X86_FEATURE_NOPL);
+        }
+}
+
 static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c);
 
 void __init early_cpu_init(void)
@@ -313,6 +347,8 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
                 c->x86_phys_bits = eax & 0xff;
         }
 
+        detect_nopl(c);
+
         if (c->x86_vendor != X86_VENDOR_UNKNOWN &&
             cpu_devs[c->x86_vendor]->c_early_init)
                 cpu_devs[c->x86_vendor]->c_early_init(c);
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
index 4e7271999a74..84bb395038d8 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
@@ -737,63 +737,44 @@ static int find_psb_table(struct powernow_k8_data *data)
 #ifdef CONFIG_X86_POWERNOW_K8_ACPI
 static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index)
 {
-        if (!data->acpi_data->state_count || (cpu_family == CPU_HW_PSTATE))
+        if (!data->acpi_data.state_count || (cpu_family == CPU_HW_PSTATE))
                 return;
 
-        data->irt = (data->acpi_data->states[index].control >> IRT_SHIFT) & IRT_MASK;
-        data->rvo = (data->acpi_data->states[index].control >> RVO_SHIFT) & RVO_MASK;
-        data->exttype = (data->acpi_data->states[index].control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
-        data->plllock = (data->acpi_data->states[index].control >> PLL_L_SHIFT) & PLL_L_MASK;
-        data->vidmvs = 1 << ((data->acpi_data->states[index].control >> MVS_SHIFT) & MVS_MASK);
-        data->vstable = (data->acpi_data->states[index].control >> VST_SHIFT) & VST_MASK;
-}
-
-
-static struct acpi_processor_performance *acpi_perf_data;
-static int preregister_valid;
-
-static int powernow_k8_cpu_preinit_acpi(void)
-{
-        acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
-        if (!acpi_perf_data)
-                return -ENODEV;
-
-        if (acpi_processor_preregister_performance(acpi_perf_data))
-                return -ENODEV;
-        else
-                preregister_valid = 1;
-        return 0;
+        data->irt = (data->acpi_data.states[index].control >> IRT_SHIFT) & IRT_MASK;
+        data->rvo = (data->acpi_data.states[index].control >> RVO_SHIFT) & RVO_MASK;
+        data->exttype = (data->acpi_data.states[index].control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
+        data->plllock = (data->acpi_data.states[index].control >> PLL_L_SHIFT) & PLL_L_MASK;
+        data->vidmvs = 1 << ((data->acpi_data.states[index].control >> MVS_SHIFT) & MVS_MASK);
+        data->vstable = (data->acpi_data.states[index].control >> VST_SHIFT) & VST_MASK;
 }
 
 static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
 {
         struct cpufreq_frequency_table *powernow_table;
         int ret_val;
-        int cpu = 0;
 
-        data->acpi_data = percpu_ptr(acpi_perf_data, cpu);
-        if (acpi_processor_register_performance(data->acpi_data, data->cpu)) {
+        if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
                 dprintk("register performance failed: bad ACPI data\n");
                 return -EIO;
         }
 
         /* verify the data contained in the ACPI structures */
-        if (data->acpi_data->state_count <= 1) {
+        if (data->acpi_data.state_count <= 1) {
                 dprintk("No ACPI P-States\n");
                 goto err_out;
         }
 
-        if ((data->acpi_data->control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
-                (data->acpi_data->status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
+        if ((data->acpi_data.control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
+                (data->acpi_data.status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
                 dprintk("Invalid control/status registers (%x - %x)\n",
-                        data->acpi_data->control_register.space_id,
-                        data->acpi_data->status_register.space_id);
+                        data->acpi_data.control_register.space_id,
+                        data->acpi_data.status_register.space_id);
                 goto err_out;
         }
 
         /* fill in data->powernow_table */
         powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
-                * (data->acpi_data->state_count + 1)), GFP_KERNEL);
+                * (data->acpi_data.state_count + 1)), GFP_KERNEL);
         if (!powernow_table) {
                 dprintk("powernow_table memory alloc failure\n");
                 goto err_out;
@@ -806,12 +787,12 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
         if (ret_val)
                 goto err_out_mem;
 
-        powernow_table[data->acpi_data->state_count].frequency = CPUFREQ_TABLE_END;
-        powernow_table[data->acpi_data->state_count].index = 0;
+        powernow_table[data->acpi_data.state_count].frequency = CPUFREQ_TABLE_END;
+        powernow_table[data->acpi_data.state_count].index = 0;
         data->powernow_table = powernow_table;
 
         /* fill in data */
-        data->numps = data->acpi_data->state_count;
+        data->numps = data->acpi_data.state_count;
         if (first_cpu(per_cpu(cpu_core_map, data->cpu)) == data->cpu)
                 print_basics(data);
         powernow_k8_acpi_pst_values(data, 0);
@@ -819,31 +800,16 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
         /* notify BIOS that we exist */
         acpi_processor_notify_smm(THIS_MODULE);
 
-        /* determine affinity, from ACPI if available */
-        if (preregister_valid) {
-                if ((data->acpi_data->shared_type == CPUFREQ_SHARED_TYPE_ALL) ||
-                        (data->acpi_data->shared_type == CPUFREQ_SHARED_TYPE_ANY))
-                        data->starting_core_affinity = data->acpi_data->shared_cpu_map;
-                else
-                        data->starting_core_affinity = cpumask_of_cpu(data->cpu);
-        } else {
-        /* best guess from family if not */
-                if (cpu_family == CPU_HW_PSTATE)
-                        data->starting_core_affinity = cpumask_of_cpu(data->cpu);
-                else
-                        data->starting_core_affinity = per_cpu(cpu_core_map, data->cpu);
-        }
-
         return 0;
 
 err_out_mem:
         kfree(powernow_table);
 
 err_out:
-        acpi_processor_unregister_performance(data->acpi_data, data->cpu);
+        acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
 
         /* data->acpi_data.state_count informs us at ->exit() whether ACPI was used */
-        data->acpi_data->state_count = 0;
+        data->acpi_data.state_count = 0;
 
         return -ENODEV;
 }
@@ -855,10 +821,10 @@ static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpuf
         rdmsr(MSR_PSTATE_CUR_LIMIT, hi, lo);
         data->max_hw_pstate = (hi & HW_PSTATE_MAX_MASK) >> HW_PSTATE_MAX_SHIFT;
 
-        for (i = 0; i < data->acpi_data->state_count; i++) {
+        for (i = 0; i < data->acpi_data.state_count; i++) {
                 u32 index;
 
-                index = data->acpi_data->states[i].control & HW_PSTATE_MASK;
+                index = data->acpi_data.states[i].control & HW_PSTATE_MASK;
                 if (index > data->max_hw_pstate) {
                         printk(KERN_ERR PFX "invalid pstate %d - bad value %d.\n", i, index);
                         printk(KERN_ERR PFX "Please report to BIOS manufacturer\n");
@@ -874,7 +840,7 @@ static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpuf
 
                 powernow_table[i].index = index;
 
-                powernow_table[i].frequency = data->acpi_data->states[i].core_frequency * 1000;
+                powernow_table[i].frequency = data->acpi_data.states[i].core_frequency * 1000;
         }
         return 0;
 }
@@ -883,16 +849,16 @@ static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpuf
 {
         int i;
         int cntlofreq = 0;
-        for (i = 0; i < data->acpi_data->state_count; i++) {
+        for (i = 0; i < data->acpi_data.state_count; i++) {
                 u32 fid;
                 u32 vid;
 
                 if (data->exttype) {
-                        fid = data->acpi_data->states[i].status & EXT_FID_MASK;
-                        vid = (data->acpi_data->states[i].status >> VID_SHIFT) & EXT_VID_MASK;
+                        fid = data->acpi_data.states[i].status & EXT_FID_MASK;
+                        vid = (data->acpi_data.states[i].status >> VID_SHIFT) & EXT_VID_MASK;
                 } else {
-                        fid = data->acpi_data->states[i].control & FID_MASK;
-                        vid = (data->acpi_data->states[i].control >> VID_SHIFT) & VID_MASK;
+                        fid = data->acpi_data.states[i].control & FID_MASK;
+                        vid = (data->acpi_data.states[i].control >> VID_SHIFT) & VID_MASK;
                 }
 
                 dprintk("   %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
@@ -933,10 +899,10 @@ static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpuf
                                 cntlofreq = i;
                 }
 
-                if (powernow_table[i].frequency != (data->acpi_data->states[i].core_frequency * 1000)) {
+                if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) {
                         printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n",
                                 powernow_table[i].frequency,
-                                (unsigned int) (data->acpi_data->states[i].core_frequency * 1000));
+                                (unsigned int) (data->acpi_data.states[i].core_frequency * 1000));
                         powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
                         continue;
                 }
@@ -946,12 +912,11 @@ static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpuf
 
 static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
 {
-        if (data->acpi_data->state_count)
-                acpi_processor_unregister_performance(data->acpi_data, data->cpu);
+        if (data->acpi_data.state_count)
+                acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
 }
 
 #else
-static int powernow_k8_cpu_preinit_acpi(void) { return -ENODEV; }
 static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) { return -ENODEV; }
 static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) { return; }
 static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) { return; }
@@ -1136,7 +1101,7 @@ static int powernowk8_verify(struct cpufreq_policy *pol)
 static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
 {
         struct powernow_k8_data *data;
-        cpumask_t oldmask = CPU_MASK_ALL;
+        cpumask_t oldmask;
         int rc;
 
         if (!cpu_online(pol->cpu))
@@ -1209,7 +1174,10 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
         /* run on any CPU again */
         set_cpus_allowed_ptr(current, &oldmask);
 
-        pol->cpus = data->starting_core_affinity;
+        if (cpu_family == CPU_HW_PSTATE)
+                pol->cpus = cpumask_of_cpu(pol->cpu);
+        else
+                pol->cpus = per_cpu(cpu_core_map, pol->cpu);
         data->available_cores = &(pol->cpus);
 
         /* Take a crude guess here.
@@ -1332,7 +1300,6 @@ static int __cpuinit powernowk8_init(void)
         }
 
         if (supported_cpus == num_online_cpus()) {
-                powernow_k8_cpu_preinit_acpi();
                 printk(KERN_INFO PFX "Found %d %s "
                         "processors (%d cpu cores) (" VERSION ")\n",
                         num_online_nodes(),
@@ -1349,10 +1316,6 @@ static void __exit powernowk8_exit(void)
         dprintk("exit\n");
 
         cpufreq_unregister_driver(&cpufreq_amd64_driver);
-
-#ifdef CONFIG_X86_POWERNOW_K8_ACPI
-        free_percpu(acpi_perf_data);
-#endif
 }
 
 MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and Mark Langsdorf <mark.langsdorf@amd.com>");
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.h b/arch/x86/kernel/cpu/cpufreq/powernow-k8.h
index a62612cd4be8..ab48cfed4d96 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.h
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.h
@@ -33,13 +33,12 @@ struct powernow_k8_data {
 #ifdef CONFIG_X86_POWERNOW_K8_ACPI
         /* the acpi table needs to be kept. it's only available if ACPI was
          * used to determine valid frequency/vid/fid states */
-        struct acpi_processor_performance *acpi_data;
+        struct acpi_processor_performance acpi_data;
 #endif
         /* we need to keep track of associated cores, but let cpufreq
          * handle hotplug events - so just point at cpufreq pol->cpus
          * structure */
         cpumask_t *available_cores;
-        cpumask_t starting_core_affinity;
 };
 
 
diff --git a/arch/x86/kernel/cpu/cyrix.c b/arch/x86/kernel/cpu/cyrix.c
index 3fd7a67bb06a..ada50505a5c8 100644
--- a/arch/x86/kernel/cpu/cyrix.c
+++ b/arch/x86/kernel/cpu/cyrix.c
@@ -116,7 +116,7 @@ static void __cpuinit set_cx86_reorder(void)
         setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */
 
         /* Load/Store Serialize to mem access disable (=reorder it) */
-        setCx86(CX86_PCR0, getCx86(CX86_PCR0) & ~0x80);
+        setCx86_old(CX86_PCR0, getCx86_old(CX86_PCR0) & ~0x80);
         /* set load/store serialize from 1GB to 4GB */
         ccr3 |= 0xe0;
         setCx86(CX86_CCR3, ccr3);
@@ -127,28 +127,11 @@ static void __cpuinit set_cx86_memwb(void)
         printk(KERN_INFO "Enable Memory-Write-back mode on Cyrix/NSC processor.\n");
 
         /* CCR2 bit 2: unlock NW bit */
-        setCx86(CX86_CCR2, getCx86(CX86_CCR2) & ~0x04);
+        setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) & ~0x04);
         /* set 'Not Write-through' */
         write_cr0(read_cr0() | X86_CR0_NW);
         /* CCR2 bit 2: lock NW bit and set WT1 */
-        setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x14);
-}
-
-static void __cpuinit set_cx86_inc(void)
-{
-        unsigned char ccr3;
-
-        printk(KERN_INFO "Enable Incrementor on Cyrix/NSC processor.\n");
-
-        ccr3 = getCx86(CX86_CCR3);
-        setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */
-        /* PCR1 -- Performance Control */
-        /* Incrementor on, whatever that is */
-        setCx86(CX86_PCR1, getCx86(CX86_PCR1) | 0x02);
-        /* PCR0 -- Performance Control */
-        /* Incrementor Margin 10 */
-        setCx86(CX86_PCR0, getCx86(CX86_PCR0) | 0x04);
-        setCx86(CX86_CCR3, ccr3);       /* disable MAPEN */
+        setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) | 0x14);
 }
 
 /*
@@ -162,19 +145,18 @@ static void __cpuinit geode_configure(void)
         local_irq_save(flags);
 
         /* Suspend on halt power saving and enable #SUSP pin */
-        setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88);
+        setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) | 0x88);
 
         ccr3 = getCx86(CX86_CCR3);
         setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10);       /* enable MAPEN */
 
 
         /* FPU fast, DTE cache, Mem bypass */
-        setCx86(CX86_CCR4, getCx86(CX86_CCR4) | 0x38);
+        setCx86_old(CX86_CCR4, getCx86_old(CX86_CCR4) | 0x38);
         setCx86(CX86_CCR3, ccr3);                       /* disable MAPEN */
 
         set_cx86_memwb();
         set_cx86_reorder();
-        set_cx86_inc();
 
         local_irq_restore(flags);
 }
@@ -286,7 +268,7 @@ static void __cpuinit init_cyrix(struct cpuinfo_x86 *c)
                 /* GXm supports extended cpuid levels 'ala' AMD */
                 if (c->cpuid_level == 2) {
                         /* Enable cxMMX extensions (GX1 Datasheet 54) */
-                        setCx86(CX86_CCR7, getCx86(CX86_CCR7) | 1);
+                        setCx86_old(CX86_CCR7, getCx86_old(CX86_CCR7) | 1);
 
                         /*
                          * GXm : 0x30 ... 0x5f GXm  datasheet 51
@@ -309,7 +291,7 @@ static void __cpuinit init_cyrix(struct cpuinfo_x86 *c)
                 if (dir1 > 7) {
                         dir0_msn++;  /* M II */
                         /* Enable MMX extensions (App note 108) */
-                        setCx86(CX86_CCR7, getCx86(CX86_CCR7)|1);
+                        setCx86_old(CX86_CCR7, getCx86_old(CX86_CCR7)|1);
                 } else {
                         c->coma_bug = 1;      /* 6x86MX, it has the bug. */
                 }
@@ -424,7 +406,7 @@ static void __cpuinit cyrix_identify(struct cpuinfo_x86 *c)
                         local_irq_save(flags);
                         ccr3 = getCx86(CX86_CCR3);
                         setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10);       /* enable MAPEN  */
-                        setCx86(CX86_CCR4, getCx86(CX86_CCR4) | 0x80);  /* enable cpuid  */
+                        setCx86_old(CX86_CCR4, getCx86_old(CX86_CCR4) | 0x80);  /* enable cpuid  */
                         setCx86(CX86_CCR3, ccr3);                       /* disable MAPEN */
                         local_irq_restore(flags);
                 }
diff --git a/arch/x86/kernel/cpu/feature_names.c b/arch/x86/kernel/cpu/feature_names.c
deleted file mode 100644
index 741547225659..000000000000
--- a/arch/x86/kernel/cpu/feature_names.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * Strings for the various x86 capability flags.
- *
- * This file must not contain any executable code.
- */
-
-#include <asm/cpufeature.h>
-
-/*
- * These flag bits must match the definitions in <asm/cpufeature.h>.
- * NULL means this bit is undefined or reserved; either way it doesn't
- * have meaning as far as Linux is concerned.  Note that it's important
- * to realize there is a difference between this table and CPUID -- if
- * applications want to get the raw CPUID data, they should access
- * /dev/cpu/<cpu_nr>/cpuid instead.
- */
-const char * const x86_cap_flags[NCAPINTS*32] = {
-        /* Intel-defined */
-        "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
-        "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
-        "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
-        "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", "pbe",
-
-        /* AMD-defined */
-        NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-        NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
-        NULL, NULL, NULL, "mp", "nx", NULL, "mmxext", NULL,
-        NULL, "fxsr_opt", "pdpe1gb", "rdtscp", NULL, "lm",
-        "3dnowext", "3dnow",
-
-        /* Transmeta-defined */
-        "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
-        NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-        NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-        NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-
-        /* Other (Linux-defined) */
-        "cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr",
-        NULL, NULL, NULL, NULL,
-        "constant_tsc", "up", NULL, "arch_perfmon",
-        "pebs", "bts", NULL, NULL,
-        "rep_good", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-        NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-
-        /* Intel-defined (#2) */
-        "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
-        "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
-        NULL, NULL, "dca", "sse4_1", "sse4_2", "x2apic", NULL, "popcnt",
-        NULL, NULL, "xsave", NULL, NULL, NULL, NULL, NULL,
-
-        /* VIA/Cyrix/Centaur-defined */
-        NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
-        "ace2", "ace2_en", "phe", "phe_en", "pmm", "pmm_en", NULL, NULL,
-        NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-        NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-
-        /* AMD-defined (#2) */
-        "lahf_lm", "cmp_legacy", "svm", "extapic",
-        "cr8_legacy", "abm", "sse4a", "misalignsse",
-        "3dnowprefetch", "osvw", "ibs", "sse5",
-        "skinit", "wdt", NULL, NULL,
-        NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-        NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-
-        /* Auxiliary (Linux-defined) */
-        "ida", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-        NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-        NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-        NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-};
-
-const char *const x86_power_flags[32] = {
-        "ts",   /* temperature sensor */
-        "fid",  /* frequency id control */
-        "vid",  /* voltage id control */
-        "ttp",  /* thermal trip */
-        "tm",
-        "stc",
-        "100mhzsteps",
-        "hwpstate",
-        "",     /* tsc invariant mapped to constant_tsc */
-                /* nothing */
-};
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index b75f2569b8f8..77618c717d76 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -23,13 +23,6 @@
 #include <mach_apic.h>
 #endif
 
-#ifdef CONFIG_X86_INTEL_USERCOPY
-/*
- * Alignment at which movsl is preferred for bulk memory copies.
- */
-struct movsl_mask movsl_mask __read_mostly;
-#endif
-
 static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
 {
         /* Netburst reports 64 bytes clflush size, but does IO in 128 bytes */
@@ -314,69 +307,5 @@ static struct cpu_dev intel_cpu_dev __cpuinitdata = {
 
 cpu_vendor_dev_register(X86_VENDOR_INTEL, &intel_cpu_dev);
 
-#ifndef CONFIG_X86_CMPXCHG
-unsigned long cmpxchg_386_u8(volatile void *ptr, u8 old, u8 new)
-{
-        u8 prev;
-        unsigned long flags;
-
-        /* Poor man's cmpxchg for 386. Unsuitable for SMP */
-        local_irq_save(flags);
-        prev = *(u8 *)ptr;
-        if (prev == old)
-                *(u8 *)ptr = new;
-        local_irq_restore(flags);
-        return prev;
-}
-EXPORT_SYMBOL(cmpxchg_386_u8);
-
-unsigned long cmpxchg_386_u16(volatile void *ptr, u16 old, u16 new)
-{
-        u16 prev;
-        unsigned long flags;
-
-        /* Poor man's cmpxchg for 386. Unsuitable for SMP */
-        local_irq_save(flags);
-        prev = *(u16 *)ptr;
-        if (prev == old)
-                *(u16 *)ptr = new;
-        local_irq_restore(flags);
-        return prev;
-}
-EXPORT_SYMBOL(cmpxchg_386_u16);
-
-unsigned long cmpxchg_386_u32(volatile void *ptr, u32 old, u32 new)
-{
-        u32 prev;
-        unsigned long flags;
-
-        /* Poor man's cmpxchg for 386. Unsuitable for SMP */
-        local_irq_save(flags);
-        prev = *(u32 *)ptr;
-        if (prev == old)
-                *(u32 *)ptr = new;
-        local_irq_restore(flags);
-        return prev;
-}
-EXPORT_SYMBOL(cmpxchg_386_u32);
-#endif
-
-#ifndef CONFIG_X86_CMPXCHG64
-unsigned long long cmpxchg_486_u64(volatile void *ptr, u64 old, u64 new)
-{
-        u64 prev;
-        unsigned long flags;
-
-        /* Poor man's cmpxchg8b for 386 and 486. Unsuitable for SMP */
-        local_irq_save(flags);
-        prev = *(u64 *)ptr;
-        if (prev == old)
-                *(u64 *)ptr = new;
-        local_irq_restore(flags);
-        return prev;
-}
-EXPORT_SYMBOL(cmpxchg_486_u64);
-#endif
-
 /* arch_initcall(intel_cpu_init); */
 
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 6b0a10b002f1..3f46afbb1cf1 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -1,8 +1,8 @@
 /*
- *      Routines to indentify caches on Intel CPU.
+ *      Routines to indentify caches on Intel CPU.
  *
- *      Changes:
- *      Venkatesh Pallipadi     : Adding cache identification through cpuid(4)
+ *      Changes:
+ *      Venkatesh Pallipadi     : Adding cache identification through cpuid(4)
  *              Ashok Raj <ashok.raj@intel.com>: Work with CPU hotplug infrastructure.
  *      Andi Kleen / Andreas Herrmann   : CPUID4 emulation on AMD.
  */
@@ -13,6 +13,7 @@
 #include <linux/compiler.h>
 #include <linux/cpu.h>
 #include <linux/sched.h>
+#include <linux/pci.h>
 
 #include <asm/processor.h>
 #include <asm/smp.h>
@@ -130,9 +131,18 @@ struct _cpuid4_info {
         union _cpuid4_leaf_ebx ebx;
         union _cpuid4_leaf_ecx ecx;
         unsigned long size;
+        unsigned long can_disable;
         cpumask_t shared_cpu_map;       /* future?: only cpus/node is needed */
 };
 
+#ifdef CONFIG_PCI
+static struct pci_device_id k8_nb_id[] = {
+        { PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x1103) },
+        { PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x1203) },
+        {}
+};
+#endif
+
 unsigned short                  num_cache_leaves;
 
 /* AMD doesn't have CPUID4. Emulate it here to report the same
@@ -182,9 +192,10 @@ static unsigned short assocs[] __cpuinitdata = {
 static unsigned char levels[] __cpuinitdata = { 1, 1, 2, 3 };
 static unsigned char types[] __cpuinitdata = { 1, 2, 3, 3 };
 
-static void __cpuinit amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
-                       union _cpuid4_leaf_ebx *ebx,
-                       union _cpuid4_leaf_ecx *ecx)
+static void __cpuinit
+amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
+                     union _cpuid4_leaf_ebx *ebx,
+                     union _cpuid4_leaf_ecx *ecx)
 {
         unsigned dummy;
         unsigned line_size, lines_per_tag, assoc, size_in_kb;
@@ -251,27 +262,40 @@ static void __cpuinit amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
                 (ebx->split.ways_of_associativity + 1) - 1;
 }
 
-static int __cpuinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf)
+static void __cpuinit
+amd_check_l3_disable(int index, struct _cpuid4_info *this_leaf)
+{
+        if (index < 3)
+                return;
+        this_leaf->can_disable = 1;
+}
+
+static int
+__cpuinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf)
 {
         union _cpuid4_leaf_eax  eax;
         union _cpuid4_leaf_ebx  ebx;
         union _cpuid4_leaf_ecx  ecx;
         unsigned                edx;
 
-        if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
+        if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
                 amd_cpuid4(index, &eax, &ebx, &ecx);
-        else
-                cpuid_count(4, index, &eax.full, &ebx.full, &ecx.full,  &edx);
+                if (boot_cpu_data.x86 >= 0x10)
+                        amd_check_l3_disable(index, this_leaf);
+        } else {
+                cpuid_count(4, index, &eax.full, &ebx.full, &ecx.full, &edx);
+        }
+
         if (eax.split.type == CACHE_TYPE_NULL)
                 return -EIO; /* better error ? */
 
         this_leaf->eax = eax;
         this_leaf->ebx = ebx;
         this_leaf->ecx = ecx;
-        this_leaf->size = (ecx.split.number_of_sets + 1) *
-                (ebx.split.coherency_line_size + 1) *
-                (ebx.split.physical_line_partition + 1) *
-                (ebx.split.ways_of_associativity + 1);
+        this_leaf->size = (ecx.split.number_of_sets          + 1) *
+                          (ebx.split.coherency_line_size     + 1) *
+                          (ebx.split.physical_line_partition + 1) *
+                          (ebx.split.ways_of_associativity   + 1);
         return 0;
 }
 
@@ -453,7 +477,7 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
 
 /* pointer to _cpuid4_info array (for each cache leaf) */
 static DEFINE_PER_CPU(struct _cpuid4_info *, cpuid4_info);
-#define CPUID4_INFO_IDX(x, y)    (&((per_cpu(cpuid4_info, x))[y]))
+#define CPUID4_INFO_IDX(x, y)   (&((per_cpu(cpuid4_info, x))[y]))
 
 #ifdef CONFIG_SMP
 static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
@@ -490,7 +514,7 @@ static void __cpuinit cache_remove_shared_cpu_map(unsigned int cpu, int index)
 
         this_leaf = CPUID4_INFO_IDX(cpu, index);
         for_each_cpu_mask_nr(sibling, this_leaf->shared_cpu_map) {
-                sibling_leaf = CPUID4_INFO_IDX(sibling, index); 
+                sibling_leaf = CPUID4_INFO_IDX(sibling, index);
                 cpu_clear(cpu, sibling_leaf->shared_cpu_map);
         }
 }
@@ -572,7 +596,7 @@ struct _index_kobject {
 
 /* pointer to array of kobjects for cpuX/cache/indexY */
 static DEFINE_PER_CPU(struct _index_kobject *, index_kobject);
-#define INDEX_KOBJECT_PTR(x, y)    (&((per_cpu(index_kobject, x))[y]))
+#define INDEX_KOBJECT_PTR(x, y)         (&((per_cpu(index_kobject, x))[y]))
 
 #define show_one_plus(file_name, object, val)                           \
 static ssize_t show_##file_name                                         \
@@ -637,6 +661,99 @@ static ssize_t show_type(struct _cpuid4_info *this_leaf, char *buf) {
         }
 }
 
+#define to_object(k)    container_of(k, struct _index_kobject, kobj)
+#define to_attr(a)      container_of(a, struct _cache_attr, attr)
+
+#ifdef CONFIG_PCI
+static struct pci_dev *get_k8_northbridge(int node)
+{
+        struct pci_dev *dev = NULL;
+        int i;
+
+        for (i = 0; i <= node; i++) {
+                do {
+                        dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
+                        if (!dev)
+                                break;
+                } while (!pci_match_id(&k8_nb_id[0], dev));
+                if (!dev)
+                        break;
+        }
+        return dev;
+}
+#else
+static struct pci_dev *get_k8_northbridge(int node)
+{
+        return NULL;
+}
+#endif
+
+static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf)
+{
+        int node = cpu_to_node(first_cpu(this_leaf->shared_cpu_map));
+        struct pci_dev *dev = NULL;
+        ssize_t ret = 0;
+        int i;
+
+        if (!this_leaf->can_disable)
+                return sprintf(buf, "Feature not enabled\n");
+
+        dev = get_k8_northbridge(node);
+        if (!dev) {
+                printk(KERN_ERR "Attempting AMD northbridge operation on a system with no northbridge\n");
+                return -EINVAL;
+        }
+
+        for (i = 0; i < 2; i++) {
+                unsigned int reg;
+
+                pci_read_config_dword(dev, 0x1BC + i * 4, &reg);
+
+                ret += sprintf(buf, "%sEntry: %d\n", buf, i);
+                ret += sprintf(buf, "%sReads:  %s\tNew Entries: %s\n",  
+                        buf,
+                        reg & 0x80000000 ? "Disabled" : "Allowed",
+                        reg & 0x40000000 ? "Disabled" : "Allowed");
+                ret += sprintf(buf, "%sSubCache: %x\tIndex: %x\n",
+                        buf, (reg & 0x30000) >> 16, reg & 0xfff);
+        }
+        return ret;
+}
+
+static ssize_t
+store_cache_disable(struct _cpuid4_info *this_leaf, const char *buf,
+                    size_t count)
+{
+        int node = cpu_to_node(first_cpu(this_leaf->shared_cpu_map));
+        struct pci_dev *dev = NULL;
+        unsigned int ret, index, val;
+
+        if (!this_leaf->can_disable)
+                return 0;
+
+        if (strlen(buf) > 15)
+                return -EINVAL;
+
+        ret = sscanf(buf, "%x %x", &index, &val);
+        if (ret != 2)
+                return -EINVAL;
+        if (index > 1)
+                return -EINVAL;
+
+        val |= 0xc0000000;
+        dev = get_k8_northbridge(node);
+        if (!dev) {
+                printk(KERN_ERR "Attempting AMD northbridge operation on a system with no northbridge\n");
+                return -EINVAL;
+        }
+
+        pci_write_config_dword(dev, 0x1BC + index * 4, val & ~0x40000000);
+        wbinvd();
+        pci_write_config_dword(dev, 0x1BC + index * 4, val);
+
+        return 1;
+}
+
 struct _cache_attr {
         struct attribute attr;
         ssize_t (*show)(struct _cpuid4_info *, char *);
@@ -657,6 +774,8 @@ define_one_ro(size);
 define_one_ro(shared_cpu_map);
 define_one_ro(shared_cpu_list);
 
+static struct _cache_attr cache_disable = __ATTR(cache_disable, 0644, show_cache_disable, store_cache_disable);
+
 static struct attribute * default_attrs[] = {
         &type.attr,
         &level.attr,
@@ -667,12 +786,10 @@ static struct attribute * default_attrs[] = {
         &size.attr,
         &shared_cpu_map.attr,
         &shared_cpu_list.attr,
+        &cache_disable.attr,
         NULL
 };
 
-#define to_object(k) container_of(k, struct _index_kobject, kobj)
-#define to_attr(a) container_of(a, struct _cache_attr, attr)
-
 static ssize_t show(struct kobject * kobj, struct attribute * attr, char * buf)
 {
         struct _cache_attr *fattr = to_attr(attr);
@@ -682,14 +799,22 @@ static ssize_t show(struct kobject * kobj, struct attribute * attr, char * buf)
         ret = fattr->show ?
                 fattr->show(CPUID4_INFO_IDX(this_leaf->cpu, this_leaf->index),
                         buf) :
-                0;
+                0;
         return ret;
 }
 
 static ssize_t store(struct kobject * kobj, struct attribute * attr,
                      const char * buf, size_t count)
 {
-        return 0;
+        struct _cache_attr *fattr = to_attr(attr);
+        struct _index_kobject *this_leaf = to_object(kobj);
+        ssize_t ret;
+
+        ret = fattr->store ?
+                fattr->store(CPUID4_INFO_IDX(this_leaf->cpu, this_leaf->index),
+                        buf, count) :
+                0;
+        return ret;
 }
 
 static struct sysfs_ops sysfs_ops = {
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c
index 65a339678ece..726a5fcdf341 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_64.c
@@ -759,6 +759,7 @@ static struct sysdev_class mce_sysclass = {
 };
 
 DEFINE_PER_CPU(struct sys_device, device_mce);
+void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu) __cpuinitdata;
 
 /* Why are there no generic functions for this? */
 #define ACCESSOR(name, var, start) \
@@ -883,9 +884,13 @@ static int __cpuinit mce_cpu_callback(struct notifier_block *nfb,
         case CPU_ONLINE:
         case CPU_ONLINE_FROZEN:
                 mce_create_device(cpu);
+                if (threshold_cpu_callback)
+                        threshold_cpu_callback(action, cpu);
                 break;
         case CPU_DEAD:
         case CPU_DEAD_FROZEN:
+                if (threshold_cpu_callback)
+                        threshold_cpu_callback(action, cpu);
                 mce_remove_device(cpu);
                 break;
         }
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
index 88736cadbaa6..5eb390a4b2e9 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
@@ -628,6 +628,7 @@ static void threshold_remove_bank(unsigned int cpu, int bank)
         deallocate_threshold_block(cpu, bank);
 
 free_out:
+        kobject_del(b->kobj);
         kobject_put(b->kobj);
         kfree(b);
         per_cpu(threshold_banks, cpu)[bank] = NULL;
@@ -645,14 +646,11 @@ static void threshold_remove_device(unsigned int cpu)
 }
 
 /* get notified when a cpu comes on/off */
-static int __cpuinit threshold_cpu_callback(struct notifier_block *nfb,
-                                            unsigned long action, void *hcpu)
+static void __cpuinit amd_64_threshold_cpu_callback(unsigned long action,
+                                                     unsigned int cpu)
 {
-        /* cpu was unsigned int to begin with */
-        unsigned int cpu = (unsigned long)hcpu;
-
         if (cpu >= NR_CPUS)
-                goto out;
+                return;
 
         switch (action) {
         case CPU_ONLINE:
@@ -666,14 +664,8 @@ static int __cpuinit threshold_cpu_callback(struct notifier_block *nfb,
         default:
                 break;
         }
-      out:
-        return NOTIFY_OK;
 }
 
-static struct notifier_block threshold_cpu_notifier __cpuinitdata = {
-        .notifier_call = threshold_cpu_callback,
-};
-
 static __init int threshold_init_device(void)
 {
         unsigned lcpu = 0;
@@ -684,7 +676,7 @@ static __init int threshold_init_device(void)
                 if (err)
                         return err;
         }
-        register_hotcpu_notifier(&threshold_cpu_notifier);
+        threshold_cpu_callback = amd_64_threshold_cpu_callback;
         return 0;
 }
 
diff --git a/arch/x86/kernel/cpu/mkcapflags.pl b/arch/x86/kernel/cpu/mkcapflags.pl
new file mode 100644
index 000000000000..dfea390e1608
--- /dev/null
+++ b/arch/x86/kernel/cpu/mkcapflags.pl
@@ -0,0 +1,32 @@
+#!/usr/bin/perl
+#
+# Generate the x86_cap_flags[] array from include/asm-x86/cpufeature.h
+#
+
+($in, $out) = @ARGV;
+
+open(IN, "< $in\0")   or die "$0: cannot open: $in: $!\n";
+open(OUT, "> $out\0") or die "$0: cannot create: $out: $!\n";
+
+print OUT "#include <asm/cpufeature.h>\n\n";
+print OUT "const char * const x86_cap_flags[NCAPINTS*32] = {\n";
+
+while (defined($line = <IN>)) {
+        if ($line =~ /^\s*\#\s*define\s+(X86_FEATURE_(\S+))\s+(.*)$/) {
+                $macro = $1;
+                $feature = $2;
+                $tail = $3;
+                if ($tail =~ /\/\*\s*\"([^"]*)\".*\*\//) {
+                        $feature = $1;
+                }
+
+                if ($feature ne '') {
+                        printf OUT "\t%-32s = \"%s\",\n",
+                                "[$macro]", "\L$feature";
+                }
+        }
+}
+print OUT "};\n";
+
+close(IN);
+close(OUT);
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
index 509bd3d9eacd..cb7d3b6a80eb 100644
--- a/arch/x86/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
@@ -379,6 +379,7 @@ static void generic_get_mtrr(unsigned int reg, unsigned long *base,
                              unsigned long *size, mtrr_type *type)
 {
         unsigned int mask_lo, mask_hi, base_lo, base_hi;
+        unsigned int tmp, hi;
 
         rdmsr(MTRRphysMask_MSR(reg), mask_lo, mask_hi);
         if ((mask_lo & 0x800) == 0) {
@@ -392,8 +393,23 @@ static void generic_get_mtrr(unsigned int reg, unsigned long *base,
         rdmsr(MTRRphysBase_MSR(reg), base_lo, base_hi);
 
         /* Work out the shifted address mask. */
-        mask_lo = size_or_mask | mask_hi << (32 - PAGE_SHIFT)
-            | mask_lo >> PAGE_SHIFT;
+        tmp = mask_hi << (32 - PAGE_SHIFT) | mask_lo >> PAGE_SHIFT;
+        mask_lo = size_or_mask | tmp;
+        /* Expand tmp with high bits to all 1s*/
+        hi = fls(tmp);
+        if (hi > 0) {
+                tmp |= ~((1<<(hi - 1)) - 1);
+
+                if (tmp != mask_lo) {
+                        static int once = 1;
+
+                        if (once) {
+                                printk(KERN_INFO "mtrr: your BIOS has set up an incorrect mask, fixing it up.\n");
+                                once = 0;
+                        }
+                        mask_lo = tmp;
+                }
+        }
 
         /* This works correctly if size is a power of two, i.e. a
            contiguous range. */
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index 6f23969c8faf..b117d7f8a564 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -1496,11 +1496,8 @@ int __init mtrr_trim_uncached_memory(unsigned long end_pfn)
 
         /* kvm/qemu doesn't have mtrr set right, don't trim them all */
         if (!highest_pfn) {
-                if (!kvm_para_available()) {
-                        printk(KERN_WARNING
+                WARN(!kvm_para_available(), KERN_WARNING
                                 "WARNING: strange, CPU MTRRs all blank?\n");
-                        WARN_ON(1);
-                }
                 return 0;
         }
 
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c
index de7439f82b92..05cc22dbd4ff 100644
--- a/arch/x86/kernel/cpu/perfctr-watchdog.c
+++ b/arch/x86/kernel/cpu/perfctr-watchdog.c
@@ -478,7 +478,13 @@ static int setup_p4_watchdog(unsigned nmi_hz)
                 perfctr_msr = MSR_P4_IQ_PERFCTR1;
                 evntsel_msr = MSR_P4_CRU_ESCR0;
                 cccr_msr = MSR_P4_IQ_CCCR1;
-                cccr_val = P4_CCCR_OVF_PMI1 | P4_CCCR_ESCR_SELECT(4);
+
+                /* Pentium 4 D processors don't support P4_CCCR_OVF_PMI1 */
+                if (boot_cpu_data.x86_model == 4 && boot_cpu_data.x86_mask == 4)
+                        cccr_val = P4_CCCR_OVF_PMI0;
+                else
+                        cccr_val = P4_CCCR_OVF_PMI1;
+                cccr_val |= P4_CCCR_ESCR_SELECT(4);
         }
 
         evntsel = P4_ESCR_EVENT_SELECT(0x3F)
diff --git a/arch/x86/kernel/cpu/powerflags.c b/arch/x86/kernel/cpu/powerflags.c
new file mode 100644
index 000000000000..5abbea297e0c
--- /dev/null
+++ b/arch/x86/kernel/cpu/powerflags.c
@@ -0,0 +1,20 @@
+/*
+ * Strings for the various x86 power flags
+ *
+ * This file must not contain any executable code.
+ */
+
+#include <asm/cpufeature.h>
+
+const char *const x86_power_flags[32] = {
+        "ts",   /* temperature sensor */
+        "fid",  /* frequency id control */
+        "vid",  /* voltage id control */
+        "ttp",  /* thermal trip */
+        "tm",
+        "stc",
+        "100mhzsteps",
+        "hwpstate",
+        "",     /* tsc invariant mapped to constant_tsc */
+                /* nothing */
+};
diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c
index 14b11b3be31c..8e9cd6a8ec12 100644
--- a/arch/x86/kernel/cpuid.c
+++ b/arch/x86/kernel/cpuid.c
@@ -89,6 +89,8 @@ static ssize_t cpuid_read(struct file *file, char __user *buf,
         struct cpuid_regs cmd;
         int cpu = iminor(file->f_path.dentry->d_inode);
         u64 pos = *ppos;
+        ssize_t bytes = 0;
+        int err = 0;
 
         if (count % 16)
                 return -EINVAL; /* Invalid chunk size */
@@ -96,14 +98,19 @@ static ssize_t cpuid_read(struct file *file, char __user *buf,
         for (; count; count -= 16) {
                 cmd.eax = pos;
                 cmd.ecx = pos >> 32;
-                smp_call_function_single(cpu, cpuid_smp_cpuid, &cmd, 1);
-                if (copy_to_user(tmp, &cmd, 16))
-                        return -EFAULT;
+                err = smp_call_function_single(cpu, cpuid_smp_cpuid, &cmd, 1);
+                if (err)
+                        break;
+                if (copy_to_user(tmp, &cmd, 16)) {
+                        err = -EFAULT;
+                        break;
+                }
                 tmp += 16;
+                bytes += 16;
                 *ppos = ++pos;
         }
 
-        return tmp - buf;
+        return bytes ? bytes : err;
 }
 
 static int cpuid_open(struct inode *inode, struct file *file)
diff --git a/arch/x86/kernel/efi_32.c b/arch/x86/kernel/efi_32.c
index 4b63c8e1f13b..5cab48ee61a4 100644
--- a/arch/x86/kernel/efi_32.c
+++ b/arch/x86/kernel/efi_32.c
@@ -53,7 +53,7 @@ void efi_call_phys_prelog(void)
          * directory. If I have PAE, I just need to duplicate one entry in
          * page directory.
          */
-        cr4 = read_cr4();
+        cr4 = read_cr4_safe();
 
         if (cr4 & X86_CR4_PAE) {
                 efi_bak_pg_dir_pointer[0].pgd =
@@ -91,7 +91,7 @@ void efi_call_phys_epilog(void)
         gdt_descr.size = GDT_SIZE - 1;
         load_gdt(&gdt_descr);
 
-        cr4 = read_cr4();
+        cr4 = read_cr4_safe();
 
         if (cr4 & X86_CR4_PAE) {
                 swapper_pg_dir[pgd_index(0)].pgd =
diff --git a/arch/x86/kernel/genx2apic_uv_x.c b/arch/x86/kernel/genx2apic_uv_x.c
index 3fe472223a99..99269beabc7c 100644
--- a/arch/x86/kernel/genx2apic_uv_x.c
+++ b/arch/x86/kernel/genx2apic_uv_x.c
@@ -285,7 +285,7 @@ static __init void map_low_mmrs(void)
 
 enum map_type {map_wb, map_uc};
 
-static void map_high(char *id, unsigned long base, int shift, enum map_type map_type)
+static __init void map_high(char *id, unsigned long base, int shift, enum map_type map_type)
 {
         unsigned long bytes, paddr;
 
@@ -356,7 +356,9 @@ static __init void uv_rtc_init(void)
                 sn_rtc_cycles_per_second = ticks_per_sec;
 }
 
-static __init void uv_system_init(void)
+static bool uv_system_inited;
+
+void __init uv_system_init(void)
 {
         union uvh_si_addr_map_config_u m_n_config;
         union uvh_node_id_u node_id;
@@ -446,6 +448,7 @@ static __init void uv_system_init(void)
         map_mmr_high(max_pnode);
         map_config_high(max_pnode);
         map_mmioh_high(max_pnode);
+        uv_system_inited = true;
 }
 
 /*
@@ -454,8 +457,7 @@ static __init void uv_system_init(void)
  */
 void __cpuinit uv_cpu_init(void)
 {
-        if (!uv_node_to_blade)
-                uv_system_init();
+        BUG_ON(!uv_system_inited);
 
         uv_blade_info[uv_numa_blade_id()].nr_online_cpus++;
 
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index 1b318e903bf6..9bfc4d72fb2e 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -88,6 +88,7 @@ void __init x86_64_start_kernel(char * real_mode_data)
         BUILD_BUG_ON(!(MODULES_VADDR > __START_KERNEL));
         BUILD_BUG_ON(!(((MODULES_END - 1) & PGDIR_MASK) ==
                                 (__START_KERNEL & PGDIR_MASK)));
+        BUILD_BUG_ON(__fix_to_virt(__end_of_fixed_addresses) <= MODULES_END);
 
         /* clear bss before set_intr_gate with early_idt_handler */
         clear_bss();
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index ad2b15a1334d..59fd3b6b1303 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -359,6 +359,7 @@ static int hpet_clocksource_register(void)
 int __init hpet_enable(void)
 {
         unsigned long id;
+        int i;
 
         if (!is_hpet_capable())
                 return 0;
@@ -369,6 +370,29 @@ int __init hpet_enable(void)
          * Read the period and check for a sane value:
          */
         hpet_period = hpet_readl(HPET_PERIOD);
+
+        /*
+         * AMD SB700 based systems with spread spectrum enabled use a
+         * SMM based HPET emulation to provide proper frequency
+         * setting. The SMM code is initialized with the first HPET
+         * register access and takes some time to complete. During
+         * this time the config register reads 0xffffffff. We check
+         * for max. 1000 loops whether the config register reads a non
+         * 0xffffffff value to make sure that HPET is up and running
+         * before we go further. A counting loop is safe, as the HPET
+         * access takes thousands of CPU cycles. On non SB700 based
+         * machines this check is only done once and has no side
+         * effects.
+         */
+        for (i = 0; hpet_readl(HPET_CFG) == 0xFFFFFFFF; i++) {
+                if (i == 1000) {
+                        printk(KERN_WARNING
+                               "HPET config register value = 0xFFFFFFFF. "
+                               "Disabling HPET\n");
+                        goto out_nohpet;
+                }
+        }
+
         if (hpet_period < HPET_MIN_PERIOD || hpet_period > HPET_MAX_PERIOD)
                 goto out_nohpet;
 
diff --git a/arch/x86/kernel/machine_kexec_32.c b/arch/x86/kernel/machine_kexec_32.c
index 9fe478d98406..0732adba05ca 100644
--- a/arch/x86/kernel/machine_kexec_32.c
+++ b/arch/x86/kernel/machine_kexec_32.c
@@ -12,6 +12,7 @@
 #include <linux/init.h>
 #include <linux/numa.h>
 #include <linux/ftrace.h>
+#include <linux/suspend.h>
 
 #include <asm/pgtable.h>
 #include <asm/pgalloc.h>
@@ -78,7 +79,7 @@ static void load_segments(void)
 /*
  * A architecture hook called to validate the
  * proposed image and prepare the control pages
- * as needed.  The pages for KEXEC_CONTROL_CODE_SIZE
+ * as needed.  The pages for KEXEC_CONTROL_PAGE_SIZE
  * have been allocated, but the segments have yet
  * been copied into the kernel.
  *
@@ -113,6 +114,7 @@ void machine_kexec(struct kimage *image)
 {
         unsigned long page_list[PAGES_NR];
         void *control_page;
+        int save_ftrace_enabled;
         asmlinkage unsigned long
                 (*relocate_kernel_ptr)(unsigned long indirection_page,
                                        unsigned long control_page,
@@ -120,7 +122,12 @@ void machine_kexec(struct kimage *image)
                                        unsigned int has_pae,
                                        unsigned int preserve_context);
 
-        tracer_disable();
+#ifdef CONFIG_KEXEC_JUMP
+        if (kexec_image->preserve_context)
+                save_processor_state();
+#endif
+
+        save_ftrace_enabled = __ftrace_enabled_save();
 
         /* Interrupts aren't acceptable while we reboot */
         local_irq_disable();
@@ -138,7 +145,7 @@ void machine_kexec(struct kimage *image)
         }
 
         control_page = page_address(image->control_code_page);
-        memcpy(control_page, relocate_kernel, PAGE_SIZE/2);
+        memcpy(control_page, relocate_kernel, KEXEC_CONTROL_CODE_MAX_SIZE);
 
         relocate_kernel_ptr = control_page;
         page_list[PA_CONTROL_PAGE] = __pa(control_page);
@@ -178,6 +185,13 @@ void machine_kexec(struct kimage *image)
                                            (unsigned long)page_list,
                                            image->start, cpu_has_pae,
                                            image->preserve_context);
+
+#ifdef CONFIG_KEXEC_JUMP
+        if (kexec_image->preserve_context)
+                restore_processor_state();
+#endif
+
+        __ftrace_enabled_restore(save_ftrace_enabled);
 }
 
 void arch_crash_save_vmcoreinfo(void)
diff --git a/arch/x86/kernel/mfgpt_32.c b/arch/x86/kernel/mfgpt_32.c
index 07c0f828f488..3b599518c322 100644
--- a/arch/x86/kernel/mfgpt_32.c
+++ b/arch/x86/kernel/mfgpt_32.c
@@ -33,6 +33,8 @@
 #include <linux/module.h>
 #include <asm/geode.h>
 
+#define MFGPT_DEFAULT_IRQ       7
+
 static struct mfgpt_timer_t {
         unsigned int avail:1;
 } mfgpt_timers[MFGPT_MAX_TIMERS];
@@ -157,29 +159,48 @@ int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable)
 }
 EXPORT_SYMBOL_GPL(geode_mfgpt_toggle_event);
 
-int geode_mfgpt_set_irq(int timer, int cmp, int irq, int enable)
+int geode_mfgpt_set_irq(int timer, int cmp, int *irq, int enable)
 {
-        u32 val, dummy;
-        int offset;
+        u32 zsel, lpc, dummy;
+        int shift;
 
         if (timer < 0 || timer >= MFGPT_MAX_TIMERS)
                 return -EIO;
 
-        if (geode_mfgpt_toggle_event(timer, cmp, MFGPT_EVENT_IRQ, enable))
+        /*
+         * Unfortunately, MFGPTs come in pairs sharing their IRQ lines. If VSA
+         * is using the same CMP of the timer's Siamese twin, the IRQ is set to
+         * 2, and we mustn't use nor change it.
+         * XXX: Likewise, 2 Linux drivers might clash if the 2nd overwrites the
+         * IRQ of the 1st. This can only happen if forcing an IRQ, calling this
+         * with *irq==0 is safe. Currently there _are_ no 2 drivers.
+         */
+        rdmsr(MSR_PIC_ZSEL_LOW, zsel, dummy);
+        shift = ((cmp == MFGPT_CMP1 ? 0 : 4) + timer % 4) * 4;
+        if (((zsel >> shift) & 0xF) == 2)
                 return -EIO;
 
-        rdmsr(MSR_PIC_ZSEL_LOW, val, dummy);
+        /* Choose IRQ: if none supplied, keep IRQ already set or use default */
+        if (!*irq)
+                *irq = (zsel >> shift) & 0xF;
+        if (!*irq)
+                *irq = MFGPT_DEFAULT_IRQ;
 
-        offset = (timer % 4) * 4;
-
-        val &= ~((0xF << offset) | (0xF << (offset + 16)));
+        /* Can't use IRQ if it's 0 (=disabled), 2, or routed to LPC */
+        if (*irq < 1 || *irq == 2 || *irq > 15)
+                return -EIO;
+        rdmsr(MSR_PIC_IRQM_LPC, lpc, dummy);
+        if (lpc & (1 << *irq))
+                return -EIO;
 
+        /* All chosen and checked - go for it */
+        if (geode_mfgpt_toggle_event(timer, cmp, MFGPT_EVENT_IRQ, enable))
+                return -EIO;
         if (enable) {
-                val |= (irq & 0x0F) << (offset);
-                val |= (irq & 0x0F) << (offset + 16);
+                zsel = (zsel & ~(0xF << shift)) | (*irq << shift);
+                wrmsr(MSR_PIC_ZSEL_LOW, zsel, dummy);
         }
 
-        wrmsr(MSR_PIC_ZSEL_LOW, val, dummy);
         return 0;
 }
 
@@ -242,7 +263,7 @@ EXPORT_SYMBOL_GPL(geode_mfgpt_alloc_timer);
 static unsigned int mfgpt_tick_mode = CLOCK_EVT_MODE_SHUTDOWN;
 static u16 mfgpt_event_clock;
 
-static int irq = 7;
+static int irq;
 static int __init mfgpt_setup(char *str)
 {
         get_option(&str, &irq);
@@ -346,7 +367,7 @@ int __init mfgpt_timer_setup(void)
         mfgpt_event_clock = timer;
 
         /* Set up the IRQ on the MFGPT side */
-        if (geode_mfgpt_setup_irq(mfgpt_event_clock, MFGPT_CMP2, irq)) {
+        if (geode_mfgpt_setup_irq(mfgpt_event_clock, MFGPT_CMP2, &irq)) {
                 printk(KERN_ERR "mfgpt-timer:  Could not set up IRQ %d\n", irq);
                 return -EIO;
         }
@@ -374,13 +395,14 @@ int __init mfgpt_timer_setup(void)
                         &mfgpt_clockevent);
 
         printk(KERN_INFO
-               "mfgpt-timer:  registering the MFGPT timer as a clock event.\n");
+               "mfgpt-timer:  Registering MFGPT timer %d as a clock event, using IRQ %d\n",
+               timer, irq);
         clockevents_register_device(&mfgpt_clockevent);
 
         return 0;
 
 err:
-        geode_mfgpt_release_irq(mfgpt_event_clock, MFGPT_CMP2, irq);
+        geode_mfgpt_release_irq(mfgpt_event_clock, MFGPT_CMP2, &irq);
         printk(KERN_ERR
                "mfgpt-timer:  Unable to set up the MFGPT clock source\n");
         return -EIO;
diff --git a/arch/x86/kernel/mmconf-fam10h_64.c b/arch/x86/kernel/mmconf-fam10h_64.c
index fdfdc550b366..efc2f361fe85 100644
--- a/arch/x86/kernel/mmconf-fam10h_64.c
+++ b/arch/x86/kernel/mmconf-fam10h_64.c
@@ -238,7 +238,7 @@ static struct dmi_system_id __devinitdata mmconf_dmi_table[] = {
         {}
 };
 
-void __init check_enable_amd_mmconf_dmi(void)
+void __cpuinit check_enable_amd_mmconf_dmi(void)
 {
         dmi_check_system(mmconf_dmi_table);
 }
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index e5d23675bb7c..f98f4e1dba09 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -49,7 +49,7 @@ static int __init mpf_checksum(unsigned char *mp, int len)
         return sum & 0xFF;
 }
 
-static void __cpuinit MP_processor_info(struct mpc_config_processor *m)
+static void __init MP_processor_info(struct mpc_config_processor *m)
 {
         int apicid;
         char *bootup_cpu = "";
@@ -486,7 +486,7 @@ static void __init construct_default_ioirq_mptable(int mpc_default_type)
 }
 
 
-static void construct_ioapic_table(int mpc_default_type)
+static void __init construct_ioapic_table(int mpc_default_type)
 {
         struct mpc_config_ioapic ioapic;
         struct mpc_config_bus bus;
@@ -531,7 +531,7 @@ static void construct_ioapic_table(int mpc_default_type)
         construct_default_ioirq_mptable(mpc_default_type);
 }
 #else
-static inline void construct_ioapic_table(int mpc_default_type) { }
+static inline void __init construct_ioapic_table(int mpc_default_type) { }
 #endif
 
 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 9fd809552447..2e2af5d18191 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -72,21 +72,28 @@ static ssize_t msr_read(struct file *file, char __user *buf,
         u32 data[2];
         u32 reg = *ppos;
         int cpu = iminor(file->f_path.dentry->d_inode);
-        int err;
+        int err = 0;
+        ssize_t bytes = 0;
 
         if (count % 8)
                 return -EINVAL; /* Invalid chunk size */
 
         for (; count; count -= 8) {
                 err = rdmsr_safe_on_cpu(cpu, reg, &data[0], &data[1]);
-                if (err)
-                        return -EIO;
-                if (copy_to_user(tmp, &data, 8))
-                        return -EFAULT;
+                if (err) {
+                        if (err == -EFAULT) /* Fix idiotic error code */
+                                err = -EIO;
+                        break;
+                }
+                if (copy_to_user(tmp, &data, 8)) {
+                        err = -EFAULT;
+                        break;
+                }
                 tmp += 2;
+                bytes += 8;
         }
 
-        return ((char __user *)tmp) - buf;
+        return bytes ? bytes : err;
 }
 
 static ssize_t msr_write(struct file *file, const char __user *buf,
@@ -96,21 +103,28 @@ static ssize_t msr_write(struct file *file, const char __user *buf,
         u32 data[2];
         u32 reg = *ppos;
         int cpu = iminor(file->f_path.dentry->d_inode);
-        int err;
+        int err = 0;
+        ssize_t bytes = 0;
 
         if (count % 8)
                 return -EINVAL; /* Invalid chunk size */
 
         for (; count; count -= 8) {
-                if (copy_from_user(&data, tmp, 8))
-                        return -EFAULT;
+                if (copy_from_user(&data, tmp, 8)) {
+                        err = -EFAULT;
+                        break;
+                }
                 err = wrmsr_safe_on_cpu(cpu, reg, data[0], data[1]);
-                if (err)
-                        return -EIO;
+                if (err) {
+                        if (err == -EFAULT) /* Fix idiotic error code */
+                                err = -EIO;
+                        break;
+                }
                 tmp += 2;
+                bytes += 8;
         }
 
-        return ((char __user *)tmp) - buf;
+        return bytes ? bytes : err;
 }
 
 static int msr_open(struct inode *inode, struct file *file)
@@ -131,7 +145,7 @@ static int msr_open(struct inode *inode, struct file *file)
                 ret = -EIO;     /* MSR not supported */
 out:
         unlock_kernel();
-        return 0;
+        return ret;
 }
 
 /*
diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c
index ac6d51222e7d..abb78a2cc4ad 100644
--- a/arch/x86/kernel/nmi.c
+++ b/arch/x86/kernel/nmi.c
@@ -114,6 +114,23 @@ static __init void nmi_cpu_busy(void *data)
 }
 #endif
 
+static void report_broken_nmi(int cpu, int *prev_nmi_count)
+{
+        printk(KERN_CONT "\n");
+
+        printk(KERN_WARNING
+                "WARNING: CPU#%d: NMI appears to be stuck (%d->%d)!\n",
+                        cpu, prev_nmi_count[cpu], get_nmi_count(cpu));
+
+        printk(KERN_WARNING
+                "Please report this to bugzilla.kernel.org,\n");
+        printk(KERN_WARNING
+                "and attach the output of the 'dmesg' command.\n");
+
+        per_cpu(wd_enabled, cpu) = 0;
+        atomic_dec(&nmi_active);
+}
+
 int __init check_nmi_watchdog(void)
 {
         unsigned int *prev_nmi_count;
@@ -141,15 +158,8 @@ int __init check_nmi_watchdog(void)
         for_each_online_cpu(cpu) {
                 if (!per_cpu(wd_enabled, cpu))
                         continue;
-                if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5) {
-                        printk(KERN_WARNING "WARNING: CPU#%d: NMI "
-                                "appears to be stuck (%d->%d)!\n",
-                                cpu,
-                                prev_nmi_count[cpu],
-                                get_nmi_count(cpu));
-                        per_cpu(wd_enabled, cpu) = 0;
-                        atomic_dec(&nmi_active);
-                }
+                if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5)
+                        report_broken_nmi(cpu, prev_nmi_count);
         }
         endflag = 1;
         if (!atomic_read(&nmi_active)) {
diff --git a/arch/x86/kernel/numaq_32.c b/arch/x86/kernel/numaq_32.c
index 2434467ddf72..4caff39078e0 100644
--- a/arch/x86/kernel/numaq_32.c
+++ b/arch/x86/kernel/numaq_32.c
@@ -73,7 +73,7 @@ static void __init smp_dump_qct(void)
 }
 
 
-void __init numaq_tsc_disable(void)
+void __cpuinit numaq_tsc_disable(void)
 {
         if (!found_numaq)
                 return;
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index 5744789a78f4..4090cd6f8436 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -469,7 +469,7 @@ struct pv_lock_ops pv_lock_ops = {
         .spin_unlock = __ticket_spin_unlock,
 #endif
 };
-EXPORT_SYMBOL_GPL(pv_lock_ops);
+EXPORT_SYMBOL(pv_lock_ops);
 
 EXPORT_SYMBOL_GPL(pv_time_ops);
 EXPORT_SYMBOL    (pv_cpu_ops);
diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c
index 02d19328525d..dcdac6c826e9 100644
--- a/arch/x86/kernel/pci-calgary_64.c
+++ b/arch/x86/kernel/pci-calgary_64.c
@@ -343,9 +343,8 @@ static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
         /* were we called with bad_dma_address? */
         badend = bad_dma_address + (EMERGENCY_PAGES * PAGE_SIZE);
         if (unlikely((dma_addr >= bad_dma_address) && (dma_addr < badend))) {
-                printk(KERN_ERR "Calgary: driver tried unmapping bad DMA "
+                WARN(1, KERN_ERR "Calgary: driver tried unmapping bad DMA "
                        "address 0x%Lx\n", dma_addr);
-                WARN_ON(1);
                 return;
         }
 
@@ -1269,13 +1268,15 @@ static inline int __init determine_tce_table_size(u64 ram)
 static int __init build_detail_arrays(void)
 {
         unsigned long ptr;
-        int i, scal_detail_size, rio_detail_size;
+        unsigned numnodes, i;
+        int scal_detail_size, rio_detail_size;
 
-        if (rio_table_hdr->num_scal_dev > MAX_NUMNODES){
+        numnodes = rio_table_hdr->num_scal_dev;
+        if (numnodes > MAX_NUMNODES){
                 printk(KERN_WARNING
                         "Calgary: MAX_NUMNODES too low! Defined as %d, "
                         "but system has %d nodes.\n",
-                        MAX_NUMNODES, rio_table_hdr->num_scal_dev);
+                        MAX_NUMNODES, numnodes);
                 return -ENODEV;
         }
 
@@ -1296,8 +1297,7 @@ static int __init build_detail_arrays(void)
         }
 
         ptr = ((unsigned long)rio_table_hdr) + 3;
-        for (i = 0; i < rio_table_hdr->num_scal_dev;
-                    i++, ptr += scal_detail_size)
+        for (i = 0; i < numnodes; i++, ptr += scal_detail_size)
                 scal_devs[i] = (struct scal_detail *)ptr;
 
         for (i = 0; i < rio_table_hdr->num_rio_dev;
@@ -1350,7 +1350,7 @@ static void calgary_init_bitmap_from_tce_table(struct iommu_table *tbl)
  * Function for kdump case. Get the tce tables from first kernel
  * by reading the contents of the base adress register of calgary iommu
  */
-static void get_tce_space_from_tar(void)
+static void __init get_tce_space_from_tar(void)
 {
         int bus;
         void __iomem *target;
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index 53bc653ed5ca..3b7a1ddcc0bc 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -95,7 +95,6 @@ static inline void play_dead(void)
 {
         /* This must be done before dead CPU ack */
         cpu_exit_clear();
-        wbinvd();
         mb();
         /* Ack it */
         __get_cpu_var(cpu_state) = CPU_DEAD;
@@ -104,8 +103,8 @@ static inline void play_dead(void)
          * With physical CPU hotplug, we should halt the cpu
          */
         local_irq_disable();
-        while (1)
-                halt();
+        /* mask all interrupts, flush any and all caches, and halt */
+        wbinvd_halt();
 }
 #else
 static inline void play_dead(void)
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 3fb62a7d9a16..71553b664e2a 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -93,14 +93,13 @@ DECLARE_PER_CPU(int, cpu_state);
 static inline void play_dead(void)
 {
         idle_task_exit();
-        wbinvd();
         mb();
         /* Ack it */
         __get_cpu_var(cpu_state) = CPU_DEAD;
 
         local_irq_disable();
-        while (1)
-                halt();
+        /* mask all interrupts, flush any and all caches, and halt */
+        wbinvd_halt();
 }
 #else
 static inline void play_dead(void)
diff --git a/arch/x86/kernel/relocate_kernel_32.S b/arch/x86/kernel/relocate_kernel_32.S
index 703310a99023..6f50664b2ba5 100644
--- a/arch/x86/kernel/relocate_kernel_32.S
+++ b/arch/x86/kernel/relocate_kernel_32.S
@@ -20,10 +20,11 @@
 #define PAGE_ATTR (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
 #define PAE_PGD_ATTR (_PAGE_PRESENT)
 
-/* control_page + PAGE_SIZE/2 ~ control_page + PAGE_SIZE * 3/4 are
- * used to save some data for jumping back
+/* control_page + KEXEC_CONTROL_CODE_MAX_SIZE
+ * ~ control_page + PAGE_SIZE are used as data storage and stack for
+ * jumping back
  */
-#define DATA(offset)            (PAGE_SIZE/2+(offset))
+#define DATA(offset)            (KEXEC_CONTROL_CODE_MAX_SIZE+(offset))
 
 /* Minimal CPU state */
 #define ESP                     DATA(0x0)
@@ -376,3 +377,6 @@ swap_pages:
         popl    %ebx
         popl    %ebp
         ret
+
+        .globl kexec_control_code_size
+.set kexec_control_code_size, . - relocate_kernel
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 59f07e14d083..673f12cf6eb0 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -445,7 +445,7 @@ static void __init reserve_early_setup_data(void)
  * @size: Size of the crashkernel memory to reserve.
  * Returns the base address on success, and -1ULL on failure.
  */
-unsigned long long find_and_reserve_crashkernel(unsigned long long size)
+unsigned long long __init find_and_reserve_crashkernel(unsigned long long size)
 {
         const unsigned long long alignment = 16<<20;    /* 16M */
         unsigned long long start = 0LL;
@@ -604,14 +604,6 @@ void __init setup_arch(char **cmdline_p)
         early_cpu_init();
         early_ioremap_init();
 
-#if defined(CONFIG_VMI) && defined(CONFIG_X86_32)
-        /*
-         * Must be before kernel pagetables are setup
-         * or fixmap area is touched.
-         */
-        vmi_init();
-#endif
-
         ROOT_DEV = old_decode_dev(boot_params.hdr.root_dev);
         screen_info = boot_params.screen_info;
         edid_info = boot_params.edid_info;
@@ -678,6 +670,14 @@ void __init setup_arch(char **cmdline_p)
 
         parse_early_param();
 
+#if defined(CONFIG_VMI) && defined(CONFIG_X86_32)
+        /*
+         * Must be before kernel pagetables are setup
+         * or fixmap area is touched.
+         */
+        vmi_init();
+#endif
+
         /* after early param, so could get panic from serial */
         reserve_early_setup_data();
 
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 04f78ab51b45..b25097c599a5 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -749,6 +749,14 @@ static void __cpuinit do_fork_idle(struct work_struct *work)
 }
 
 #ifdef CONFIG_X86_64
+
+/* __ref because it's safe to call free_bootmem when after_bootmem == 0. */
+static void __ref free_bootmem_pda(struct x8664_pda *oldpda)
+{
+        if (!after_bootmem)
+                free_bootmem((unsigned long)oldpda, sizeof(*oldpda));
+}
+
 /*
  * Allocate node local memory for the AP pda.
  *
@@ -777,8 +785,7 @@ int __cpuinit get_local_pda(int cpu)
 
         if (oldpda) {
                 memcpy(newpda, oldpda, size);
-                if (!after_bootmem)
-                        free_bootmem((unsigned long)oldpda, size);
+                free_bootmem_pda(oldpda);
         }
 
         newpda->in_bootmem = 0;
@@ -987,17 +994,7 @@ int __cpuinit native_cpu_up(unsigned int cpu)
         flush_tlb_all();
         low_mappings = 1;
 
-#ifdef CONFIG_X86_PC
-        if (def_to_bigsmp && apicid > 8) {
-                printk(KERN_WARNING
-                        "More than 8 CPUs detected - skipping them.\n"
-                        "Use CONFIG_X86_GENERICARCH and CONFIG_X86_BIGSMP.\n");
-                err = -1;
-        } else
-                err = do_boot_cpu(apicid, cpu);
-#else
         err = do_boot_cpu(apicid, cpu);
-#endif
 
         zap_low_mappings();
         low_mappings = 0;
@@ -1051,6 +1048,34 @@ static __init void disable_smp(void)
 static int __init smp_sanity_check(unsigned max_cpus)
 {
         preempt_disable();
+
+#if defined(CONFIG_X86_PC) && defined(CONFIG_X86_32)
+        if (def_to_bigsmp && nr_cpu_ids > 8) {
+                unsigned int cpu;
+                unsigned nr;
+
+                printk(KERN_WARNING
+                       "More than 8 CPUs detected - skipping them.\n"
+                       "Use CONFIG_X86_GENERICARCH and CONFIG_X86_BIGSMP.\n");
+
+                nr = 0;
+                for_each_present_cpu(cpu) {
+                        if (nr >= 8)
+                                cpu_clear(cpu, cpu_present_map);
+                        nr++;
+                }
+
+                nr = 0;
+                for_each_possible_cpu(cpu) {
+                        if (nr >= 8)
+                                cpu_clear(cpu, cpu_possible_map);
+                        nr++;
+                }
+
+                nr_cpu_ids = 8;
+        }
+#endif
+
         if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
                 printk(KERN_WARNING "weird, boot CPU (#%d) not listed"
                                     "by the BIOS.\n", hard_smp_processor_id());
@@ -1196,6 +1221,9 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
         printk(KERN_INFO "CPU%d: ", 0);
         print_cpu_info(&cpu_data(0));
         setup_boot_clock();
+
+        if (is_uv_system())
+                uv_system_init();
 out:
         preempt_enable();
 }
@@ -1386,17 +1414,3 @@ void __cpu_die(unsigned int cpu)
         BUG();
 }
 #endif
-
-/*
- * If the BIOS enumerates physical processors before logical,
- * maxcpus=N at enumeration-time can be used to disable HT.
- */
-static int __init parse_maxcpus(char *arg)
-{
-        extern unsigned int maxcpus;
-
-        if (arg)
-                maxcpus = simple_strtoul(arg, NULL, 0);
-        return 0;
-}
-early_param("maxcpus", parse_maxcpus);
diff --git a/arch/x86/kernel/smpcommon.c b/arch/x86/kernel/smpcommon.c
index 99941b37eca0..397e309839dd 100644
--- a/arch/x86/kernel/smpcommon.c
+++ b/arch/x86/kernel/smpcommon.c
@@ -8,18 +8,21 @@
 DEFINE_PER_CPU(unsigned long, this_cpu_off);
 EXPORT_PER_CPU_SYMBOL(this_cpu_off);
 
-/* Initialize the CPU's GDT.  This is either the boot CPU doing itself
-   (still using the master per-cpu area), or a CPU doing it for a
-   secondary which will soon come up. */
+/*
+ * Initialize the CPU's GDT.  This is either the boot CPU doing itself
+ * (still using the master per-cpu area), or a CPU doing it for a
+ * secondary which will soon come up.
+ */
 __cpuinit void init_gdt(int cpu)
 {
-        struct desc_struct *gdt = get_cpu_gdt_table(cpu);
+        struct desc_struct gdt;
 
-        pack_descriptor(&gdt[GDT_ENTRY_PERCPU],
-                        __per_cpu_offset[cpu], 0xFFFFF,
+        pack_descriptor(&gdt, __per_cpu_offset[cpu], 0xFFFFF,
                         0x2 | DESCTYPE_S, 0x8);
+        gdt.s = 1;
 
-        gdt[GDT_ENTRY_PERCPU].s = 1;
+        write_gdt_entry(get_cpu_gdt_table(cpu),
+                        GDT_ENTRY_PERCPU, &gdt, DESCTYPE_S);
 
         per_cpu(this_cpu_off, cpu) = __per_cpu_offset[cpu];
         per_cpu(cpu_number, cpu) = cpu;
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index d0fbb7712ab0..8b8c0d6640fa 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -17,6 +17,7 @@
 #include <asm/genapic.h>
 #include <asm/idle.h>
 #include <asm/tsc.h>
+#include <asm/irq_vectors.h>
 
 #include <mach_apic.h>
 
@@ -783,7 +784,7 @@ static int __init uv_bau_init(void)
                 uv_init_blade(blade, node, cur_cpu);
                 cur_cpu += uv_blade_nr_possible_cpus(blade);
         }
-        set_intr_gate(UV_BAU_MESSAGE, uv_bau_message_intr1);
+        alloc_intr_gate(UV_BAU_MESSAGE, uv_bau_message_intr1);
         uv_enable_timeouts();
 
         return 0;
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 7603c0553909..8e786b0d665a 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -104,7 +104,7 @@ __setup("notsc", notsc_setup);
 /*
  * Read TSC and the reference counters. Take care of SMI disturbance
  */
-static u64 __init tsc_read_refs(u64 *pm, u64 *hpet)
+static u64 tsc_read_refs(u64 *pm, u64 *hpet)
 {
         u64 t1, t2;
         int i;
@@ -314,7 +314,7 @@ static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
                         mark_tsc_unstable("cpufreq changes");
         }
 
-        set_cyc2ns_scale(tsc_khz_ref, freq->cpu);
+        set_cyc2ns_scale(tsc_khz, freq->cpu);
 
         return 0;
 }
@@ -325,6 +325,10 @@ static struct notifier_block time_cpufreq_notifier_block = {
 
 static int __init cpufreq_tsc(void)
 {
+        if (!cpu_has_tsc)
+                return 0;
+        if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
+                return 0;
         cpufreq_register_notifier(&time_cpufreq_notifier_block,
                                 CPUFREQ_TRANSITION_NOTIFIER);
         return 0;
diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c
index 0577825cf89b..9ffb01c31c40 100644
--- a/arch/x86/kernel/tsc_sync.c
+++ b/arch/x86/kernel/tsc_sync.c
@@ -88,11 +88,9 @@ static __cpuinit void check_tsc_warp(void)
                         __raw_spin_unlock(&sync_lock);
                 }
         }
-        if (!(now-start)) {
-                printk("Warning: zero tsc calibration delta: %Ld [max: %Ld]\n",
+        WARN(!(now-start),
+                "Warning: zero tsc calibration delta: %Ld [max: %Ld]\n",
                         now-start, end-start);
-                WARN_ON(1);
-        }
 }
 
 /*
diff --git a/arch/x86/kernel/visws_quirks.c b/arch/x86/kernel/visws_quirks.c
index 41e01b145c48..594ef47f0a63 100644
--- a/arch/x86/kernel/visws_quirks.c
+++ b/arch/x86/kernel/visws_quirks.c
@@ -184,8 +184,6 @@ static int __init visws_get_smp_config(unsigned int early)
         return 1;
 }
 
-extern unsigned int __cpuinitdata maxcpus;
-
 /*
  * The Visual Workstation is Intel MP compliant in the hardware
  * sense, but it doesn't have a BIOS(-configuration table).
@@ -244,8 +242,8 @@ static int __init visws_find_smp_config(unsigned int reserve)
                 ncpus = CO_CPU_MAX;
         }
 
-        if (ncpus > maxcpus)
-                ncpus = maxcpus;
+        if (ncpus > setup_max_cpus)
+                ncpus = setup_max_cpus;
 
 #ifdef CONFIG_X86_LOCAL_APIC
         smp_found_config = 1;
diff --git a/arch/x86/kernel/vmlinux_32.lds.S b/arch/x86/kernel/vmlinux_32.lds.S
index cdb2363697d2..af5bdad84604 100644
--- a/arch/x86/kernel/vmlinux_32.lds.S
+++ b/arch/x86/kernel/vmlinux_32.lds.S
@@ -209,3 +209,11 @@ SECTIONS
 
   DWARF_DEBUG
 }
+
+#ifdef CONFIG_KEXEC
+/* Link time checks */
+#include <asm/kexec.h>
+
+ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE,
+       "kexec control code size is too big")
+#endif