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authorIngo Molnar <mingo@elte.hu>2009-05-11 03:33:06 -0400
committerIngo Molnar <mingo@elte.hu>2009-05-11 03:50:02 -0400
commit7a309490da98981558a07183786201f02a6341e2 (patch)
tree204bfd3bc344dbb02be0b1eac29b956f6722e661 /arch/x86/kernel
parent9a8709d44139748fe2e0ab56d20d8c384c8b65ad (diff)
parent091bf7624d1c90cec9e578a18529f615213ff847 (diff)
Merge commit 'v2.6.30-rc5' into x86/apic
Merge reason: this branch was on a .30-rc2 base - sync it up with all the latest fixes. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel')
-rw-r--r--arch/x86/kernel/amd_iommu_init.c16
-rw-r--r--arch/x86/kernel/apic/io_apic.c2
-rw-r--r--arch/x86/kernel/apic/nmi.c5
-rw-r--r--arch/x86/kernel/apic/x2apic_uv_x.c15
-rw-r--r--arch/x86/kernel/cpu/common.c2
-rw-r--r--arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c30
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_64.c33
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_intel_64.c10
-rw-r--r--arch/x86/kernel/cpu/proc.c2
-rw-r--r--arch/x86/kernel/e820.c11
-rw-r--r--arch/x86/kernel/entry_64.S3
-rw-r--r--arch/x86/kernel/hpet.c24
-rw-r--r--arch/x86/kernel/i8253.c2
-rw-r--r--arch/x86/kernel/kvmclock.c7
-rw-r--r--arch/x86/kernel/machine_kexec_32.c4
-rw-r--r--arch/x86/kernel/machine_kexec_64.c4
-rw-r--r--arch/x86/kernel/microcode_core.c2
-rw-r--r--arch/x86/kernel/pci-swiotlb.c2
-rw-r--r--arch/x86/kernel/quirks.c2
-rw-r--r--arch/x86/kernel/tsc.c2
-rw-r--r--arch/x86/kernel/uv_time.c10
-rw-r--r--arch/x86/kernel/vmiclock_32.c2
-rw-r--r--arch/x86/kernel/xsave.c4
23 files changed, 121 insertions, 73 deletions
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index 42c33cebf00f..8c0be0902dac 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -49,10 +49,10 @@
49#define IVHD_DEV_EXT_SELECT 0x46 49#define IVHD_DEV_EXT_SELECT 0x46
50#define IVHD_DEV_EXT_SELECT_RANGE 0x47 50#define IVHD_DEV_EXT_SELECT_RANGE 0x47
51 51
52#define IVHD_FLAG_HT_TUN_EN 0x00 52#define IVHD_FLAG_HT_TUN_EN_MASK 0x01
53#define IVHD_FLAG_PASSPW_EN 0x01 53#define IVHD_FLAG_PASSPW_EN_MASK 0x02
54#define IVHD_FLAG_RESPASSPW_EN 0x02 54#define IVHD_FLAG_RESPASSPW_EN_MASK 0x04
55#define IVHD_FLAG_ISOC_EN 0x03 55#define IVHD_FLAG_ISOC_EN_MASK 0x08
56 56
57#define IVMD_FLAG_EXCL_RANGE 0x08 57#define IVMD_FLAG_EXCL_RANGE 0x08
58#define IVMD_FLAG_UNITY_MAP 0x01 58#define IVMD_FLAG_UNITY_MAP 0x01
@@ -569,19 +569,19 @@ static void __init init_iommu_from_acpi(struct amd_iommu *iommu,
569 * First set the recommended feature enable bits from ACPI 569 * First set the recommended feature enable bits from ACPI
570 * into the IOMMU control registers 570 * into the IOMMU control registers
571 */ 571 */
572 h->flags & IVHD_FLAG_HT_TUN_EN ? 572 h->flags & IVHD_FLAG_HT_TUN_EN_MASK ?
573 iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) : 573 iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) :
574 iommu_feature_disable(iommu, CONTROL_HT_TUN_EN); 574 iommu_feature_disable(iommu, CONTROL_HT_TUN_EN);
575 575
576 h->flags & IVHD_FLAG_PASSPW_EN ? 576 h->flags & IVHD_FLAG_PASSPW_EN_MASK ?
577 iommu_feature_enable(iommu, CONTROL_PASSPW_EN) : 577 iommu_feature_enable(iommu, CONTROL_PASSPW_EN) :
578 iommu_feature_disable(iommu, CONTROL_PASSPW_EN); 578 iommu_feature_disable(iommu, CONTROL_PASSPW_EN);
579 579
580 h->flags & IVHD_FLAG_RESPASSPW_EN ? 580 h->flags & IVHD_FLAG_RESPASSPW_EN_MASK ?
581 iommu_feature_enable(iommu, CONTROL_RESPASSPW_EN) : 581 iommu_feature_enable(iommu, CONTROL_RESPASSPW_EN) :
582 iommu_feature_disable(iommu, CONTROL_RESPASSPW_EN); 582 iommu_feature_disable(iommu, CONTROL_RESPASSPW_EN);
583 583
584 h->flags & IVHD_FLAG_ISOC_EN ? 584 h->flags & IVHD_FLAG_ISOC_EN_MASK ?
585 iommu_feature_enable(iommu, CONTROL_ISOC_EN) : 585 iommu_feature_enable(iommu, CONTROL_ISOC_EN) :
586 iommu_feature_disable(iommu, CONTROL_ISOC_EN); 586 iommu_feature_disable(iommu, CONTROL_ISOC_EN);
587 587
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index a80335ba12cc..2afe145d277f 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -3627,12 +3627,14 @@ int arch_setup_hpet_msi(unsigned int irq)
3627{ 3627{
3628 int ret; 3628 int ret;
3629 struct msi_msg msg; 3629 struct msi_msg msg;
3630 struct irq_desc *desc = irq_to_desc(irq);
3630 3631
3631 ret = msi_compose_msg(NULL, irq, &msg); 3632 ret = msi_compose_msg(NULL, irq, &msg);
3632 if (ret < 0) 3633 if (ret < 0)
3633 return ret; 3634 return ret;
3634 3635
3635 hpet_msi_write(irq, &msg); 3636 hpet_msi_write(irq, &msg);
3637 desc->status |= IRQ_MOVE_PCNTXT;
3636 set_irq_chip_and_handler_name(irq, &hpet_msi_type, handle_edge_irq, 3638 set_irq_chip_and_handler_name(irq, &hpet_msi_type, handle_edge_irq,
3637 "edge"); 3639 "edge");
3638 3640
diff --git a/arch/x86/kernel/apic/nmi.c b/arch/x86/kernel/apic/nmi.c
index d6bd62407152..ce4fbfa315a1 100644
--- a/arch/x86/kernel/apic/nmi.c
+++ b/arch/x86/kernel/apic/nmi.c
@@ -138,7 +138,7 @@ int __init check_nmi_watchdog(void)
138 if (!prev_nmi_count) 138 if (!prev_nmi_count)
139 goto error; 139 goto error;
140 140
141 alloc_cpumask_var(&backtrace_mask, GFP_KERNEL); 141 alloc_cpumask_var(&backtrace_mask, GFP_KERNEL|__GFP_ZERO);
142 printk(KERN_INFO "Testing NMI watchdog ... "); 142 printk(KERN_INFO "Testing NMI watchdog ... ");
143 143
144#ifdef CONFIG_SMP 144#ifdef CONFIG_SMP
@@ -414,7 +414,8 @@ nmi_watchdog_tick(struct pt_regs *regs, unsigned reason)
414 touched = 1; 414 touched = 1;
415 } 415 }
416 416
417 if (cpumask_test_cpu(cpu, backtrace_mask)) { 417 /* We can be called before check_nmi_watchdog, hence NULL check. */
418 if (backtrace_mask != NULL && cpumask_test_cpu(cpu, backtrace_mask)) {
418 static DEFINE_SPINLOCK(lock); /* Serialise the printks */ 419 static DEFINE_SPINLOCK(lock); /* Serialise the printks */
419 420
420 spin_lock(&lock); 421 spin_lock(&lock);
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 9d9e2281a829..780a733a5e7a 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -19,6 +19,7 @@
19#include <linux/timer.h> 19#include <linux/timer.h>
20#include <linux/cpu.h> 20#include <linux/cpu.h>
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/io.h>
22 23
23#include <asm/uv/uv_mmrs.h> 24#include <asm/uv/uv_mmrs.h>
24#include <asm/uv/uv_hub.h> 25#include <asm/uv/uv_hub.h>
@@ -34,6 +35,17 @@ DEFINE_PER_CPU(int, x2apic_extra_bits);
34 35
35static enum uv_system_type uv_system_type; 36static enum uv_system_type uv_system_type;
36 37
38static int early_get_nodeid(void)
39{
40 union uvh_node_id_u node_id;
41 unsigned long *mmr;
42
43 mmr = early_ioremap(UV_LOCAL_MMR_BASE | UVH_NODE_ID, sizeof(*mmr));
44 node_id.v = *mmr;
45 early_iounmap(mmr, sizeof(*mmr));
46 return node_id.s.node_id;
47}
48
37static int uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) 49static int uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
38{ 50{
39 if (!strcmp(oem_id, "SGI")) { 51 if (!strcmp(oem_id, "SGI")) {
@@ -42,6 +54,8 @@ static int uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
42 else if (!strcmp(oem_table_id, "UVX")) 54 else if (!strcmp(oem_table_id, "UVX"))
43 uv_system_type = UV_X2APIC; 55 uv_system_type = UV_X2APIC;
44 else if (!strcmp(oem_table_id, "UVH")) { 56 else if (!strcmp(oem_table_id, "UVH")) {
57 __get_cpu_var(x2apic_extra_bits) =
58 early_get_nodeid() << (UV_APIC_PNODE_SHIFT - 1);
45 uv_system_type = UV_NON_UNIQUE_APIC; 59 uv_system_type = UV_NON_UNIQUE_APIC;
46 return 1; 60 return 1;
47 } 61 }
@@ -641,6 +655,7 @@ void __init uv_system_init(void)
641 if (uv_node_to_blade[nid] >= 0) 655 if (uv_node_to_blade[nid] >= 0)
642 continue; 656 continue;
643 paddr = node_start_pfn(nid) << PAGE_SHIFT; 657 paddr = node_start_pfn(nid) << PAGE_SHIFT;
658 paddr = uv_soc_phys_ram_to_gpa(paddr);
644 pnode = (paddr >> m_val) & pnode_mask; 659 pnode = (paddr >> m_val) & pnode_mask;
645 blade = boot_pnode_to_blade(pnode); 660 blade = boot_pnode_to_blade(pnode);
646 uv_node_to_blade[nid] = blade; 661 uv_node_to_blade[nid] = blade;
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index c4f667896c28..c1caefc82e62 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1203,6 +1203,8 @@ void __cpuinit cpu_init(void)
1203 load_TR_desc(); 1203 load_TR_desc();
1204 load_LDT(&init_mm.context); 1204 load_LDT(&init_mm.context);
1205 1205
1206 t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
1207
1206#ifdef CONFIG_DOUBLEFAULT 1208#ifdef CONFIG_DOUBLEFAULT
1207 /* Set up doublefault TSS pointer in the GDT */ 1209 /* Set up doublefault TSS pointer in the GDT */
1208 __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss); 1210 __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss);
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
index ecdb682ab516..208ecf6643df 100644
--- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -65,14 +65,18 @@ enum {
65struct acpi_cpufreq_data { 65struct acpi_cpufreq_data {
66 struct acpi_processor_performance *acpi_data; 66 struct acpi_processor_performance *acpi_data;
67 struct cpufreq_frequency_table *freq_table; 67 struct cpufreq_frequency_table *freq_table;
68 unsigned int max_freq;
69 unsigned int resume; 68 unsigned int resume;
70 unsigned int cpu_feature; 69 unsigned int cpu_feature;
71 u64 saved_aperf, saved_mperf;
72}; 70};
73 71
74static DEFINE_PER_CPU(struct acpi_cpufreq_data *, drv_data); 72static DEFINE_PER_CPU(struct acpi_cpufreq_data *, drv_data);
75 73
74struct acpi_msr_data {
75 u64 saved_aperf, saved_mperf;
76};
77
78static DEFINE_PER_CPU(struct acpi_msr_data, msr_data);
79
76DEFINE_TRACE(power_mark); 80DEFINE_TRACE(power_mark);
77 81
78/* acpi_perf_data is a pointer to percpu data. */ 82/* acpi_perf_data is a pointer to percpu data. */
@@ -287,11 +291,11 @@ static unsigned int get_measured_perf(struct cpufreq_policy *policy,
287 return 0; 291 return 0;
288 292
289 cur.aperf.whole = readin.aperf.whole - 293 cur.aperf.whole = readin.aperf.whole -
290 per_cpu(drv_data, cpu)->saved_aperf; 294 per_cpu(msr_data, cpu).saved_aperf;
291 cur.mperf.whole = readin.mperf.whole - 295 cur.mperf.whole = readin.mperf.whole -
292 per_cpu(drv_data, cpu)->saved_mperf; 296 per_cpu(msr_data, cpu).saved_mperf;
293 per_cpu(drv_data, cpu)->saved_aperf = readin.aperf.whole; 297 per_cpu(msr_data, cpu).saved_aperf = readin.aperf.whole;
294 per_cpu(drv_data, cpu)->saved_mperf = readin.mperf.whole; 298 per_cpu(msr_data, cpu).saved_mperf = readin.mperf.whole;
295 299
296#ifdef __i386__ 300#ifdef __i386__
297 /* 301 /*
@@ -335,7 +339,7 @@ static unsigned int get_measured_perf(struct cpufreq_policy *policy,
335 339
336#endif 340#endif
337 341
338 retval = per_cpu(drv_data, policy->cpu)->max_freq * perf_percent / 100; 342 retval = (policy->cpuinfo.max_freq * perf_percent) / 100;
339 343
340 return retval; 344 return retval;
341} 345}
@@ -688,16 +692,11 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
688 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */ 692 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
689 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE && 693 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
690 policy->cpuinfo.transition_latency > 20 * 1000) { 694 policy->cpuinfo.transition_latency > 20 * 1000) {
691 static int print_once;
692 policy->cpuinfo.transition_latency = 20 * 1000; 695 policy->cpuinfo.transition_latency = 20 * 1000;
693 if (!print_once) { 696 printk_once(KERN_INFO "Capping off P-state tranision"
694 print_once = 1; 697 " latency at 20 uS\n");
695 printk(KERN_INFO "Capping off P-state tranision latency"
696 " at 20 uS\n");
697 }
698 } 698 }
699 699
700 data->max_freq = perf->states[0].core_frequency * 1000;
701 /* table init */ 700 /* table init */
702 for (i = 0; i < perf->state_count; i++) { 701 for (i = 0; i < perf->state_count; i++) {
703 if (i > 0 && perf->states[i].core_frequency >= 702 if (i > 0 && perf->states[i].core_frequency >=
@@ -716,6 +715,9 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
716 if (result) 715 if (result)
717 goto err_freqfree; 716 goto err_freqfree;
718 717
718 if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq)
719 printk(KERN_WARNING FW_WARN "P-state 0 is not max freq\n");
720
719 switch (perf->control_register.space_id) { 721 switch (perf->control_register.space_id) {
720 case ACPI_ADR_SPACE_SYSTEM_IO: 722 case ACPI_ADR_SPACE_SYSTEM_IO:
721 /* Current speed is unknown and not detectable by IO port */ 723 /* Current speed is unknown and not detectable by IO port */
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c
index 863f89568b1a..6fb0b359d2a5 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_64.c
@@ -239,9 +239,10 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
239 * Don't get the IP here because it's unlikely to 239 * Don't get the IP here because it's unlikely to
240 * have anything to do with the actual error location. 240 * have anything to do with the actual error location.
241 */ 241 */
242 242 if (!(flags & MCP_DONTLOG)) {
243 mce_log(&m); 243 mce_log(&m);
244 add_taint(TAINT_MACHINE_CHECK); 244 add_taint(TAINT_MACHINE_CHECK);
245 }
245 246
246 /* 247 /*
247 * Clear state for this bank. 248 * Clear state for this bank.
@@ -452,13 +453,14 @@ void mce_log_therm_throt_event(__u64 status)
452 */ 453 */
453 454
454static int check_interval = 5 * 60; /* 5 minutes */ 455static int check_interval = 5 * 60; /* 5 minutes */
455static int next_interval; /* in jiffies */ 456static DEFINE_PER_CPU(int, next_interval); /* in jiffies */
456static void mcheck_timer(unsigned long); 457static void mcheck_timer(unsigned long);
457static DEFINE_PER_CPU(struct timer_list, mce_timer); 458static DEFINE_PER_CPU(struct timer_list, mce_timer);
458 459
459static void mcheck_timer(unsigned long data) 460static void mcheck_timer(unsigned long data)
460{ 461{
461 struct timer_list *t = &per_cpu(mce_timer, data); 462 struct timer_list *t = &per_cpu(mce_timer, data);
463 int *n;
462 464
463 WARN_ON(smp_processor_id() != data); 465 WARN_ON(smp_processor_id() != data);
464 466
@@ -470,14 +472,14 @@ static void mcheck_timer(unsigned long data)
470 * Alert userspace if needed. If we logged an MCE, reduce the 472 * Alert userspace if needed. If we logged an MCE, reduce the
471 * polling interval, otherwise increase the polling interval. 473 * polling interval, otherwise increase the polling interval.
472 */ 474 */
475 n = &__get_cpu_var(next_interval);
473 if (mce_notify_user()) { 476 if (mce_notify_user()) {
474 next_interval = max(next_interval/2, HZ/100); 477 *n = max(*n/2, HZ/100);
475 } else { 478 } else {
476 next_interval = min(next_interval * 2, 479 *n = min(*n*2, (int)round_jiffies_relative(check_interval*HZ));
477 (int)round_jiffies_relative(check_interval*HZ));
478 } 480 }
479 481
480 t->expires = jiffies + next_interval; 482 t->expires = jiffies + *n;
481 add_timer(t); 483 add_timer(t);
482} 484}
483 485
@@ -584,7 +586,7 @@ static void mce_init(void *dummy)
584 * Log the machine checks left over from the previous reset. 586 * Log the machine checks left over from the previous reset.
585 */ 587 */
586 bitmap_fill(all_banks, MAX_NR_BANKS); 588 bitmap_fill(all_banks, MAX_NR_BANKS);
587 machine_check_poll(MCP_UC, &all_banks); 589 machine_check_poll(MCP_UC|(!mce_bootlog ? MCP_DONTLOG : 0), &all_banks);
588 590
589 set_in_cr4(X86_CR4_MCE); 591 set_in_cr4(X86_CR4_MCE);
590 592
@@ -632,14 +634,13 @@ static void mce_cpu_features(struct cpuinfo_x86 *c)
632static void mce_init_timer(void) 634static void mce_init_timer(void)
633{ 635{
634 struct timer_list *t = &__get_cpu_var(mce_timer); 636 struct timer_list *t = &__get_cpu_var(mce_timer);
637 int *n = &__get_cpu_var(next_interval);
635 638
636 /* data race harmless because everyone sets to the same value */ 639 *n = check_interval * HZ;
637 if (!next_interval) 640 if (!*n)
638 next_interval = check_interval * HZ;
639 if (!next_interval)
640 return; 641 return;
641 setup_timer(t, mcheck_timer, smp_processor_id()); 642 setup_timer(t, mcheck_timer, smp_processor_id());
642 t->expires = round_jiffies(jiffies + next_interval); 643 t->expires = round_jiffies(jiffies + *n);
643 add_timer(t); 644 add_timer(t);
644} 645}
645 646
@@ -907,7 +908,6 @@ static void mce_cpu_restart(void *data)
907/* Reinit MCEs after user configuration changes */ 908/* Reinit MCEs after user configuration changes */
908static void mce_restart(void) 909static void mce_restart(void)
909{ 910{
910 next_interval = check_interval * HZ;
911 on_each_cpu(mce_cpu_restart, NULL, 1); 911 on_each_cpu(mce_cpu_restart, NULL, 1);
912} 912}
913 913
@@ -1110,7 +1110,8 @@ static int __cpuinit mce_cpu_callback(struct notifier_block *nfb,
1110 break; 1110 break;
1111 case CPU_DOWN_FAILED: 1111 case CPU_DOWN_FAILED:
1112 case CPU_DOWN_FAILED_FROZEN: 1112 case CPU_DOWN_FAILED_FROZEN:
1113 t->expires = round_jiffies(jiffies + next_interval); 1113 t->expires = round_jiffies(jiffies +
1114 __get_cpu_var(next_interval));
1114 add_timer_on(t, cpu); 1115 add_timer_on(t, cpu);
1115 smp_call_function_single(cpu, mce_reenable_cpu, &action, 1); 1116 smp_call_function_single(cpu, mce_reenable_cpu, &action, 1);
1116 break; 1117 break;
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
index d6b72df89d69..cef3ee30744b 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
@@ -151,10 +151,11 @@ static void print_update(char *type, int *hdr, int num)
151static void cmci_discover(int banks, int boot) 151static void cmci_discover(int banks, int boot)
152{ 152{
153 unsigned long *owned = (void *)&__get_cpu_var(mce_banks_owned); 153 unsigned long *owned = (void *)&__get_cpu_var(mce_banks_owned);
154 unsigned long flags;
154 int hdr = 0; 155 int hdr = 0;
155 int i; 156 int i;
156 157
157 spin_lock(&cmci_discover_lock); 158 spin_lock_irqsave(&cmci_discover_lock, flags);
158 for (i = 0; i < banks; i++) { 159 for (i = 0; i < banks; i++) {
159 u64 val; 160 u64 val;
160 161
@@ -184,7 +185,7 @@ static void cmci_discover(int banks, int boot)
184 WARN_ON(!test_bit(i, __get_cpu_var(mce_poll_banks))); 185 WARN_ON(!test_bit(i, __get_cpu_var(mce_poll_banks)));
185 } 186 }
186 } 187 }
187 spin_unlock(&cmci_discover_lock); 188 spin_unlock_irqrestore(&cmci_discover_lock, flags);
188 if (hdr) 189 if (hdr)
189 printk(KERN_CONT "\n"); 190 printk(KERN_CONT "\n");
190} 191}
@@ -211,13 +212,14 @@ void cmci_recheck(void)
211 */ 212 */
212void cmci_clear(void) 213void cmci_clear(void)
213{ 214{
215 unsigned long flags;
214 int i; 216 int i;
215 int banks; 217 int banks;
216 u64 val; 218 u64 val;
217 219
218 if (!cmci_supported(&banks)) 220 if (!cmci_supported(&banks))
219 return; 221 return;
220 spin_lock(&cmci_discover_lock); 222 spin_lock_irqsave(&cmci_discover_lock, flags);
221 for (i = 0; i < banks; i++) { 223 for (i = 0; i < banks; i++) {
222 if (!test_bit(i, __get_cpu_var(mce_banks_owned))) 224 if (!test_bit(i, __get_cpu_var(mce_banks_owned)))
223 continue; 225 continue;
@@ -227,7 +229,7 @@ void cmci_clear(void)
227 wrmsrl(MSR_IA32_MC0_CTL2 + i, val); 229 wrmsrl(MSR_IA32_MC0_CTL2 + i, val);
228 __clear_bit(i, __get_cpu_var(mce_banks_owned)); 230 __clear_bit(i, __get_cpu_var(mce_banks_owned));
229 } 231 }
230 spin_unlock(&cmci_discover_lock); 232 spin_unlock_irqrestore(&cmci_discover_lock, flags);
231} 233}
232 234
233/* 235/*
diff --git a/arch/x86/kernel/cpu/proc.c b/arch/x86/kernel/cpu/proc.c
index f93047fed791..d5e30397246b 100644
--- a/arch/x86/kernel/cpu/proc.c
+++ b/arch/x86/kernel/cpu/proc.c
@@ -14,7 +14,7 @@ static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c,
14 if (c->x86_max_cores * smp_num_siblings > 1) { 14 if (c->x86_max_cores * smp_num_siblings > 1) {
15 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id); 15 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
16 seq_printf(m, "siblings\t: %d\n", 16 seq_printf(m, "siblings\t: %d\n",
17 cpumask_weight(cpu_sibling_mask(cpu))); 17 cpumask_weight(cpu_core_mask(cpu)));
18 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id); 18 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
19 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores); 19 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
20 seq_printf(m, "apicid\t\t: %d\n", c->apicid); 20 seq_printf(m, "apicid\t\t: %d\n", c->apicid);
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index ef2c3563357d..006281302925 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -1074,12 +1074,13 @@ u64 __init early_reserve_e820(u64 startt, u64 sizet, u64 align)
1074 u64 addr; 1074 u64 addr;
1075 u64 start; 1075 u64 start;
1076 1076
1077 start = startt; 1077 for (start = startt; ; start += size) {
1078 while (size < sizet && (start + 1))
1079 start = find_e820_area_size(start, &size, align); 1078 start = find_e820_area_size(start, &size, align);
1080 1079 if (!(start + 1))
1081 if (size < sizet) 1080 return 0;
1082 return 0; 1081 if (size >= sizet)
1082 break;
1083 }
1083 1084
1084#ifdef CONFIG_X86_32 1085#ifdef CONFIG_X86_32
1085 if (start >= MAXMEM) 1086 if (start >= MAXMEM)
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index a331ec38af9e..38946c6e8433 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -1410,7 +1410,10 @@ ENTRY(paranoid_exit)
1410paranoid_swapgs: 1410paranoid_swapgs:
1411 TRACE_IRQS_IRETQ 0 1411 TRACE_IRQS_IRETQ 0
1412 SWAPGS_UNSAFE_STACK 1412 SWAPGS_UNSAFE_STACK
1413 RESTORE_ALL 8
1414 jmp irq_return
1413paranoid_restore: 1415paranoid_restore:
1416 TRACE_IRQS_IRETQ 0
1414 RESTORE_ALL 8 1417 RESTORE_ALL 8
1415 jmp irq_return 1418 jmp irq_return
1416paranoid_userspace: 1419paranoid_userspace:
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index 648b3a2a3a44..81408b93f887 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -236,6 +236,10 @@ static void hpet_stop_counter(void)
236 unsigned long cfg = hpet_readl(HPET_CFG); 236 unsigned long cfg = hpet_readl(HPET_CFG);
237 cfg &= ~HPET_CFG_ENABLE; 237 cfg &= ~HPET_CFG_ENABLE;
238 hpet_writel(cfg, HPET_CFG); 238 hpet_writel(cfg, HPET_CFG);
239}
240
241static void hpet_reset_counter(void)
242{
239 hpet_writel(0, HPET_COUNTER); 243 hpet_writel(0, HPET_COUNTER);
240 hpet_writel(0, HPET_COUNTER + 4); 244 hpet_writel(0, HPET_COUNTER + 4);
241} 245}
@@ -250,6 +254,7 @@ static void hpet_start_counter(void)
250static void hpet_restart_counter(void) 254static void hpet_restart_counter(void)
251{ 255{
252 hpet_stop_counter(); 256 hpet_stop_counter();
257 hpet_reset_counter();
253 hpet_start_counter(); 258 hpet_start_counter();
254} 259}
255 260
@@ -309,7 +314,7 @@ static int hpet_setup_msi_irq(unsigned int irq);
309static void hpet_set_mode(enum clock_event_mode mode, 314static void hpet_set_mode(enum clock_event_mode mode,
310 struct clock_event_device *evt, int timer) 315 struct clock_event_device *evt, int timer)
311{ 316{
312 unsigned long cfg; 317 unsigned long cfg, cmp, now;
313 uint64_t delta; 318 uint64_t delta;
314 319
315 switch (mode) { 320 switch (mode) {
@@ -317,12 +322,23 @@ static void hpet_set_mode(enum clock_event_mode mode,
317 hpet_stop_counter(); 322 hpet_stop_counter();
318 delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * evt->mult; 323 delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * evt->mult;
319 delta >>= evt->shift; 324 delta >>= evt->shift;
325 now = hpet_readl(HPET_COUNTER);
326 cmp = now + (unsigned long) delta;
320 cfg = hpet_readl(HPET_Tn_CFG(timer)); 327 cfg = hpet_readl(HPET_Tn_CFG(timer));
321 /* Make sure we use edge triggered interrupts */ 328 /* Make sure we use edge triggered interrupts */
322 cfg &= ~HPET_TN_LEVEL; 329 cfg &= ~HPET_TN_LEVEL;
323 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC | 330 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
324 HPET_TN_SETVAL | HPET_TN_32BIT; 331 HPET_TN_SETVAL | HPET_TN_32BIT;
325 hpet_writel(cfg, HPET_Tn_CFG(timer)); 332 hpet_writel(cfg, HPET_Tn_CFG(timer));
333 hpet_writel(cmp, HPET_Tn_CMP(timer));
334 udelay(1);
335 /*
336 * HPET on AMD 81xx needs a second write (with HPET_TN_SETVAL
337 * cleared) to T0_CMP to set the period. The HPET_TN_SETVAL
338 * bit is automatically cleared after the first write.
339 * (See AMD-8111 HyperTransport I/O Hub Data Sheet,
340 * Publication # 24674)
341 */
326 hpet_writel((unsigned long) delta, HPET_Tn_CMP(timer)); 342 hpet_writel((unsigned long) delta, HPET_Tn_CMP(timer));
327 hpet_start_counter(); 343 hpet_start_counter();
328 hpet_print_config(); 344 hpet_print_config();
@@ -722,7 +738,7 @@ static int hpet_cpuhp_notify(struct notifier_block *n,
722/* 738/*
723 * Clock source related code 739 * Clock source related code
724 */ 740 */
725static cycle_t read_hpet(void) 741static cycle_t read_hpet(struct clocksource *cs)
726{ 742{
727 return (cycle_t)hpet_readl(HPET_COUNTER); 743 return (cycle_t)hpet_readl(HPET_COUNTER);
728} 744}
@@ -756,7 +772,7 @@ static int hpet_clocksource_register(void)
756 hpet_restart_counter(); 772 hpet_restart_counter();
757 773
758 /* Verify whether hpet counter works */ 774 /* Verify whether hpet counter works */
759 t1 = read_hpet(); 775 t1 = hpet_readl(HPET_COUNTER);
760 rdtscll(start); 776 rdtscll(start);
761 777
762 /* 778 /*
@@ -770,7 +786,7 @@ static int hpet_clocksource_register(void)
770 rdtscll(now); 786 rdtscll(now);
771 } while ((now - start) < 200000UL); 787 } while ((now - start) < 200000UL);
772 788
773 if (t1 == read_hpet()) { 789 if (t1 == hpet_readl(HPET_COUNTER)) {
774 printk(KERN_WARNING 790 printk(KERN_WARNING
775 "HPET counter not counting. HPET disabled\n"); 791 "HPET counter not counting. HPET disabled\n");
776 return -ENODEV; 792 return -ENODEV;
diff --git a/arch/x86/kernel/i8253.c b/arch/x86/kernel/i8253.c
index 3475440baa54..c2e0bb0890d4 100644
--- a/arch/x86/kernel/i8253.c
+++ b/arch/x86/kernel/i8253.c
@@ -129,7 +129,7 @@ void __init setup_pit_timer(void)
129 * to just read by itself. So use jiffies to emulate a free 129 * to just read by itself. So use jiffies to emulate a free
130 * running counter: 130 * running counter:
131 */ 131 */
132static cycle_t pit_read(void) 132static cycle_t pit_read(struct clocksource *cs)
133{ 133{
134 static int old_count; 134 static int old_count;
135 static u32 old_jifs; 135 static u32 old_jifs;
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index 137f2e8132df..223af43f1526 100644
--- a/arch/x86/kernel/kvmclock.c
+++ b/arch/x86/kernel/kvmclock.c
@@ -77,6 +77,11 @@ static cycle_t kvm_clock_read(void)
77 return ret; 77 return ret;
78} 78}
79 79
80static cycle_t kvm_clock_get_cycles(struct clocksource *cs)
81{
82 return kvm_clock_read();
83}
84
80/* 85/*
81 * If we don't do that, there is the possibility that the guest 86 * If we don't do that, there is the possibility that the guest
82 * will calibrate under heavy load - thus, getting a lower lpj - 87 * will calibrate under heavy load - thus, getting a lower lpj -
@@ -107,7 +112,7 @@ static void kvm_get_preset_lpj(void)
107 112
108static struct clocksource kvm_clock = { 113static struct clocksource kvm_clock = {
109 .name = "kvm-clock", 114 .name = "kvm-clock",
110 .read = kvm_clock_read, 115 .read = kvm_clock_get_cycles,
111 .rating = 400, 116 .rating = 400,
112 .mask = CLOCKSOURCE_MASK(64), 117 .mask = CLOCKSOURCE_MASK(64),
113 .mult = 1 << KVM_SCALE, 118 .mult = 1 << KVM_SCALE,
diff --git a/arch/x86/kernel/machine_kexec_32.c b/arch/x86/kernel/machine_kexec_32.c
index e7368c1da01d..c1c429d00130 100644
--- a/arch/x86/kernel/machine_kexec_32.c
+++ b/arch/x86/kernel/machine_kexec_32.c
@@ -194,7 +194,7 @@ void machine_kexec(struct kimage *image)
194 unsigned int preserve_context); 194 unsigned int preserve_context);
195 195
196#ifdef CONFIG_KEXEC_JUMP 196#ifdef CONFIG_KEXEC_JUMP
197 if (kexec_image->preserve_context) 197 if (image->preserve_context)
198 save_processor_state(); 198 save_processor_state();
199#endif 199#endif
200 200
@@ -253,7 +253,7 @@ void machine_kexec(struct kimage *image)
253 image->preserve_context); 253 image->preserve_context);
254 254
255#ifdef CONFIG_KEXEC_JUMP 255#ifdef CONFIG_KEXEC_JUMP
256 if (kexec_image->preserve_context) 256 if (image->preserve_context)
257 restore_processor_state(); 257 restore_processor_state();
258#endif 258#endif
259 259
diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c
index 89cea4d44679..84c3bf209e98 100644
--- a/arch/x86/kernel/machine_kexec_64.c
+++ b/arch/x86/kernel/machine_kexec_64.c
@@ -274,7 +274,7 @@ void machine_kexec(struct kimage *image)
274 int save_ftrace_enabled; 274 int save_ftrace_enabled;
275 275
276#ifdef CONFIG_KEXEC_JUMP 276#ifdef CONFIG_KEXEC_JUMP
277 if (kexec_image->preserve_context) 277 if (image->preserve_context)
278 save_processor_state(); 278 save_processor_state();
279#endif 279#endif
280 280
@@ -333,7 +333,7 @@ void machine_kexec(struct kimage *image)
333 image->preserve_context); 333 image->preserve_context);
334 334
335#ifdef CONFIG_KEXEC_JUMP 335#ifdef CONFIG_KEXEC_JUMP
336 if (kexec_image->preserve_context) 336 if (image->preserve_context)
337 restore_processor_state(); 337 restore_processor_state();
338#endif 338#endif
339 339
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 2e0eb4140951..98c470c069d1 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -380,8 +380,6 @@ static int mc_sysdev_add(struct sys_device *sys_dev)
380 return err; 380 return err;
381 381
382 err = microcode_init_cpu(cpu); 382 err = microcode_init_cpu(cpu);
383 if (err)
384 sysfs_remove_group(&sys_dev->kobj, &mc_attr_group);
385 383
386 return err; 384 return err;
387} 385}
diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index 34f12e9996ed..221a3853e268 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -50,7 +50,7 @@ static void *x86_swiotlb_alloc_coherent(struct device *hwdev, size_t size,
50 return swiotlb_alloc_coherent(hwdev, size, dma_handle, flags); 50 return swiotlb_alloc_coherent(hwdev, size, dma_handle, flags);
51} 51}
52 52
53struct dma_map_ops swiotlb_dma_ops = { 53static struct dma_map_ops swiotlb_dma_ops = {
54 .mapping_error = swiotlb_dma_mapping_error, 54 .mapping_error = swiotlb_dma_mapping_error,
55 .alloc_coherent = x86_swiotlb_alloc_coherent, 55 .alloc_coherent = x86_swiotlb_alloc_coherent,
56 .free_coherent = swiotlb_free_coherent, 56 .free_coherent = swiotlb_free_coherent,
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index e95022e4f5d5..7563b31b4f03 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -261,8 +261,6 @@ static void old_ich_force_enable_hpet_user(struct pci_dev *dev)
261{ 261{
262 if (hpet_force_user) 262 if (hpet_force_user)
263 old_ich_force_enable_hpet(dev); 263 old_ich_force_enable_hpet(dev);
264 else
265 hpet_print_force_info();
266} 264}
267 265
268DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, 266DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1,
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 7a567ebe6361..d57de05dc430 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -699,7 +699,7 @@ static struct clocksource clocksource_tsc;
699 * code, which is necessary to support wrapping clocksources like pm 699 * code, which is necessary to support wrapping clocksources like pm
700 * timer. 700 * timer.
701 */ 701 */
702static cycle_t read_tsc(void) 702static cycle_t read_tsc(struct clocksource *cs)
703{ 703{
704 cycle_t ret = (cycle_t)get_cycles(); 704 cycle_t ret = (cycle_t)get_cycles();
705 705
diff --git a/arch/x86/kernel/uv_time.c b/arch/x86/kernel/uv_time.c
index 2ffb6c53326e..583f11d5c480 100644
--- a/arch/x86/kernel/uv_time.c
+++ b/arch/x86/kernel/uv_time.c
@@ -29,7 +29,7 @@
29 29
30#define RTC_NAME "sgi_rtc" 30#define RTC_NAME "sgi_rtc"
31 31
32static cycle_t uv_read_rtc(void); 32static cycle_t uv_read_rtc(struct clocksource *cs);
33static int uv_rtc_next_event(unsigned long, struct clock_event_device *); 33static int uv_rtc_next_event(unsigned long, struct clock_event_device *);
34static void uv_rtc_timer_setup(enum clock_event_mode, 34static void uv_rtc_timer_setup(enum clock_event_mode,
35 struct clock_event_device *); 35 struct clock_event_device *);
@@ -123,7 +123,7 @@ static int uv_setup_intr(int cpu, u64 expires)
123 /* Initialize comparator value */ 123 /* Initialize comparator value */
124 uv_write_global_mmr64(pnode, UVH_INT_CMPB, expires); 124 uv_write_global_mmr64(pnode, UVH_INT_CMPB, expires);
125 125
126 return (expires < uv_read_rtc() && !uv_intr_pending(pnode)); 126 return (expires < uv_read_rtc(NULL) && !uv_intr_pending(pnode));
127} 127}
128 128
129/* 129/*
@@ -256,7 +256,7 @@ static int uv_rtc_unset_timer(int cpu)
256 256
257 spin_lock_irqsave(&head->lock, flags); 257 spin_lock_irqsave(&head->lock, flags);
258 258
259 if (head->next_cpu == bcpu && uv_read_rtc() >= *t) 259 if (head->next_cpu == bcpu && uv_read_rtc(NULL) >= *t)
260 rc = 1; 260 rc = 1;
261 261
262 *t = ULLONG_MAX; 262 *t = ULLONG_MAX;
@@ -278,7 +278,7 @@ static int uv_rtc_unset_timer(int cpu)
278/* 278/*
279 * Read the RTC. 279 * Read the RTC.
280 */ 280 */
281static cycle_t uv_read_rtc(void) 281static cycle_t uv_read_rtc(struct clocksource *cs)
282{ 282{
283 return (cycle_t)uv_read_local_mmr(UVH_RTC); 283 return (cycle_t)uv_read_local_mmr(UVH_RTC);
284} 284}
@@ -291,7 +291,7 @@ static int uv_rtc_next_event(unsigned long delta,
291{ 291{
292 int ced_cpu = cpumask_first(ced->cpumask); 292 int ced_cpu = cpumask_first(ced->cpumask);
293 293
294 return uv_rtc_set_timer(ced_cpu, delta + uv_read_rtc()); 294 return uv_rtc_set_timer(ced_cpu, delta + uv_read_rtc(NULL));
295} 295}
296 296
297/* 297/*
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c
index d303369a7bad..2b3eb82efeeb 100644
--- a/arch/x86/kernel/vmiclock_32.c
+++ b/arch/x86/kernel/vmiclock_32.c
@@ -283,7 +283,7 @@ void __devinit vmi_time_ap_init(void)
283/** vmi clocksource */ 283/** vmi clocksource */
284static struct clocksource clocksource_vmi; 284static struct clocksource clocksource_vmi;
285 285
286static cycle_t read_real_cycles(void) 286static cycle_t read_real_cycles(struct clocksource *cs)
287{ 287{
288 cycle_t ret = (cycle_t)vmi_timer_ops.get_cycle_counter(VMI_CYCLES_REAL); 288 cycle_t ret = (cycle_t)vmi_timer_ops.get_cycle_counter(VMI_CYCLES_REAL);
289 return max(ret, clocksource_vmi.cycle_last); 289 return max(ret, clocksource_vmi.cycle_last);
diff --git a/arch/x86/kernel/xsave.c b/arch/x86/kernel/xsave.c
index 0a5b04aa98f1..c5ee17e8c6d9 100644
--- a/arch/x86/kernel/xsave.c
+++ b/arch/x86/kernel/xsave.c
@@ -89,7 +89,7 @@ int save_i387_xstate(void __user *buf)
89 89
90 if (!used_math()) 90 if (!used_math())
91 return 0; 91 return 0;
92 clear_used_math(); /* trigger finit */ 92
93 if (task_thread_info(tsk)->status & TS_USEDFPU) { 93 if (task_thread_info(tsk)->status & TS_USEDFPU) {
94 /* 94 /*
95 * Start with clearing the user buffer. This will present a 95 * Start with clearing the user buffer. This will present a
@@ -114,6 +114,8 @@ int save_i387_xstate(void __user *buf)
114 return -1; 114 return -1;
115 } 115 }
116 116
117 clear_used_math(); /* trigger finit */
118
117 if (task_thread_info(tsk)->status & TS_XSAVE) { 119 if (task_thread_info(tsk)->status & TS_XSAVE) {
118 struct _fpstate __user *fx = buf; 120 struct _fpstate __user *fx = buf;
119 struct _xstate __user *x = buf; 121 struct _xstate __user *x = buf;