diff options
author | Joerg Roedel <joerg.roedel@amd.com> | 2008-08-14 13:55:15 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-08-15 07:56:46 -0400 |
commit | 519c31bacf78a969efa8d2e55ed8862848f28590 (patch) | |
tree | bbeb4cd9f810536beb3bb1c5e6a827fa35a37633 /arch/x86/kernel | |
parent | b635acec48bcaa9183fcbf4e3955616b0d4119b5 (diff) |
x86, AMD IOMMU: use status bit instead of memory write-back for completion wait
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel')
-rw-r--r-- | arch/x86/kernel/amd_iommu.c | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c index 22d7d050905d..028e945c68ad 100644 --- a/arch/x86/kernel/amd_iommu.c +++ b/arch/x86/kernel/amd_iommu.c | |||
@@ -101,16 +101,13 @@ static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) | |||
101 | */ | 101 | */ |
102 | static int iommu_completion_wait(struct amd_iommu *iommu) | 102 | static int iommu_completion_wait(struct amd_iommu *iommu) |
103 | { | 103 | { |
104 | int ret; | 104 | int ret, ready = 0; |
105 | unsigned status = 0; | ||
105 | struct iommu_cmd cmd; | 106 | struct iommu_cmd cmd; |
106 | volatile u64 ready = 0; | ||
107 | unsigned long ready_phys = virt_to_phys(&ready); | ||
108 | unsigned long i = 0; | 107 | unsigned long i = 0; |
109 | 108 | ||
110 | memset(&cmd, 0, sizeof(cmd)); | 109 | memset(&cmd, 0, sizeof(cmd)); |
111 | cmd.data[0] = LOW_U32(ready_phys) | CMD_COMPL_WAIT_STORE_MASK; | 110 | cmd.data[0] = CMD_COMPL_WAIT_INT_MASK; |
112 | cmd.data[1] = upper_32_bits(ready_phys); | ||
113 | cmd.data[2] = 1; /* value written to 'ready' */ | ||
114 | CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT); | 111 | CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT); |
115 | 112 | ||
116 | iommu->need_sync = 0; | 113 | iommu->need_sync = 0; |
@@ -122,9 +119,15 @@ static int iommu_completion_wait(struct amd_iommu *iommu) | |||
122 | 119 | ||
123 | while (!ready && (i < EXIT_LOOP_COUNT)) { | 120 | while (!ready && (i < EXIT_LOOP_COUNT)) { |
124 | ++i; | 121 | ++i; |
125 | cpu_relax(); | 122 | /* wait for the bit to become one */ |
123 | status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET); | ||
124 | ready = status & MMIO_STATUS_COM_WAIT_INT_MASK; | ||
126 | } | 125 | } |
127 | 126 | ||
127 | /* set bit back to zero */ | ||
128 | status &= ~MMIO_STATUS_COM_WAIT_INT_MASK; | ||
129 | writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET); | ||
130 | |||
128 | if (unlikely((i == EXIT_LOOP_COUNT) && printk_ratelimit())) | 131 | if (unlikely((i == EXIT_LOOP_COUNT) && printk_ratelimit())) |
129 | printk(KERN_WARNING "AMD IOMMU: Completion wait loop failed\n"); | 132 | printk(KERN_WARNING "AMD IOMMU: Completion wait loop failed\n"); |
130 | 133 | ||