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authorBorislav Petkov <borislav.petkov@amd.com>2009-02-03 10:24:22 -0500
committerH. Peter Anvin <hpa@zytor.com>2009-02-03 21:09:33 -0500
commit858770619debfb9269add63e4ba8b7c6b5538dd1 (patch)
treec2b5f39ce03ccc9c7481641e3c9b419dd9130c63 /arch/x86/kernel
parentbcde563c43f138aac3072ab8e2934859cd2ee183 (diff)
x86: APIC: enable workaround on AMD Fam10h CPUs
Impact: fix to enable APIC for AMD Fam10h on chipsets with a missing/b0rked ACPI MP table (MADT) Booting a 32bit kernel on an AMD Fam10h CPU running on chipsets with missing/b0rked MP table leads to a hang pretty early in the boot process due to the APIC not being initialized. Fix that by falling back to the default APIC base address in 32bit code, as it is done in the 64bit codepath. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/kernel')
-rw-r--r--arch/x86/kernel/apic.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c
index 4b6df2469fe3..115449f869ee 100644
--- a/arch/x86/kernel/apic.c
+++ b/arch/x86/kernel/apic.c
@@ -1436,7 +1436,7 @@ static int __init detect_init_APIC(void)
1436 switch (boot_cpu_data.x86_vendor) { 1436 switch (boot_cpu_data.x86_vendor) {
1437 case X86_VENDOR_AMD: 1437 case X86_VENDOR_AMD:
1438 if ((boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model > 1) || 1438 if ((boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model > 1) ||
1439 (boot_cpu_data.x86 == 15)) 1439 (boot_cpu_data.x86 >= 15))
1440 break; 1440 break;
1441 goto no_apic; 1441 goto no_apic;
1442 case X86_VENDOR_INTEL: 1442 case X86_VENDOR_INTEL: