Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, cpu: Fix detection of Celeron Covington stepping A1 and B0
  Documentation, ABI: Update L3 cache index disable text
  x86, AMD, cacheinfo: Fix L3 cache index disable checks
  x86, AMD, cacheinfo: Fix fallout caused by max3 conversion
  x86, cpu: Change NOP selection for certain Intel CPUs
  x86, cpu: Clean up and unify the NOP selection infrastructure
  x86, percpu: Use ASM_NOP4 instead of hardcoding P6_NOP4
  x86, cpu: Move AMD Elan Kconfig under "Processor family"

Fix up trivial conflicts in alternative handling (commit dc326fca2b64
"x86, cpu: Clean up and unify the NOP selection infrastructure" removed
some hacky 5-byte instruction stuff, while commit d430d3d7e646 "jump
label: Introduce static_branch() interface" renamed HAVE_JUMP_LABEL to
CONFIG_JUMP_LABEL in the code that went away)

6 files changed, 126 insertions, 113 deletions

diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index 1eeeafcb4410..a81f2d52f869 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -67,17 +67,30 @@ __setup("noreplace-paravirt", setup_noreplace_paravirt);
 #define DPRINTK(fmt, args...) if (debug_alternative) \
         printk(KERN_DEBUG fmt, args)
 
+/*
+ * Each GENERIC_NOPX is of X bytes, and defined as an array of bytes
+ * that correspond to that nop. Getting from one nop to the next, we
+ * add to the array the offset that is equal to the sum of all sizes of
+ * nops preceding the one we are after.
+ *
+ * Note: The GENERIC_NOP5_ATOMIC is at the end, as it breaks the
+ * nice symmetry of sizes of the previous nops.
+ */
 #if defined(GENERIC_NOP1) && !defined(CONFIG_X86_64)
-/* Use inline assembly to define this because the nops are defined
-   as inline assembly strings in the include files and we cannot
-   get them easily into strings. */
-asm("\t" __stringify(__INITRODATA_OR_MODULE) "\nintelnops: "
-        GENERIC_NOP1 GENERIC_NOP2 GENERIC_NOP3 GENERIC_NOP4 GENERIC_NOP5 GENERIC_NOP6
-        GENERIC_NOP7 GENERIC_NOP8
-    "\t.previous");
-extern const unsigned char intelnops[];
-static const unsigned char *const __initconst_or_module
-intel_nops[ASM_NOP_MAX+1] = {
+static const unsigned char intelnops[] =
+{
+        GENERIC_NOP1,
+        GENERIC_NOP2,
+        GENERIC_NOP3,
+        GENERIC_NOP4,
+        GENERIC_NOP5,
+        GENERIC_NOP6,
+        GENERIC_NOP7,
+        GENERIC_NOP8,
+        GENERIC_NOP5_ATOMIC
+};
+static const unsigned char * const intel_nops[ASM_NOP_MAX+2] =
+{
         NULL,
         intelnops,
         intelnops + 1,
@@ -87,17 +100,25 @@ intel_nops[ASM_NOP_MAX+1] = {
         intelnops + 1 + 2 + 3 + 4 + 5,
         intelnops + 1 + 2 + 3 + 4 + 5 + 6,
         intelnops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
+        intelnops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8,
 };
 #endif
 
 #ifdef K8_NOP1
-asm("\t" __stringify(__INITRODATA_OR_MODULE) "\nk8nops: "
-        K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
-        K8_NOP7 K8_NOP8
-    "\t.previous");
-extern const unsigned char k8nops[];
-static const unsigned char *const __initconst_or_module
-k8_nops[ASM_NOP_MAX+1] = {
+static const unsigned char k8nops[] =
+{
+        K8_NOP1,
+        K8_NOP2,
+        K8_NOP3,
+        K8_NOP4,
+        K8_NOP5,
+        K8_NOP6,
+        K8_NOP7,
+        K8_NOP8,
+        K8_NOP5_ATOMIC
+};
+static const unsigned char * const k8_nops[ASM_NOP_MAX+2] =
+{
         NULL,
         k8nops,
         k8nops + 1,
@@ -107,17 +128,25 @@ k8_nops[ASM_NOP_MAX+1] = {
         k8nops + 1 + 2 + 3 + 4 + 5,
         k8nops + 1 + 2 + 3 + 4 + 5 + 6,
         k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
+        k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8,
 };
 #endif
 
 #if defined(K7_NOP1) && !defined(CONFIG_X86_64)
-asm("\t" __stringify(__INITRODATA_OR_MODULE) "\nk7nops: "
-        K7_NOP1 K7_NOP2 K7_NOP3 K7_NOP4 K7_NOP5 K7_NOP6
-        K7_NOP7 K7_NOP8
-    "\t.previous");
-extern const unsigned char k7nops[];
-static const unsigned char *const __initconst_or_module
-k7_nops[ASM_NOP_MAX+1] = {
+static const unsigned char k7nops[] =
+{
+        K7_NOP1,
+        K7_NOP2,
+        K7_NOP3,
+        K7_NOP4,
+        K7_NOP5,
+        K7_NOP6,
+        K7_NOP7,
+        K7_NOP8,
+        K7_NOP5_ATOMIC
+};
+static const unsigned char * const k7_nops[ASM_NOP_MAX+2] =
+{
         NULL,
         k7nops,
         k7nops + 1,
@@ -127,17 +156,25 @@ k7_nops[ASM_NOP_MAX+1] = {
         k7nops + 1 + 2 + 3 + 4 + 5,
         k7nops + 1 + 2 + 3 + 4 + 5 + 6,
         k7nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
+        k7nops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8,
 };
 #endif
 
 #ifdef P6_NOP1
-asm("\t" __stringify(__INITRODATA_OR_MODULE) "\np6nops: "
-        P6_NOP1 P6_NOP2 P6_NOP3 P6_NOP4 P6_NOP5 P6_NOP6
-        P6_NOP7 P6_NOP8
-    "\t.previous");
-extern const unsigned char p6nops[];
-static const unsigned char *const __initconst_or_module
-p6_nops[ASM_NOP_MAX+1] = {
+static const unsigned char  __initconst_or_module p6nops[] =
+{
+        P6_NOP1,
+        P6_NOP2,
+        P6_NOP3,
+        P6_NOP4,
+        P6_NOP5,
+        P6_NOP6,
+        P6_NOP7,
+        P6_NOP8,
+        P6_NOP5_ATOMIC
+};
+static const unsigned char * const p6_nops[ASM_NOP_MAX+2] =
+{
         NULL,
         p6nops,
         p6nops + 1,
@@ -147,47 +184,65 @@ p6_nops[ASM_NOP_MAX+1] = {
         p6nops + 1 + 2 + 3 + 4 + 5,
         p6nops + 1 + 2 + 3 + 4 + 5 + 6,
         p6nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
+        p6nops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8,
 };
 #endif
 
+/* Initialize these to a safe default */
 #ifdef CONFIG_X86_64
+const unsigned char * const *ideal_nops = p6_nops;
+#else
+const unsigned char * const *ideal_nops = intel_nops;
+#endif
 
-extern char __vsyscall_0;
-static const unsigned char *const *__init_or_module find_nop_table(void)
+void __init arch_init_ideal_nops(void)
 {
-        if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
-            boot_cpu_has(X86_FEATURE_NOPL))
-                return p6_nops;
-        else
-                return k8_nops;
-}
-
-#else /* CONFIG_X86_64 */
+        switch (boot_cpu_data.x86_vendor) {
+        case X86_VENDOR_INTEL:
+                /*
+                 * Due to a decoder implementation quirk, some
+                 * specific Intel CPUs actually perform better with
+                 * the "k8_nops" than with the SDM-recommended NOPs.
+                 */
+                if (boot_cpu_data.x86 == 6 &&
+                    boot_cpu_data.x86_model >= 0x0f &&
+                    boot_cpu_data.x86_model != 0x1c &&
+                    boot_cpu_data.x86_model != 0x26 &&
+                    boot_cpu_data.x86_model != 0x27 &&
+                    boot_cpu_data.x86_model < 0x30) {
+                        ideal_nops = k8_nops;
+                } else if (boot_cpu_has(X86_FEATURE_NOPL)) {
+                           ideal_nops = p6_nops;
+                } else {
+#ifdef CONFIG_X86_64
+                        ideal_nops = k8_nops;
+#else
+                        ideal_nops = intel_nops;
+#endif
+                }
 
-static const unsigned char *const *__init_or_module find_nop_table(void)
-{
-        if (boot_cpu_has(X86_FEATURE_K8))
-                return k8_nops;
-        else if (boot_cpu_has(X86_FEATURE_K7))
-                return k7_nops;
-        else if (boot_cpu_has(X86_FEATURE_NOPL))
-                return p6_nops;
-        else
-                return intel_nops;
+        default:
+#ifdef CONFIG_X86_64
+                ideal_nops = k8_nops;
+#else
+                if (boot_cpu_has(X86_FEATURE_K8))
+                        ideal_nops = k8_nops;
+                else if (boot_cpu_has(X86_FEATURE_K7))
+                        ideal_nops = k7_nops;
+                else
+                        ideal_nops = intel_nops;
+#endif
+        }
 }
 
-#endif /* CONFIG_X86_64 */
-
 /* Use this to add nops to a buffer, then text_poke the whole buffer. */
 static void __init_or_module add_nops(void *insns, unsigned int len)
 {
-        const unsigned char *const *noptable = find_nop_table();
-
         while (len > 0) {
                 unsigned int noplen = len;
                 if (noplen > ASM_NOP_MAX)
                         noplen = ASM_NOP_MAX;
-                memcpy(insns, noptable[noplen], noplen);
+                memcpy(insns, ideal_nops[noplen], noplen);
                 insns += noplen;
                 len -= noplen;
         }
@@ -195,6 +250,7 @@ static void __init_or_module add_nops(void *insns, unsigned int len)
 
 extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
 extern s32 __smp_locks[], __smp_locks_end[];
+extern char __vsyscall_0;
 void *text_poke_early(void *addr, const void *opcode, size_t len);
 
 /* Replace instructions with better alternatives for this CPU type.
@@ -687,29 +743,3 @@ void __kprobes text_poke_smp_batch(struct text_poke_param *params, int n)
         wrote_text = 0;
         __stop_machine(stop_machine_text_poke, (void *)&tpp, NULL);
 }
-
-#if defined(CONFIG_DYNAMIC_FTRACE) || defined(CONFIG_JUMP_LABEL)
-
-#ifdef CONFIG_X86_64
-unsigned char ideal_nop5[5] = { 0x66, 0x66, 0x66, 0x66, 0x90 };
-#else
-unsigned char ideal_nop5[5] = { 0x3e, 0x8d, 0x74, 0x26, 0x00 };
-#endif
-
-void __init arch_init_ideal_nop5(void)
-{
-        /*
-         * There is no good nop for all x86 archs.  This selection
-         * algorithm should be unified with the one in find_nop_table(),
-         * but this should be good enough for now.
-         *
-         * For cases other than the ones below, use the safe (as in
-         * always functional) defaults above.
-         */
-#ifdef CONFIG_X86_64
-        /* Don't use these on 32 bits due to broken virtualizers */
-        if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
-                memcpy(ideal_nop5, p6_nops[5], 5);
-#endif
-}
-#endif
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index fc73a34ba8c9..1edf5ba4fb2b 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -411,12 +411,10 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
 
                 switch (c->x86_model) {
                 case 5:
-                        if (c->x86_mask == 0) {
-                                if (l2 == 0)
-                                        p = "Celeron (Covington)";
-                                else if (l2 == 256)
-                                        p = "Mobile Pentium II (Dixon)";
-                        }
+                        if (l2 == 0)
+                                p = "Celeron (Covington)";
+                        else if (l2 == 256)
+                                p = "Mobile Pentium II (Dixon)";
                         break;
 
                 case 6:
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 1ce1af2899df..c105c533ed94 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -327,7 +327,6 @@ static void __cpuinit amd_calc_l3_indices(struct amd_l3_cache *l3)
         l3->subcaches[2] = sc2 = !(val & BIT(8))  + !(val & BIT(9));
         l3->subcaches[3] = sc3 = !(val & BIT(12)) + !(val & BIT(13));
 
-        l3->indices = (max(max(max(sc0, sc1), sc2), sc3) << 10) - 1;
         l3->indices = (max(max3(sc0, sc1, sc2), sc3) << 10) - 1;
 }
 
@@ -454,27 +453,16 @@ int amd_set_l3_disable_slot(struct amd_l3_cache *l3, int cpu, unsigned slot,
 {
         int ret = 0;
 
-#define SUBCACHE_MASK   (3UL << 20)
-#define SUBCACHE_INDEX  0xfff
-
-        /*
-         * check whether this slot is already used or
-         * the index is already disabled
-         */
+        /*  check if @slot is already used or the index is already disabled */
         ret = amd_get_l3_disable_slot(l3, slot);
         if (ret >= 0)
                 return -EINVAL;
 
-        /*
-         * check whether the other slot has disabled the
-         * same index already
-         */
-        if (index == amd_get_l3_disable_slot(l3, !slot))
+        if (index > l3->indices)
                 return -EINVAL;
 
-        /* do not allow writes outside of allowed bits */
-        if ((index & ~(SUBCACHE_MASK | SUBCACHE_INDEX)) ||
-            ((index & SUBCACHE_INDEX) > l3->indices))
+        /* check whether the other slot has disabled the same index already */
+        if (index == amd_get_l3_disable_slot(l3, !slot))
                 return -EINVAL;
 
         amd_l3_disable_index(l3, cpu, slot, index);
diff --git a/arch/x86/kernel/ftrace.c b/arch/x86/kernel/ftrace.c
index a93742a57468..0ba15a6cc57e 100644
--- a/arch/x86/kernel/ftrace.c
+++ b/arch/x86/kernel/ftrace.c
@@ -260,9 +260,9 @@ do_ftrace_mod_code(unsigned long ip, void *new_code)
         return mod_code_status;
 }
 
-static unsigned char *ftrace_nop_replace(void)
+static const unsigned char *ftrace_nop_replace(void)
 {
-        return ideal_nop5;
+        return ideal_nops[NOP_ATOMIC5];
 }
 
 static int
diff --git a/arch/x86/kernel/jump_label.c b/arch/x86/kernel/jump_label.c
index 961b6b30ba90..3fee346ef545 100644
--- a/arch/x86/kernel/jump_label.c
+++ b/arch/x86/kernel/jump_label.c
@@ -34,7 +34,7 @@ void arch_jump_label_transform(struct jump_entry *entry,
                 code.offset = entry->target -
                                 (entry->code + JUMP_LABEL_NOP_SIZE);
         } else
-                memcpy(&code, ideal_nop5, JUMP_LABEL_NOP_SIZE);
+                memcpy(&code, ideal_nops[NOP_ATOMIC5], JUMP_LABEL_NOP_SIZE);
         get_online_cpus();
         mutex_lock(&text_mutex);
         text_poke_smp((void *)entry->code, &code, JUMP_LABEL_NOP_SIZE);
@@ -44,7 +44,8 @@ void arch_jump_label_transform(struct jump_entry *entry,
 
 void arch_jump_label_text_poke_early(jump_label_t addr)
 {
-        text_poke_early((void *)addr, ideal_nop5, JUMP_LABEL_NOP_SIZE);
+        text_poke_early((void *)addr, ideal_nops[NOP_ATOMIC5],
+                        JUMP_LABEL_NOP_SIZE);
 }
 
 #endif
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 4be9b398470e..c3050af9306d 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -691,8 +691,6 @@ early_param("reservelow", parse_reservelow);
 
 void __init setup_arch(char **cmdline_p)
 {
-        unsigned long flags;
-
 #ifdef CONFIG_X86_32
         memcpy(&boot_cpu_data, &new_cpu_data, sizeof(new_cpu_data));
         visws_early_detect();
@@ -1041,9 +1039,7 @@ void __init setup_arch(char **cmdline_p)
 
         mcheck_init();
 
-        local_irq_save(flags);
-        arch_init_ideal_nop5();
-        local_irq_restore(flags);
+        arch_init_ideal_nops();
 }
 
 #ifdef CONFIG_X86_32