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authorAndreas Herrmann <andreas.herrmann3@amd.com>2010-09-30 08:43:16 -0400
committerH. Peter Anvin <hpa@linux.intel.com>2010-10-01 19:18:32 -0400
commit5c80cc78de46aef6cd5e714208da05c3f7f548f8 (patch)
tree7d2c68258b1604e2a87213c7f61d52854ead62d8 /arch/x86/kernel
parentd4fbe4f03557e1fd4d9bbb3a1957aad560f39e96 (diff)
x86, amd_nb: Enable GART support for AMD family 0x15 CPUs
AMD CPU family 0x15 still supports GART for compatibility reasons. Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> LKML-Reference: <20100930124316.GG20545@loge.amd.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch/x86/kernel')
-rw-r--r--arch/x86/kernel/amd_nb.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index 4ffc38df7ac5..8f6463d8ed0d 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -15,6 +15,7 @@ static u32 *flush_words;
15struct pci_device_id k8_nb_ids[] = { 15struct pci_device_id k8_nb_ids[] = {
16 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC) }, 16 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC) },
17 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) }, 17 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) },
18 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_MISC) },
18 {} 19 {}
19}; 20};
20EXPORT_SYMBOL(k8_nb_ids); 21EXPORT_SYMBOL(k8_nb_ids);
@@ -45,7 +46,8 @@ int cache_k8_northbridges(void)
45 k8_northbridges.num++; 46 k8_northbridges.num++;
46 47
47 /* some CPU families (e.g. family 0x11) do not support GART */ 48 /* some CPU families (e.g. family 0x11) do not support GART */
48 if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10) 49 if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10 ||
50 boot_cpu_data.x86 == 0x15)
49 k8_northbridges.gart_supported = 1; 51 k8_northbridges.gart_supported = 1;
50 52
51 k8_northbridges.nb_misc = kmalloc((k8_northbridges.num + 1) * 53 k8_northbridges.nb_misc = kmalloc((k8_northbridges.num + 1) *