diff options
author | Ingo Molnar <mingo@elte.hu> | 2009-11-17 04:16:43 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-11-17 04:17:47 -0500 |
commit | a7b63425a41cd6a8d50f76fef0660c5110f97e91 (patch) | |
tree | be17ee121f1c8814d8d39c9f3e0205d9397fab54 /arch/x86/kernel | |
parent | 35039eb6b199749943547c8572be6604edf00229 (diff) | |
parent | 3726cc75e581c157202da93bb2333cce25c15c98 (diff) |
Merge branch 'perf/core' into perf/probes
Resolved merge conflict in tools/perf/Makefile
Merge reason: we want to queue up a dependent patch.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel')
-rw-r--r-- | arch/x86/kernel/acpi/realmode/wakeup.lds.S | 3 | ||||
-rw-r--r-- | arch/x86/kernel/amd_iommu.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/amd_iommu_init.c | 24 | ||||
-rw-r--r-- | arch/x86/kernel/apic/x2apic_uv_x.c | 8 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce.c | 3 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/mtrr/cleanup.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/perf_event.c | 20 | ||||
-rw-r--r-- | arch/x86/kernel/crash_dump_32.c | 19 | ||||
-rw-r--r-- | arch/x86/kernel/efi.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/microcode_amd.c | 6 | ||||
-rw-r--r-- | arch/x86/kernel/pci-dma.c | 6 | ||||
-rw-r--r-- | arch/x86/kernel/process_64.c | 5 | ||||
-rw-r--r-- | arch/x86/kernel/reboot.c | 8 | ||||
-rw-r--r-- | arch/x86/kernel/setup.c | 7 | ||||
-rw-r--r-- | arch/x86/kernel/tlb_uv.c | 9 | ||||
-rw-r--r-- | arch/x86/kernel/vmlinux.lds.S | 3 |
16 files changed, 100 insertions, 27 deletions
diff --git a/arch/x86/kernel/acpi/realmode/wakeup.lds.S b/arch/x86/kernel/acpi/realmode/wakeup.lds.S index 7da00b799cda..060fff8f5c5b 100644 --- a/arch/x86/kernel/acpi/realmode/wakeup.lds.S +++ b/arch/x86/kernel/acpi/realmode/wakeup.lds.S | |||
@@ -57,5 +57,8 @@ SECTIONS | |||
57 | *(.note*) | 57 | *(.note*) |
58 | } | 58 | } |
59 | 59 | ||
60 | /* | ||
61 | * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility: | ||
62 | */ | ||
60 | . = ASSERT(_end <= WAKEUP_SIZE, "Wakeup too big!"); | 63 | . = ASSERT(_end <= WAKEUP_SIZE, "Wakeup too big!"); |
61 | } | 64 | } |
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c index 98f230f6a28d..0285521e0a99 100644 --- a/arch/x86/kernel/amd_iommu.c +++ b/arch/x86/kernel/amd_iommu.c | |||
@@ -1220,6 +1220,8 @@ static void __detach_device(struct protection_domain *domain, u16 devid) | |||
1220 | amd_iommu_dev_table[devid].data[1] = 0; | 1220 | amd_iommu_dev_table[devid].data[1] = 0; |
1221 | amd_iommu_dev_table[devid].data[2] = 0; | 1221 | amd_iommu_dev_table[devid].data[2] = 0; |
1222 | 1222 | ||
1223 | amd_iommu_apply_erratum_63(devid); | ||
1224 | |||
1223 | /* decrease reference counter */ | 1225 | /* decrease reference counter */ |
1224 | domain->dev_cnt -= 1; | 1226 | domain->dev_cnt -= 1; |
1225 | 1227 | ||
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c index b4b61d462dcc..c20001e4f556 100644 --- a/arch/x86/kernel/amd_iommu_init.c +++ b/arch/x86/kernel/amd_iommu_init.c | |||
@@ -240,7 +240,7 @@ static void iommu_feature_enable(struct amd_iommu *iommu, u8 bit) | |||
240 | writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); | 240 | writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); |
241 | } | 241 | } |
242 | 242 | ||
243 | static void __init iommu_feature_disable(struct amd_iommu *iommu, u8 bit) | 243 | static void iommu_feature_disable(struct amd_iommu *iommu, u8 bit) |
244 | { | 244 | { |
245 | u32 ctrl; | 245 | u32 ctrl; |
246 | 246 | ||
@@ -519,6 +519,26 @@ static void set_dev_entry_bit(u16 devid, u8 bit) | |||
519 | amd_iommu_dev_table[devid].data[i] |= (1 << _bit); | 519 | amd_iommu_dev_table[devid].data[i] |= (1 << _bit); |
520 | } | 520 | } |
521 | 521 | ||
522 | static int get_dev_entry_bit(u16 devid, u8 bit) | ||
523 | { | ||
524 | int i = (bit >> 5) & 0x07; | ||
525 | int _bit = bit & 0x1f; | ||
526 | |||
527 | return (amd_iommu_dev_table[devid].data[i] & (1 << _bit)) >> _bit; | ||
528 | } | ||
529 | |||
530 | |||
531 | void amd_iommu_apply_erratum_63(u16 devid) | ||
532 | { | ||
533 | int sysmgt; | ||
534 | |||
535 | sysmgt = get_dev_entry_bit(devid, DEV_ENTRY_SYSMGT1) | | ||
536 | (get_dev_entry_bit(devid, DEV_ENTRY_SYSMGT2) << 1); | ||
537 | |||
538 | if (sysmgt == 0x01) | ||
539 | set_dev_entry_bit(devid, DEV_ENTRY_IW); | ||
540 | } | ||
541 | |||
522 | /* Writes the specific IOMMU for a device into the rlookup table */ | 542 | /* Writes the specific IOMMU for a device into the rlookup table */ |
523 | static void __init set_iommu_for_device(struct amd_iommu *iommu, u16 devid) | 543 | static void __init set_iommu_for_device(struct amd_iommu *iommu, u16 devid) |
524 | { | 544 | { |
@@ -547,6 +567,8 @@ static void __init set_dev_entry_from_acpi(struct amd_iommu *iommu, | |||
547 | if (flags & ACPI_DEVFLAG_LINT1) | 567 | if (flags & ACPI_DEVFLAG_LINT1) |
548 | set_dev_entry_bit(devid, DEV_ENTRY_LINT1_PASS); | 568 | set_dev_entry_bit(devid, DEV_ENTRY_LINT1_PASS); |
549 | 569 | ||
570 | amd_iommu_apply_erratum_63(devid); | ||
571 | |||
550 | set_iommu_for_device(iommu, devid); | 572 | set_iommu_for_device(iommu, devid); |
551 | } | 573 | } |
552 | 574 | ||
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index f5f5886a6b53..326c25477d3d 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c | |||
@@ -352,14 +352,14 @@ static __init void get_lowmem_redirect(unsigned long *base, unsigned long *size) | |||
352 | 352 | ||
353 | for (i = 0; i < ARRAY_SIZE(redir_addrs); i++) { | 353 | for (i = 0; i < ARRAY_SIZE(redir_addrs); i++) { |
354 | alias.v = uv_read_local_mmr(redir_addrs[i].alias); | 354 | alias.v = uv_read_local_mmr(redir_addrs[i].alias); |
355 | if (alias.s.base == 0) { | 355 | if (alias.s.enable && alias.s.base == 0) { |
356 | *size = (1UL << alias.s.m_alias); | 356 | *size = (1UL << alias.s.m_alias); |
357 | redirect.v = uv_read_local_mmr(redir_addrs[i].redirect); | 357 | redirect.v = uv_read_local_mmr(redir_addrs[i].redirect); |
358 | *base = (unsigned long)redirect.s.dest_base << DEST_SHIFT; | 358 | *base = (unsigned long)redirect.s.dest_base << DEST_SHIFT; |
359 | return; | 359 | return; |
360 | } | 360 | } |
361 | } | 361 | } |
362 | BUG(); | 362 | *base = *size = 0; |
363 | } | 363 | } |
364 | 364 | ||
365 | enum map_type {map_wb, map_uc}; | 365 | enum map_type {map_wb, map_uc}; |
@@ -619,12 +619,12 @@ void __init uv_system_init(void) | |||
619 | uv_cpu_hub_info(cpu)->lowmem_remap_base = lowmem_redir_base; | 619 | uv_cpu_hub_info(cpu)->lowmem_remap_base = lowmem_redir_base; |
620 | uv_cpu_hub_info(cpu)->lowmem_remap_top = lowmem_redir_size; | 620 | uv_cpu_hub_info(cpu)->lowmem_remap_top = lowmem_redir_size; |
621 | uv_cpu_hub_info(cpu)->m_val = m_val; | 621 | uv_cpu_hub_info(cpu)->m_val = m_val; |
622 | uv_cpu_hub_info(cpu)->n_val = m_val; | 622 | uv_cpu_hub_info(cpu)->n_val = n_val; |
623 | uv_cpu_hub_info(cpu)->numa_blade_id = blade; | 623 | uv_cpu_hub_info(cpu)->numa_blade_id = blade; |
624 | uv_cpu_hub_info(cpu)->blade_processor_id = lcpu; | 624 | uv_cpu_hub_info(cpu)->blade_processor_id = lcpu; |
625 | uv_cpu_hub_info(cpu)->pnode = pnode; | 625 | uv_cpu_hub_info(cpu)->pnode = pnode; |
626 | uv_cpu_hub_info(cpu)->pnode_mask = pnode_mask; | 626 | uv_cpu_hub_info(cpu)->pnode_mask = pnode_mask; |
627 | uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1; | 627 | uv_cpu_hub_info(cpu)->gpa_mask = (1UL << (m_val + n_val)) - 1; |
628 | uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper; | 628 | uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper; |
629 | uv_cpu_hub_info(cpu)->gnode_extra = gnode_extra; | 629 | uv_cpu_hub_info(cpu)->gnode_extra = gnode_extra; |
630 | uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base; | 630 | uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base; |
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index b1598a9436d0..721a77ca8115 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c | |||
@@ -1214,7 +1214,8 @@ static int __cpuinit mce_cap_init(void) | |||
1214 | rdmsrl(MSR_IA32_MCG_CAP, cap); | 1214 | rdmsrl(MSR_IA32_MCG_CAP, cap); |
1215 | 1215 | ||
1216 | b = cap & MCG_BANKCNT_MASK; | 1216 | b = cap & MCG_BANKCNT_MASK; |
1217 | printk(KERN_INFO "mce: CPU supports %d MCE banks\n", b); | 1217 | if (!banks) |
1218 | printk(KERN_INFO "mce: CPU supports %d MCE banks\n", b); | ||
1218 | 1219 | ||
1219 | if (b > MAX_NR_BANKS) { | 1220 | if (b > MAX_NR_BANKS) { |
1220 | printk(KERN_WARNING | 1221 | printk(KERN_WARNING |
diff --git a/arch/x86/kernel/cpu/mtrr/cleanup.c b/arch/x86/kernel/cpu/mtrr/cleanup.c index 315738c74aad..73c86db5acbe 100644 --- a/arch/x86/kernel/cpu/mtrr/cleanup.c +++ b/arch/x86/kernel/cpu/mtrr/cleanup.c | |||
@@ -846,7 +846,7 @@ int __init mtrr_cleanup(unsigned address_bits) | |||
846 | sort(range, nr_range, sizeof(struct res_range), cmp_range, NULL); | 846 | sort(range, nr_range, sizeof(struct res_range), cmp_range, NULL); |
847 | 847 | ||
848 | range_sums = sum_ranges(range, nr_range); | 848 | range_sums = sum_ranges(range, nr_range); |
849 | printk(KERN_INFO "total RAM coverred: %ldM\n", | 849 | printk(KERN_INFO "total RAM covered: %ldM\n", |
850 | range_sums >> (20 - PAGE_SHIFT)); | 850 | range_sums >> (20 - PAGE_SHIFT)); |
851 | 851 | ||
852 | if (mtrr_chunk_size && mtrr_gran_size) { | 852 | if (mtrr_chunk_size && mtrr_gran_size) { |
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c index 2e20bca3cca1..bd8743024204 100644 --- a/arch/x86/kernel/cpu/perf_event.c +++ b/arch/x86/kernel/cpu/perf_event.c | |||
@@ -245,7 +245,7 @@ static u64 __read_mostly hw_cache_event_ids | |||
245 | [PERF_COUNT_HW_CACHE_OP_MAX] | 245 | [PERF_COUNT_HW_CACHE_OP_MAX] |
246 | [PERF_COUNT_HW_CACHE_RESULT_MAX]; | 246 | [PERF_COUNT_HW_CACHE_RESULT_MAX]; |
247 | 247 | ||
248 | static const u64 nehalem_hw_cache_event_ids | 248 | static __initconst u64 nehalem_hw_cache_event_ids |
249 | [PERF_COUNT_HW_CACHE_MAX] | 249 | [PERF_COUNT_HW_CACHE_MAX] |
250 | [PERF_COUNT_HW_CACHE_OP_MAX] | 250 | [PERF_COUNT_HW_CACHE_OP_MAX] |
251 | [PERF_COUNT_HW_CACHE_RESULT_MAX] = | 251 | [PERF_COUNT_HW_CACHE_RESULT_MAX] = |
@@ -336,7 +336,7 @@ static const u64 nehalem_hw_cache_event_ids | |||
336 | }, | 336 | }, |
337 | }; | 337 | }; |
338 | 338 | ||
339 | static const u64 core2_hw_cache_event_ids | 339 | static __initconst u64 core2_hw_cache_event_ids |
340 | [PERF_COUNT_HW_CACHE_MAX] | 340 | [PERF_COUNT_HW_CACHE_MAX] |
341 | [PERF_COUNT_HW_CACHE_OP_MAX] | 341 | [PERF_COUNT_HW_CACHE_OP_MAX] |
342 | [PERF_COUNT_HW_CACHE_RESULT_MAX] = | 342 | [PERF_COUNT_HW_CACHE_RESULT_MAX] = |
@@ -427,7 +427,7 @@ static const u64 core2_hw_cache_event_ids | |||
427 | }, | 427 | }, |
428 | }; | 428 | }; |
429 | 429 | ||
430 | static const u64 atom_hw_cache_event_ids | 430 | static __initconst u64 atom_hw_cache_event_ids |
431 | [PERF_COUNT_HW_CACHE_MAX] | 431 | [PERF_COUNT_HW_CACHE_MAX] |
432 | [PERF_COUNT_HW_CACHE_OP_MAX] | 432 | [PERF_COUNT_HW_CACHE_OP_MAX] |
433 | [PERF_COUNT_HW_CACHE_RESULT_MAX] = | 433 | [PERF_COUNT_HW_CACHE_RESULT_MAX] = |
@@ -536,7 +536,7 @@ static u64 intel_pmu_raw_event(u64 hw_event) | |||
536 | return hw_event & CORE_EVNTSEL_MASK; | 536 | return hw_event & CORE_EVNTSEL_MASK; |
537 | } | 537 | } |
538 | 538 | ||
539 | static const u64 amd_hw_cache_event_ids | 539 | static __initconst u64 amd_hw_cache_event_ids |
540 | [PERF_COUNT_HW_CACHE_MAX] | 540 | [PERF_COUNT_HW_CACHE_MAX] |
541 | [PERF_COUNT_HW_CACHE_OP_MAX] | 541 | [PERF_COUNT_HW_CACHE_OP_MAX] |
542 | [PERF_COUNT_HW_CACHE_RESULT_MAX] = | 542 | [PERF_COUNT_HW_CACHE_RESULT_MAX] = |
@@ -1964,7 +1964,7 @@ static __read_mostly struct notifier_block perf_event_nmi_notifier = { | |||
1964 | .priority = 1 | 1964 | .priority = 1 |
1965 | }; | 1965 | }; |
1966 | 1966 | ||
1967 | static struct x86_pmu p6_pmu = { | 1967 | static __initconst struct x86_pmu p6_pmu = { |
1968 | .name = "p6", | 1968 | .name = "p6", |
1969 | .handle_irq = p6_pmu_handle_irq, | 1969 | .handle_irq = p6_pmu_handle_irq, |
1970 | .disable_all = p6_pmu_disable_all, | 1970 | .disable_all = p6_pmu_disable_all, |
@@ -1992,7 +1992,7 @@ static struct x86_pmu p6_pmu = { | |||
1992 | .get_event_idx = intel_get_event_idx, | 1992 | .get_event_idx = intel_get_event_idx, |
1993 | }; | 1993 | }; |
1994 | 1994 | ||
1995 | static struct x86_pmu intel_pmu = { | 1995 | static __initconst struct x86_pmu intel_pmu = { |
1996 | .name = "Intel", | 1996 | .name = "Intel", |
1997 | .handle_irq = intel_pmu_handle_irq, | 1997 | .handle_irq = intel_pmu_handle_irq, |
1998 | .disable_all = intel_pmu_disable_all, | 1998 | .disable_all = intel_pmu_disable_all, |
@@ -2016,7 +2016,7 @@ static struct x86_pmu intel_pmu = { | |||
2016 | .get_event_idx = intel_get_event_idx, | 2016 | .get_event_idx = intel_get_event_idx, |
2017 | }; | 2017 | }; |
2018 | 2018 | ||
2019 | static struct x86_pmu amd_pmu = { | 2019 | static __initconst struct x86_pmu amd_pmu = { |
2020 | .name = "AMD", | 2020 | .name = "AMD", |
2021 | .handle_irq = amd_pmu_handle_irq, | 2021 | .handle_irq = amd_pmu_handle_irq, |
2022 | .disable_all = amd_pmu_disable_all, | 2022 | .disable_all = amd_pmu_disable_all, |
@@ -2037,7 +2037,7 @@ static struct x86_pmu amd_pmu = { | |||
2037 | .get_event_idx = gen_get_event_idx, | 2037 | .get_event_idx = gen_get_event_idx, |
2038 | }; | 2038 | }; |
2039 | 2039 | ||
2040 | static int p6_pmu_init(void) | 2040 | static __init int p6_pmu_init(void) |
2041 | { | 2041 | { |
2042 | switch (boot_cpu_data.x86_model) { | 2042 | switch (boot_cpu_data.x86_model) { |
2043 | case 1: | 2043 | case 1: |
@@ -2071,7 +2071,7 @@ static int p6_pmu_init(void) | |||
2071 | return 0; | 2071 | return 0; |
2072 | } | 2072 | } |
2073 | 2073 | ||
2074 | static int intel_pmu_init(void) | 2074 | static __init int intel_pmu_init(void) |
2075 | { | 2075 | { |
2076 | union cpuid10_edx edx; | 2076 | union cpuid10_edx edx; |
2077 | union cpuid10_eax eax; | 2077 | union cpuid10_eax eax; |
@@ -2144,7 +2144,7 @@ static int intel_pmu_init(void) | |||
2144 | return 0; | 2144 | return 0; |
2145 | } | 2145 | } |
2146 | 2146 | ||
2147 | static int amd_pmu_init(void) | 2147 | static __init int amd_pmu_init(void) |
2148 | { | 2148 | { |
2149 | /* Performance-monitoring supported from K7 and later: */ | 2149 | /* Performance-monitoring supported from K7 and later: */ |
2150 | if (boot_cpu_data.x86 < 6) | 2150 | if (boot_cpu_data.x86 < 6) |
diff --git a/arch/x86/kernel/crash_dump_32.c b/arch/x86/kernel/crash_dump_32.c index f7cdb3b457aa..cd97ce18c29d 100644 --- a/arch/x86/kernel/crash_dump_32.c +++ b/arch/x86/kernel/crash_dump_32.c | |||
@@ -16,6 +16,22 @@ static void *kdump_buf_page; | |||
16 | /* Stores the physical address of elf header of crash image. */ | 16 | /* Stores the physical address of elf header of crash image. */ |
17 | unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX; | 17 | unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX; |
18 | 18 | ||
19 | static inline bool is_crashed_pfn_valid(unsigned long pfn) | ||
20 | { | ||
21 | #ifndef CONFIG_X86_PAE | ||
22 | /* | ||
23 | * non-PAE kdump kernel executed from a PAE one will crop high pte | ||
24 | * bits and poke unwanted space counting again from address 0, we | ||
25 | * don't want that. pte must fit into unsigned long. In fact the | ||
26 | * test checks high 12 bits for being zero (pfn will be shifted left | ||
27 | * by PAGE_SHIFT). | ||
28 | */ | ||
29 | return pte_pfn(pfn_pte(pfn, __pgprot(0))) == pfn; | ||
30 | #else | ||
31 | return true; | ||
32 | #endif | ||
33 | } | ||
34 | |||
19 | /** | 35 | /** |
20 | * copy_oldmem_page - copy one page from "oldmem" | 36 | * copy_oldmem_page - copy one page from "oldmem" |
21 | * @pfn: page frame number to be copied | 37 | * @pfn: page frame number to be copied |
@@ -41,6 +57,9 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf, | |||
41 | if (!csize) | 57 | if (!csize) |
42 | return 0; | 58 | return 0; |
43 | 59 | ||
60 | if (!is_crashed_pfn_valid(pfn)) | ||
61 | return -EFAULT; | ||
62 | |||
44 | vaddr = kmap_atomic_pfn(pfn, KM_PTE0); | 63 | vaddr = kmap_atomic_pfn(pfn, KM_PTE0); |
45 | 64 | ||
46 | if (!userbuf) { | 65 | if (!userbuf) { |
diff --git a/arch/x86/kernel/efi.c b/arch/x86/kernel/efi.c index ad5bd988fb79..cdcfb122f256 100644 --- a/arch/x86/kernel/efi.c +++ b/arch/x86/kernel/efi.c | |||
@@ -454,8 +454,10 @@ void __init efi_init(void) | |||
454 | if (add_efi_memmap) | 454 | if (add_efi_memmap) |
455 | do_add_efi_memmap(); | 455 | do_add_efi_memmap(); |
456 | 456 | ||
457 | #ifdef CONFIG_X86_32 | ||
457 | x86_platform.get_wallclock = efi_get_time; | 458 | x86_platform.get_wallclock = efi_get_time; |
458 | x86_platform.set_wallclock = efi_set_rtc_mmss; | 459 | x86_platform.set_wallclock = efi_set_rtc_mmss; |
460 | #endif | ||
459 | 461 | ||
460 | /* Setup for EFI runtime service */ | 462 | /* Setup for EFI runtime service */ |
461 | reboot_type = BOOT_EFI; | 463 | reboot_type = BOOT_EFI; |
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c index 366baa179913..f4c538b681ca 100644 --- a/arch/x86/kernel/microcode_amd.c +++ b/arch/x86/kernel/microcode_amd.c | |||
@@ -317,6 +317,12 @@ static enum ucode_state request_microcode_fw(int cpu, struct device *device) | |||
317 | return UCODE_NFOUND; | 317 | return UCODE_NFOUND; |
318 | } | 318 | } |
319 | 319 | ||
320 | if (*(u32 *)firmware->data != UCODE_MAGIC) { | ||
321 | printk(KERN_ERR "microcode: invalid UCODE_MAGIC (0x%08x)\n", | ||
322 | *(u32 *)firmware->data); | ||
323 | return UCODE_ERROR; | ||
324 | } | ||
325 | |||
320 | ret = generic_load_microcode(cpu, firmware->data, firmware->size); | 326 | ret = generic_load_microcode(cpu, firmware->data, firmware->size); |
321 | 327 | ||
322 | release_firmware(firmware); | 328 | release_firmware(firmware); |
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c index b2a71dca5642..a6e804d16c35 100644 --- a/arch/x86/kernel/pci-dma.c +++ b/arch/x86/kernel/pci-dma.c | |||
@@ -45,12 +45,10 @@ int iommu_pass_through __read_mostly; | |||
45 | dma_addr_t bad_dma_address __read_mostly = 0; | 45 | dma_addr_t bad_dma_address __read_mostly = 0; |
46 | EXPORT_SYMBOL(bad_dma_address); | 46 | EXPORT_SYMBOL(bad_dma_address); |
47 | 47 | ||
48 | /* Dummy device used for NULL arguments (normally ISA). Better would | 48 | /* Dummy device used for NULL arguments (normally ISA). */ |
49 | be probably a smaller DMA mask, but this is bug-to-bug compatible | ||
50 | to older i386. */ | ||
51 | struct device x86_dma_fallback_dev = { | 49 | struct device x86_dma_fallback_dev = { |
52 | .init_name = "fallback device", | 50 | .init_name = "fallback device", |
53 | .coherent_dma_mask = DMA_BIT_MASK(32), | 51 | .coherent_dma_mask = ISA_DMA_BIT_MASK, |
54 | .dma_mask = &x86_dma_fallback_dev.coherent_dma_mask, | 52 | .dma_mask = &x86_dma_fallback_dev.coherent_dma_mask, |
55 | }; | 53 | }; |
56 | EXPORT_SYMBOL(x86_dma_fallback_dev); | 54 | EXPORT_SYMBOL(x86_dma_fallback_dev); |
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index ad535b683170..eb62cbcaa490 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c | |||
@@ -664,3 +664,8 @@ long sys_arch_prctl(int code, unsigned long addr) | |||
664 | return do_arch_prctl(current, code, addr); | 664 | return do_arch_prctl(current, code, addr); |
665 | } | 665 | } |
666 | 666 | ||
667 | unsigned long KSTK_ESP(struct task_struct *task) | ||
668 | { | ||
669 | return (test_tsk_thread_flag(task, TIF_IA32)) ? | ||
670 | (task_pt_regs(task)->sp) : ((task)->thread.usersp); | ||
671 | } | ||
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c index a1a3cdda06e1..f93078746e00 100644 --- a/arch/x86/kernel/reboot.c +++ b/arch/x86/kernel/reboot.c | |||
@@ -436,6 +436,14 @@ static struct dmi_system_id __initdata pci_reboot_dmi_table[] = { | |||
436 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5"), | 436 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5"), |
437 | }, | 437 | }, |
438 | }, | 438 | }, |
439 | { /* Handle problems with rebooting on Apple Macmini3,1 */ | ||
440 | .callback = set_pci_reboot, | ||
441 | .ident = "Apple Macmini3,1", | ||
442 | .matches = { | ||
443 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), | ||
444 | DMI_MATCH(DMI_PRODUCT_NAME, "Macmini3,1"), | ||
445 | }, | ||
446 | }, | ||
439 | { } | 447 | { } |
440 | }; | 448 | }; |
441 | 449 | ||
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index e09f0e2c14b5..2a34f9c5be21 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c | |||
@@ -660,6 +660,13 @@ static struct dmi_system_id __initdata bad_bios_dmi_table[] = { | |||
660 | }, | 660 | }, |
661 | }, | 661 | }, |
662 | { | 662 | { |
663 | .callback = dmi_low_memory_corruption, | ||
664 | .ident = "Phoenix/MSC BIOS", | ||
665 | .matches = { | ||
666 | DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix/MSC"), | ||
667 | }, | ||
668 | }, | ||
669 | { | ||
663 | /* | 670 | /* |
664 | * AMI BIOS with low memory corruption was found on Intel DG45ID board. | 671 | * AMI BIOS with low memory corruption was found on Intel DG45ID board. |
665 | * It hase different DMI_BIOS_VENDOR = "Intel Corp.", for now we will | 672 | * It hase different DMI_BIOS_VENDOR = "Intel Corp.", for now we will |
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c index 503c1f2e8835..1740c85e24bb 100644 --- a/arch/x86/kernel/tlb_uv.c +++ b/arch/x86/kernel/tlb_uv.c | |||
@@ -23,8 +23,6 @@ | |||
23 | static struct bau_control **uv_bau_table_bases __read_mostly; | 23 | static struct bau_control **uv_bau_table_bases __read_mostly; |
24 | static int uv_bau_retry_limit __read_mostly; | 24 | static int uv_bau_retry_limit __read_mostly; |
25 | 25 | ||
26 | /* position of pnode (which is nasid>>1): */ | ||
27 | static int uv_nshift __read_mostly; | ||
28 | /* base pnode in this partition */ | 26 | /* base pnode in this partition */ |
29 | static int uv_partition_base_pnode __read_mostly; | 27 | static int uv_partition_base_pnode __read_mostly; |
30 | 28 | ||
@@ -723,7 +721,7 @@ uv_activation_descriptor_init(int node, int pnode) | |||
723 | BUG_ON(!adp); | 721 | BUG_ON(!adp); |
724 | 722 | ||
725 | pa = uv_gpa(adp); /* need the real nasid*/ | 723 | pa = uv_gpa(adp); /* need the real nasid*/ |
726 | n = pa >> uv_nshift; | 724 | n = uv_gpa_to_pnode(pa); |
727 | m = pa & uv_mmask; | 725 | m = pa & uv_mmask; |
728 | 726 | ||
729 | uv_write_global_mmr64(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE, | 727 | uv_write_global_mmr64(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE, |
@@ -778,7 +776,7 @@ uv_payload_queue_init(int node, int pnode, struct bau_control *bau_tablesp) | |||
778 | * need the pnode of where the memory was really allocated | 776 | * need the pnode of where the memory was really allocated |
779 | */ | 777 | */ |
780 | pa = uv_gpa(pqp); | 778 | pa = uv_gpa(pqp); |
781 | pn = pa >> uv_nshift; | 779 | pn = uv_gpa_to_pnode(pa); |
782 | uv_write_global_mmr64(pnode, | 780 | uv_write_global_mmr64(pnode, |
783 | UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST, | 781 | UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST, |
784 | ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) | | 782 | ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) | |
@@ -843,8 +841,7 @@ static int __init uv_bau_init(void) | |||
843 | GFP_KERNEL, cpu_to_node(cur_cpu)); | 841 | GFP_KERNEL, cpu_to_node(cur_cpu)); |
844 | 842 | ||
845 | uv_bau_retry_limit = 1; | 843 | uv_bau_retry_limit = 1; |
846 | uv_nshift = uv_hub_info->n_val; | 844 | uv_mmask = (1UL << uv_hub_info->m_val) - 1; |
847 | uv_mmask = (1UL << uv_hub_info->n_val) - 1; | ||
848 | nblades = uv_num_possible_blades(); | 845 | nblades = uv_num_possible_blades(); |
849 | 846 | ||
850 | uv_bau_table_bases = (struct bau_control **) | 847 | uv_bau_table_bases = (struct bau_control **) |
diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S index 92929fb3f9fa..3c68fe2d46cf 100644 --- a/arch/x86/kernel/vmlinux.lds.S +++ b/arch/x86/kernel/vmlinux.lds.S | |||
@@ -305,6 +305,9 @@ SECTIONS | |||
305 | 305 | ||
306 | 306 | ||
307 | #ifdef CONFIG_X86_32 | 307 | #ifdef CONFIG_X86_32 |
308 | /* | ||
309 | * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility: | ||
310 | */ | ||
308 | . = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE), | 311 | . = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE), |
309 | "kernel image bigger than KERNEL_IMAGE_SIZE"); | 312 | "kernel image bigger than KERNEL_IMAGE_SIZE"); |
310 | #else | 313 | #else |