x86: let 32bit use apic_ops too - fix

fix for pv - clean up the namespace there too.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 48 insertions, 3 deletions

diff --git a/arch/x86/kernel/vmi_32.c b/arch/x86/kernel/vmi_32.c
index b15346092b7b..cf3074354553 100644
--- a/arch/x86/kernel/vmi_32.c
+++ b/arch/x86/kernel/vmi_32.c
@@ -676,6 +676,50 @@ static inline int __init probe_vmi_rom(void)
         return 0;
 }
 
+#ifdef CONFIG_X86_LOCAL_APIC
+static u32 vmi_apic_read(u32 reg)
+{
+        return 0;
+}
+
+static void vmi_apic_write(u32 reg, u32 val)
+{
+        /* Warn to see if there's any stray references */
+        WARN_ON(1);
+}
+
+static u64 vmi_apic_icr_read(void)
+{
+        return 0;
+}
+
+static void vmi_apic_icr_write(u32 low, u32 id)
+{
+        /* Warn to see if there's any stray references */
+        WARN_ON(1);
+}
+
+static void vmi_apic_wait_icr_idle(void)
+{
+        return;
+}
+
+static u32 vmi_safe_apic_wait_icr_idle(void)
+{
+        return 0;
+}
+
+static struct apic_ops vmi_basic_apic_ops = {
+        .read = vmi_apic_read,
+        .write = vmi_apic_write,
+        .write_atomic = vmi_apic_write,
+        .icr_read = vmi_apic_icr_read,
+        .icr_write = vmi_apic_icr_write,
+        .wait_icr_idle = vmi_apic_wait_icr_idle,
+        .safe_wait_icr_idle = vmi_safe_apic_wait_icr_idle,
+};
+#endif
+
 /*
  * VMI setup common to all processors
  */
@@ -904,9 +948,10 @@ static inline int __init activate_vmi(void)
 #endif
 
 #ifdef CONFIG_X86_LOCAL_APIC
-        para_fill(pv_apic_ops.apic_read, APICRead);
-        para_fill(pv_apic_ops.apic_write, APICWrite);
-        para_fill(pv_apic_ops.apic_write_atomic, APICWrite);
+        para_fill(vmi_basic_apic_ops.read, APICRead);
+        para_fill(vmi_basic_apic_ops.write, APICWrite);
+        para_fill(vmi_basic_apic_ops.write_atomic, APICWrite);
+        apic_ops = &vmi_basic_apic_ops;
 #endif
 
         /*