x86_64: Consolidate tsc calibration

Move the TSC calibration code to tsc.c. Reimplement it so the
pm timer can be used as a reference as well.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>

1 files changed, 90 insertions, 0 deletions

diff --git a/arch/x86/kernel/tsc_64.c b/arch/x86/kernel/tsc_64.c
index 2a59bde663f2..59baecd135ab 100644
--- a/arch/x86/kernel/tsc_64.c
+++ b/arch/x86/kernel/tsc_64.c
@@ -6,7 +6,9 @@
 #include <linux/time.h>
 #include <linux/acpi.h>
 #include <linux/cpufreq.h>
+#include <linux/acpi_pmtmr.h>
 
+#include <asm/hpet.h>
 #include <asm/timex.h>
 
 static int notsc __initdata = 0;
@@ -118,6 +120,94 @@ core_initcall(cpufreq_tsc);
 
 #endif
 
+#define MAX_RETRIES     5
+#define SMI_TRESHOLD    50000
+
+/*
+ * Read TSC and the reference counters. Take care of SMI disturbance
+ */
+static unsigned long __init tsc_read_refs(unsigned long *pm,
+                                          unsigned long *hpet)
+{
+        unsigned long t1, t2;
+        int i;
+
+        for (i = 0; i < MAX_RETRIES; i++) {
+                t1 = get_cycles_sync();
+                if (hpet)
+                        *hpet = hpet_readl(HPET_COUNTER) & 0xFFFFFFFF;
+                else
+                        *pm = acpi_pm_read_early();
+                t2 = get_cycles_sync();
+                if ((t2 - t1) < SMI_TRESHOLD)
+                        return t2;
+        }
+        return ULONG_MAX;
+}
+
+/**
+ * tsc_calibrate - calibrate the tsc on boot
+ */
+void __init tsc_calibrate(void)
+{
+        unsigned long flags, tsc1, tsc2, tr1, tr2, pm1, pm2, hpet1, hpet2;
+        int hpet = is_hpet_enabled();
+
+        local_irq_save(flags);
+
+        tsc1 = tsc_read_refs(&pm1, hpet ? &hpet1 : NULL);
+
+        outb((inb(0x61) & ~0x02) | 0x01, 0x61);
+
+        outb(0xb0, 0x43);
+        outb((CLOCK_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
+        outb((CLOCK_TICK_RATE / (1000 / 50)) >> 8, 0x42);
+        tr1 = get_cycles_sync();
+        while ((inb(0x61) & 0x20) == 0);
+        tr2 = get_cycles_sync();
+
+        tsc2 = tsc_read_refs(&pm2, hpet ? &hpet2 : NULL);
+
+        local_irq_restore(flags);
+
+        /*
+         * Preset the result with the raw and inaccurate PIT
+         * calibration value
+         */
+        tsc_khz = (tr2 - tr1) / 50;
+
+        /* hpet or pmtimer available ? */
+        if (!hpet && !pm1 && !pm2) {
+                printk(KERN_INFO "TSC calibrated against PIT\n");
+                return;
+        }
+
+        /* Check, whether the sampling was disturbed by an SMI */
+        if (tsc1 == ULONG_MAX || tsc2 == ULONG_MAX) {
+                printk(KERN_WARNING "TSC calibration disturbed by SMI, "
+                       "using PIT calibration result\n");
+                return;
+        }
+
+        tsc2 = (tsc2 - tsc1) * 1000000L;
+
+        if (hpet) {
+                printk(KERN_INFO "TSC calibrated against HPET\n");
+                if (hpet2 < hpet1)
+                        hpet2 += 0x100000000;
+                hpet2 -= hpet1;
+                tsc1 = (hpet2 * hpet_readl(HPET_PERIOD)) / 1000000;
+        } else {
+                printk(KERN_INFO "TSC calibrated against PM_TIMER\n");
+                if (pm2 < pm1)
+                        pm2 += ACPI_PM_OVRRUN;
+                pm2 -= pm1;
+                tsc1 = (pm2 * 1000000000) / PMTMR_TICKS_PER_SEC;
+        }
+
+        tsc_khz = tsc2 / tsc1;
+}
+
 /*
  * Make an educated guess if the TSC is trustworthy and synchronized
  * over all CPUs.