diff options
author | Paul Mackerras <paulus@samba.org> | 2008-01-30 19:25:51 -0500 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2008-01-30 19:25:51 -0500 |
commit | bd45ac0c5daae35e7c71138172e63df5cf644cf6 (patch) | |
tree | 5eb5a599bf6a9d7a8a34e802db932aa9e9555de4 /arch/x86/kernel/smp_64.c | |
parent | 4eece4ccf997c0e6d8fdad3d842e37b16b8d705f (diff) | |
parent | 5bdeae46be6dfe9efa44a548bd622af325f4bdb4 (diff) |
Merge branch 'linux-2.6'
Diffstat (limited to 'arch/x86/kernel/smp_64.c')
-rw-r--r-- | arch/x86/kernel/smp_64.c | 91 |
1 files changed, 44 insertions, 47 deletions
diff --git a/arch/x86/kernel/smp_64.c b/arch/x86/kernel/smp_64.c index 03fa6ed559c6..2fd74b06db67 100644 --- a/arch/x86/kernel/smp_64.c +++ b/arch/x86/kernel/smp_64.c | |||
@@ -29,7 +29,7 @@ | |||
29 | #include <asm/idle.h> | 29 | #include <asm/idle.h> |
30 | 30 | ||
31 | /* | 31 | /* |
32 | * Smarter SMP flushing macros. | 32 | * Smarter SMP flushing macros. |
33 | * c/o Linus Torvalds. | 33 | * c/o Linus Torvalds. |
34 | * | 34 | * |
35 | * These mean you can really definitely utterly forget about | 35 | * These mean you can really definitely utterly forget about |
@@ -37,15 +37,15 @@ | |||
37 | * | 37 | * |
38 | * Optimizations Manfred Spraul <manfred@colorfullife.com> | 38 | * Optimizations Manfred Spraul <manfred@colorfullife.com> |
39 | * | 39 | * |
40 | * More scalable flush, from Andi Kleen | 40 | * More scalable flush, from Andi Kleen |
41 | * | 41 | * |
42 | * To avoid global state use 8 different call vectors. | 42 | * To avoid global state use 8 different call vectors. |
43 | * Each CPU uses a specific vector to trigger flushes on other | 43 | * Each CPU uses a specific vector to trigger flushes on other |
44 | * CPUs. Depending on the received vector the target CPUs look into | 44 | * CPUs. Depending on the received vector the target CPUs look into |
45 | * the right per cpu variable for the flush data. | 45 | * the right per cpu variable for the flush data. |
46 | * | 46 | * |
47 | * With more than 8 CPUs they are hashed to the 8 available | 47 | * With more than 8 CPUs they are hashed to the 8 available |
48 | * vectors. The limited global vector space forces us to this right now. | 48 | * vectors. The limited global vector space forces us to this right now. |
49 | * In future when interrupts are split into per CPU domains this could be | 49 | * In future when interrupts are split into per CPU domains this could be |
50 | * fixed, at the cost of triggering multiple IPIs in some cases. | 50 | * fixed, at the cost of triggering multiple IPIs in some cases. |
51 | */ | 51 | */ |
@@ -55,7 +55,6 @@ union smp_flush_state { | |||
55 | cpumask_t flush_cpumask; | 55 | cpumask_t flush_cpumask; |
56 | struct mm_struct *flush_mm; | 56 | struct mm_struct *flush_mm; |
57 | unsigned long flush_va; | 57 | unsigned long flush_va; |
58 | #define FLUSH_ALL -1ULL | ||
59 | spinlock_t tlbstate_lock; | 58 | spinlock_t tlbstate_lock; |
60 | }; | 59 | }; |
61 | char pad[SMP_CACHE_BYTES]; | 60 | char pad[SMP_CACHE_BYTES]; |
@@ -67,16 +66,17 @@ union smp_flush_state { | |||
67 | static DEFINE_PER_CPU(union smp_flush_state, flush_state); | 66 | static DEFINE_PER_CPU(union smp_flush_state, flush_state); |
68 | 67 | ||
69 | /* | 68 | /* |
70 | * We cannot call mmdrop() because we are in interrupt context, | 69 | * We cannot call mmdrop() because we are in interrupt context, |
71 | * instead update mm->cpu_vm_mask. | 70 | * instead update mm->cpu_vm_mask. |
72 | */ | 71 | */ |
73 | static inline void leave_mm(int cpu) | 72 | void leave_mm(int cpu) |
74 | { | 73 | { |
75 | if (read_pda(mmu_state) == TLBSTATE_OK) | 74 | if (read_pda(mmu_state) == TLBSTATE_OK) |
76 | BUG(); | 75 | BUG(); |
77 | cpu_clear(cpu, read_pda(active_mm)->cpu_vm_mask); | 76 | cpu_clear(cpu, read_pda(active_mm)->cpu_vm_mask); |
78 | load_cr3(swapper_pg_dir); | 77 | load_cr3(swapper_pg_dir); |
79 | } | 78 | } |
79 | EXPORT_SYMBOL_GPL(leave_mm); | ||
80 | 80 | ||
81 | /* | 81 | /* |
82 | * | 82 | * |
@@ -85,25 +85,25 @@ static inline void leave_mm(int cpu) | |||
85 | * 1) switch_mm() either 1a) or 1b) | 85 | * 1) switch_mm() either 1a) or 1b) |
86 | * 1a) thread switch to a different mm | 86 | * 1a) thread switch to a different mm |
87 | * 1a1) cpu_clear(cpu, old_mm->cpu_vm_mask); | 87 | * 1a1) cpu_clear(cpu, old_mm->cpu_vm_mask); |
88 | * Stop ipi delivery for the old mm. This is not synchronized with | 88 | * Stop ipi delivery for the old mm. This is not synchronized with |
89 | * the other cpus, but smp_invalidate_interrupt ignore flush ipis | 89 | * the other cpus, but smp_invalidate_interrupt ignore flush ipis |
90 | * for the wrong mm, and in the worst case we perform a superfluous | 90 | * for the wrong mm, and in the worst case we perform a superfluous |
91 | * tlb flush. | 91 | * tlb flush. |
92 | * 1a2) set cpu mmu_state to TLBSTATE_OK | 92 | * 1a2) set cpu mmu_state to TLBSTATE_OK |
93 | * Now the smp_invalidate_interrupt won't call leave_mm if cpu0 | 93 | * Now the smp_invalidate_interrupt won't call leave_mm if cpu0 |
94 | * was in lazy tlb mode. | 94 | * was in lazy tlb mode. |
95 | * 1a3) update cpu active_mm | 95 | * 1a3) update cpu active_mm |
96 | * Now cpu0 accepts tlb flushes for the new mm. | 96 | * Now cpu0 accepts tlb flushes for the new mm. |
97 | * 1a4) cpu_set(cpu, new_mm->cpu_vm_mask); | 97 | * 1a4) cpu_set(cpu, new_mm->cpu_vm_mask); |
98 | * Now the other cpus will send tlb flush ipis. | 98 | * Now the other cpus will send tlb flush ipis. |
99 | * 1a4) change cr3. | 99 | * 1a4) change cr3. |
100 | * 1b) thread switch without mm change | 100 | * 1b) thread switch without mm change |
101 | * cpu active_mm is correct, cpu0 already handles | 101 | * cpu active_mm is correct, cpu0 already handles |
102 | * flush ipis. | 102 | * flush ipis. |
103 | * 1b1) set cpu mmu_state to TLBSTATE_OK | 103 | * 1b1) set cpu mmu_state to TLBSTATE_OK |
104 | * 1b2) test_and_set the cpu bit in cpu_vm_mask. | 104 | * 1b2) test_and_set the cpu bit in cpu_vm_mask. |
105 | * Atomically set the bit [other cpus will start sending flush ipis], | 105 | * Atomically set the bit [other cpus will start sending flush ipis], |
106 | * and test the bit. | 106 | * and test the bit. |
107 | * 1b3) if the bit was 0: leave_mm was called, flush the tlb. | 107 | * 1b3) if the bit was 0: leave_mm was called, flush the tlb. |
108 | * 2) switch %%esp, ie current | 108 | * 2) switch %%esp, ie current |
109 | * | 109 | * |
@@ -137,12 +137,12 @@ asmlinkage void smp_invalidate_interrupt(struct pt_regs *regs) | |||
137 | * orig_rax contains the negated interrupt vector. | 137 | * orig_rax contains the negated interrupt vector. |
138 | * Use that to determine where the sender put the data. | 138 | * Use that to determine where the sender put the data. |
139 | */ | 139 | */ |
140 | sender = ~regs->orig_rax - INVALIDATE_TLB_VECTOR_START; | 140 | sender = ~regs->orig_ax - INVALIDATE_TLB_VECTOR_START; |
141 | f = &per_cpu(flush_state, sender); | 141 | f = &per_cpu(flush_state, sender); |
142 | 142 | ||
143 | if (!cpu_isset(cpu, f->flush_cpumask)) | 143 | if (!cpu_isset(cpu, f->flush_cpumask)) |
144 | goto out; | 144 | goto out; |
145 | /* | 145 | /* |
146 | * This was a BUG() but until someone can quote me the | 146 | * This was a BUG() but until someone can quote me the |
147 | * line from the intel manual that guarantees an IPI to | 147 | * line from the intel manual that guarantees an IPI to |
148 | * multiple CPUs is retried _only_ on the erroring CPUs | 148 | * multiple CPUs is retried _only_ on the erroring CPUs |
@@ -150,10 +150,10 @@ asmlinkage void smp_invalidate_interrupt(struct pt_regs *regs) | |||
150 | * | 150 | * |
151 | * BUG(); | 151 | * BUG(); |
152 | */ | 152 | */ |
153 | 153 | ||
154 | if (f->flush_mm == read_pda(active_mm)) { | 154 | if (f->flush_mm == read_pda(active_mm)) { |
155 | if (read_pda(mmu_state) == TLBSTATE_OK) { | 155 | if (read_pda(mmu_state) == TLBSTATE_OK) { |
156 | if (f->flush_va == FLUSH_ALL) | 156 | if (f->flush_va == TLB_FLUSH_ALL) |
157 | local_flush_tlb(); | 157 | local_flush_tlb(); |
158 | else | 158 | else |
159 | __flush_tlb_one(f->flush_va); | 159 | __flush_tlb_one(f->flush_va); |
@@ -166,19 +166,22 @@ out: | |||
166 | add_pda(irq_tlb_count, 1); | 166 | add_pda(irq_tlb_count, 1); |
167 | } | 167 | } |
168 | 168 | ||
169 | static void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm, | 169 | void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm, |
170 | unsigned long va) | 170 | unsigned long va) |
171 | { | 171 | { |
172 | int sender; | 172 | int sender; |
173 | union smp_flush_state *f; | 173 | union smp_flush_state *f; |
174 | cpumask_t cpumask = *cpumaskp; | ||
174 | 175 | ||
175 | /* Caller has disabled preemption */ | 176 | /* Caller has disabled preemption */ |
176 | sender = smp_processor_id() % NUM_INVALIDATE_TLB_VECTORS; | 177 | sender = smp_processor_id() % NUM_INVALIDATE_TLB_VECTORS; |
177 | f = &per_cpu(flush_state, sender); | 178 | f = &per_cpu(flush_state, sender); |
178 | 179 | ||
179 | /* Could avoid this lock when | 180 | /* |
180 | num_online_cpus() <= NUM_INVALIDATE_TLB_VECTORS, but it is | 181 | * Could avoid this lock when |
181 | probably not worth checking this for a cache-hot lock. */ | 182 | * num_online_cpus() <= NUM_INVALIDATE_TLB_VECTORS, but it is |
183 | * probably not worth checking this for a cache-hot lock. | ||
184 | */ | ||
182 | spin_lock(&f->tlbstate_lock); | 185 | spin_lock(&f->tlbstate_lock); |
183 | 186 | ||
184 | f->flush_mm = mm; | 187 | f->flush_mm = mm; |
@@ -202,14 +205,14 @@ static void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm, | |||
202 | int __cpuinit init_smp_flush(void) | 205 | int __cpuinit init_smp_flush(void) |
203 | { | 206 | { |
204 | int i; | 207 | int i; |
208 | |||
205 | for_each_cpu_mask(i, cpu_possible_map) { | 209 | for_each_cpu_mask(i, cpu_possible_map) { |
206 | spin_lock_init(&per_cpu(flush_state, i).tlbstate_lock); | 210 | spin_lock_init(&per_cpu(flush_state, i).tlbstate_lock); |
207 | } | 211 | } |
208 | return 0; | 212 | return 0; |
209 | } | 213 | } |
210 | |||
211 | core_initcall(init_smp_flush); | 214 | core_initcall(init_smp_flush); |
212 | 215 | ||
213 | void flush_tlb_current_task(void) | 216 | void flush_tlb_current_task(void) |
214 | { | 217 | { |
215 | struct mm_struct *mm = current->mm; | 218 | struct mm_struct *mm = current->mm; |
@@ -221,10 +224,9 @@ void flush_tlb_current_task(void) | |||
221 | 224 | ||
222 | local_flush_tlb(); | 225 | local_flush_tlb(); |
223 | if (!cpus_empty(cpu_mask)) | 226 | if (!cpus_empty(cpu_mask)) |
224 | flush_tlb_others(cpu_mask, mm, FLUSH_ALL); | 227 | flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL); |
225 | preempt_enable(); | 228 | preempt_enable(); |
226 | } | 229 | } |
227 | EXPORT_SYMBOL(flush_tlb_current_task); | ||
228 | 230 | ||
229 | void flush_tlb_mm (struct mm_struct * mm) | 231 | void flush_tlb_mm (struct mm_struct * mm) |
230 | { | 232 | { |
@@ -241,11 +243,10 @@ void flush_tlb_mm (struct mm_struct * mm) | |||
241 | leave_mm(smp_processor_id()); | 243 | leave_mm(smp_processor_id()); |
242 | } | 244 | } |
243 | if (!cpus_empty(cpu_mask)) | 245 | if (!cpus_empty(cpu_mask)) |
244 | flush_tlb_others(cpu_mask, mm, FLUSH_ALL); | 246 | flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL); |
245 | 247 | ||
246 | preempt_enable(); | 248 | preempt_enable(); |
247 | } | 249 | } |
248 | EXPORT_SYMBOL(flush_tlb_mm); | ||
249 | 250 | ||
250 | void flush_tlb_page(struct vm_area_struct * vma, unsigned long va) | 251 | void flush_tlb_page(struct vm_area_struct * vma, unsigned long va) |
251 | { | 252 | { |
@@ -259,8 +260,8 @@ void flush_tlb_page(struct vm_area_struct * vma, unsigned long va) | |||
259 | if (current->active_mm == mm) { | 260 | if (current->active_mm == mm) { |
260 | if(current->mm) | 261 | if(current->mm) |
261 | __flush_tlb_one(va); | 262 | __flush_tlb_one(va); |
262 | else | 263 | else |
263 | leave_mm(smp_processor_id()); | 264 | leave_mm(smp_processor_id()); |
264 | } | 265 | } |
265 | 266 | ||
266 | if (!cpus_empty(cpu_mask)) | 267 | if (!cpus_empty(cpu_mask)) |
@@ -268,7 +269,6 @@ void flush_tlb_page(struct vm_area_struct * vma, unsigned long va) | |||
268 | 269 | ||
269 | preempt_enable(); | 270 | preempt_enable(); |
270 | } | 271 | } |
271 | EXPORT_SYMBOL(flush_tlb_page); | ||
272 | 272 | ||
273 | static void do_flush_tlb_all(void* info) | 273 | static void do_flush_tlb_all(void* info) |
274 | { | 274 | { |
@@ -325,11 +325,9 @@ void unlock_ipi_call_lock(void) | |||
325 | * this function sends a 'generic call function' IPI to all other CPU | 325 | * this function sends a 'generic call function' IPI to all other CPU |
326 | * of the system defined in the mask. | 326 | * of the system defined in the mask. |
327 | */ | 327 | */ |
328 | 328 | static int __smp_call_function_mask(cpumask_t mask, | |
329 | static int | 329 | void (*func)(void *), void *info, |
330 | __smp_call_function_mask(cpumask_t mask, | 330 | int wait) |
331 | void (*func)(void *), void *info, | ||
332 | int wait) | ||
333 | { | 331 | { |
334 | struct call_data_struct data; | 332 | struct call_data_struct data; |
335 | cpumask_t allbutself; | 333 | cpumask_t allbutself; |
@@ -417,11 +415,10 @@ EXPORT_SYMBOL(smp_call_function_mask); | |||
417 | */ | 415 | */ |
418 | 416 | ||
419 | int smp_call_function_single (int cpu, void (*func) (void *info), void *info, | 417 | int smp_call_function_single (int cpu, void (*func) (void *info), void *info, |
420 | int nonatomic, int wait) | 418 | int nonatomic, int wait) |
421 | { | 419 | { |
422 | /* prevent preemption and reschedule on another processor */ | 420 | /* prevent preemption and reschedule on another processor */ |
423 | int ret; | 421 | int ret, me = get_cpu(); |
424 | int me = get_cpu(); | ||
425 | 422 | ||
426 | /* Can deadlock when called with interrupts disabled */ | 423 | /* Can deadlock when called with interrupts disabled */ |
427 | WARN_ON(irqs_disabled()); | 424 | WARN_ON(irqs_disabled()); |
@@ -471,9 +468,9 @@ static void stop_this_cpu(void *dummy) | |||
471 | */ | 468 | */ |
472 | cpu_clear(smp_processor_id(), cpu_online_map); | 469 | cpu_clear(smp_processor_id(), cpu_online_map); |
473 | disable_local_APIC(); | 470 | disable_local_APIC(); |
474 | for (;;) | 471 | for (;;) |
475 | halt(); | 472 | halt(); |
476 | } | 473 | } |
477 | 474 | ||
478 | void smp_send_stop(void) | 475 | void smp_send_stop(void) |
479 | { | 476 | { |