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authorDave Jones <davej@codemonkey.org.uk>2008-03-26 12:09:16 -0400
committerIngo Molnar <mingo@elte.hu>2008-04-17 11:41:31 -0400
commit0e03eb86b51b21054aea01ada1d03e9c2265dd20 (patch)
treee1681847d9ce7c7a2613dfe75d98c4023fb0d007 /arch/x86/kernel/setup_64.c
parentaa040b2f0693695ae393cd9b8a93055952dbf76f (diff)
x86: Centaur Isaiah processor to use sysenter in 64-bit compatibility mode rather than syscall
Upcoming 64 bit processors from Centaur can use sysenter. Signed-off-by: Dave Jones <davej@codemonkey.org.uk> Signed-off-by: Jesse Ahrens <jahrens@centtech.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/setup_64.c')
-rw-r--r--arch/x86/kernel/setup_64.c35
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c
index 540686be35d0..b80300710c08 100644
--- a/arch/x86/kernel/setup_64.c
+++ b/arch/x86/kernel/setup_64.c
@@ -885,6 +885,32 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
885 srat_detect_node(); 885 srat_detect_node();
886} 886}
887 887
888static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c)
889{
890 if (c->x86 == 0x6 && c->x86_model >= 0xf)
891 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
892}
893
894static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
895{
896 /* Cache sizes */
897 unsigned n;
898
899 n = c->extended_cpuid_level;
900 if (n >= 0x80000008) {
901 unsigned eax = cpuid_eax(0x80000008);
902 c->x86_virt_bits = (eax >> 8) & 0xff;
903 c->x86_phys_bits = eax & 0xff;
904 }
905
906 if (c->x86 == 0x6 && c->x86_model >= 0xf) {
907 c->x86_cache_alignment = c->x86_clflush_size * 2;
908 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
909 set_cpu_cap(c, X86_FEATURE_REP_GOOD);
910 }
911 set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
912}
913
888static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c) 914static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
889{ 915{
890 char *v = c->x86_vendor_id; 916 char *v = c->x86_vendor_id;
@@ -893,6 +919,8 @@ static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
893 c->x86_vendor = X86_VENDOR_AMD; 919 c->x86_vendor = X86_VENDOR_AMD;
894 else if (!strcmp(v, "GenuineIntel")) 920 else if (!strcmp(v, "GenuineIntel"))
895 c->x86_vendor = X86_VENDOR_INTEL; 921 c->x86_vendor = X86_VENDOR_INTEL;
922 else if (!strcmp(v, "CentaurHauls"))
923 c->x86_vendor = X86_VENDOR_CENTAUR;
896 else 924 else
897 c->x86_vendor = X86_VENDOR_UNKNOWN; 925 c->x86_vendor = X86_VENDOR_UNKNOWN;
898} 926}
@@ -989,6 +1017,9 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
989 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15)) 1017 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
990 set_cpu_cap(c, X86_FEATURE_PAT); 1018 set_cpu_cap(c, X86_FEATURE_PAT);
991 break; 1019 break;
1020 case X86_VENDOR_CENTAUR:
1021 early_init_centaur(c);
1022 break;
992 } 1023 }
993 1024
994} 1025}
@@ -1025,6 +1056,10 @@ void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1025 init_intel(c); 1056 init_intel(c);
1026 break; 1057 break;
1027 1058
1059 case X86_VENDOR_CENTAUR:
1060 init_centaur(c);
1061 break;
1062
1028 case X86_VENDOR_UNKNOWN: 1063 case X86_VENDOR_UNKNOWN:
1029 default: 1064 default:
1030 display_cacheinfo(c); 1065 display_cacheinfo(c);