diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2008-01-30 07:30:39 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 07:30:39 -0500 |
commit | 04e1ba852132c9ad006affcd5b8c8606295170b0 (patch) | |
tree | 3c91e8b8de301b27e0cc9eaf9cea366636c683f9 /arch/x86/kernel/setup_64.c | |
parent | 5cabbd97b10229159919ff17f746b69742cec84d (diff) |
x86: cleanup kernel/setup_64.c
Clean it up before applying more patches to it.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/setup_64.c')
-rw-r--r-- | arch/x86/kernel/setup_64.c | 249 |
1 files changed, 126 insertions, 123 deletions
diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c index 1acb435a0585..62db062ba138 100644 --- a/arch/x86/kernel/setup_64.c +++ b/arch/x86/kernel/setup_64.c | |||
@@ -77,7 +77,7 @@ unsigned long saved_video_mode; | |||
77 | 77 | ||
78 | int force_mwait __cpuinitdata; | 78 | int force_mwait __cpuinitdata; |
79 | 79 | ||
80 | /* | 80 | /* |
81 | * Early DMI memory | 81 | * Early DMI memory |
82 | */ | 82 | */ |
83 | int dmi_alloc_index; | 83 | int dmi_alloc_index; |
@@ -169,12 +169,12 @@ contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn) | |||
169 | bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT; | 169 | bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT; |
170 | bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size); | 170 | bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size); |
171 | if (bootmap == -1L) | 171 | if (bootmap == -1L) |
172 | panic("Cannot find bootmem map of size %ld\n",bootmap_size); | 172 | panic("Cannot find bootmem map of size %ld\n", bootmap_size); |
173 | bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn); | 173 | bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn); |
174 | e820_register_active_regions(0, start_pfn, end_pfn); | 174 | e820_register_active_regions(0, start_pfn, end_pfn); |
175 | free_bootmem_with_active_regions(0, end_pfn); | 175 | free_bootmem_with_active_regions(0, end_pfn); |
176 | reserve_bootmem(bootmap, bootmap_size); | 176 | reserve_bootmem(bootmap, bootmap_size); |
177 | } | 177 | } |
178 | #endif | 178 | #endif |
179 | 179 | ||
180 | #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE) | 180 | #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE) |
@@ -208,7 +208,8 @@ static void __init reserve_crashkernel(void) | |||
208 | unsigned long long crash_size, crash_base; | 208 | unsigned long long crash_size, crash_base; |
209 | int ret; | 209 | int ret; |
210 | 210 | ||
211 | free_mem = ((unsigned long long)max_low_pfn - min_low_pfn) << PAGE_SHIFT; | 211 | free_mem = |
212 | ((unsigned long long)max_low_pfn - min_low_pfn) << PAGE_SHIFT; | ||
212 | 213 | ||
213 | ret = parse_crashkernel(boot_command_line, free_mem, | 214 | ret = parse_crashkernel(boot_command_line, free_mem, |
214 | &crash_size, &crash_base); | 215 | &crash_size, &crash_base); |
@@ -240,7 +241,7 @@ unsigned __initdata ebda_size; | |||
240 | static void discover_ebda(void) | 241 | static void discover_ebda(void) |
241 | { | 242 | { |
242 | /* | 243 | /* |
243 | * there is a real-mode segmented pointer pointing to the | 244 | * there is a real-mode segmented pointer pointing to the |
244 | * 4K EBDA area at 0x40E | 245 | * 4K EBDA area at 0x40E |
245 | */ | 246 | */ |
246 | ebda_addr = *(unsigned short *)__va(EBDA_ADDR_POINTER); | 247 | ebda_addr = *(unsigned short *)__va(EBDA_ADDR_POINTER); |
@@ -259,6 +260,8 @@ static void discover_ebda(void) | |||
259 | 260 | ||
260 | void __init setup_arch(char **cmdline_p) | 261 | void __init setup_arch(char **cmdline_p) |
261 | { | 262 | { |
263 | unsigned i; | ||
264 | |||
262 | printk(KERN_INFO "Command line: %s\n", boot_command_line); | 265 | printk(KERN_INFO "Command line: %s\n", boot_command_line); |
263 | 266 | ||
264 | ROOT_DEV = old_decode_dev(boot_params.hdr.root_dev); | 267 | ROOT_DEV = old_decode_dev(boot_params.hdr.root_dev); |
@@ -345,13 +348,13 @@ void __init setup_arch(char **cmdline_p) | |||
345 | #endif | 348 | #endif |
346 | 349 | ||
347 | #ifdef CONFIG_NUMA | 350 | #ifdef CONFIG_NUMA |
348 | numa_initmem_init(0, end_pfn); | 351 | numa_initmem_init(0, end_pfn); |
349 | #else | 352 | #else |
350 | contig_initmem_init(0, end_pfn); | 353 | contig_initmem_init(0, end_pfn); |
351 | #endif | 354 | #endif |
352 | 355 | ||
353 | /* Reserve direct mapping */ | 356 | /* Reserve direct mapping */ |
354 | reserve_bootmem_generic(table_start << PAGE_SHIFT, | 357 | reserve_bootmem_generic(table_start << PAGE_SHIFT, |
355 | (table_end - table_start) << PAGE_SHIFT); | 358 | (table_end - table_start) << PAGE_SHIFT); |
356 | 359 | ||
357 | /* reserve kernel */ | 360 | /* reserve kernel */ |
@@ -379,14 +382,14 @@ void __init setup_arch(char **cmdline_p) | |||
379 | #endif | 382 | #endif |
380 | 383 | ||
381 | #ifdef CONFIG_ACPI_SLEEP | 384 | #ifdef CONFIG_ACPI_SLEEP |
382 | /* | ||
383 | * Reserve low memory region for sleep support. | ||
384 | */ | ||
385 | acpi_reserve_bootmem(); | ||
386 | #endif | ||
387 | /* | 385 | /* |
388 | * Find and reserve possible boot-time SMP configuration: | 386 | * Reserve low memory region for sleep support. |
389 | */ | 387 | */ |
388 | acpi_reserve_bootmem(); | ||
389 | #endif | ||
390 | /* | ||
391 | * Find and reserve possible boot-time SMP configuration: | ||
392 | */ | ||
390 | find_smp_config(); | 393 | find_smp_config(); |
391 | #ifdef CONFIG_BLK_DEV_INITRD | 394 | #ifdef CONFIG_BLK_DEV_INITRD |
392 | if (boot_params.hdr.type_of_loader && boot_params.hdr.ramdisk_image) { | 395 | if (boot_params.hdr.type_of_loader && boot_params.hdr.ramdisk_image) { |
@@ -437,16 +440,13 @@ void __init setup_arch(char **cmdline_p) | |||
437 | 440 | ||
438 | /* | 441 | /* |
439 | * We trust e820 completely. No explicit ROM probing in memory. | 442 | * We trust e820 completely. No explicit ROM probing in memory. |
440 | */ | 443 | */ |
441 | e820_reserve_resources(&code_resource, &data_resource, &bss_resource); | 444 | e820_reserve_resources(&code_resource, &data_resource, &bss_resource); |
442 | e820_mark_nosave_regions(); | 445 | e820_mark_nosave_regions(); |
443 | 446 | ||
444 | { | ||
445 | unsigned i; | ||
446 | /* request I/O space for devices used on all i[345]86 PCs */ | 447 | /* request I/O space for devices used on all i[345]86 PCs */ |
447 | for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++) | 448 | for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++) |
448 | request_resource(&ioport_resource, &standard_io_resources[i]); | 449 | request_resource(&ioport_resource, &standard_io_resources[i]); |
449 | } | ||
450 | 450 | ||
451 | e820_setup_gap(); | 451 | e820_setup_gap(); |
452 | 452 | ||
@@ -483,9 +483,10 @@ static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c) | |||
483 | 483 | ||
484 | if (n >= 0x80000005) { | 484 | if (n >= 0x80000005) { |
485 | cpuid(0x80000005, &dummy, &ebx, &ecx, &edx); | 485 | cpuid(0x80000005, &dummy, &ebx, &ecx, &edx); |
486 | printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n", | 486 | printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), " |
487 | edx>>24, edx&0xFF, ecx>>24, ecx&0xFF); | 487 | "D cache %dK (%d bytes/line)\n", |
488 | c->x86_cache_size=(ecx>>24)+(edx>>24); | 488 | edx>>24, edx&0xFF, ecx>>24, ecx&0xFF); |
489 | c->x86_cache_size = (ecx>>24) + (edx>>24); | ||
489 | /* On K8 L1 TLB is inclusive, so don't count it */ | 490 | /* On K8 L1 TLB is inclusive, so don't count it */ |
490 | c->x86_tlbsize = 0; | 491 | c->x86_tlbsize = 0; |
491 | } | 492 | } |
@@ -501,9 +502,9 @@ static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c) | |||
501 | } | 502 | } |
502 | 503 | ||
503 | if (n >= 0x80000007) | 504 | if (n >= 0x80000007) |
504 | cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power); | 505 | cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power); |
505 | if (n >= 0x80000008) { | 506 | if (n >= 0x80000008) { |
506 | cpuid(0x80000008, &eax, &dummy, &dummy, &dummy); | 507 | cpuid(0x80000008, &eax, &dummy, &dummy, &dummy); |
507 | c->x86_virt_bits = (eax >> 8) & 0xff; | 508 | c->x86_virt_bits = (eax >> 8) & 0xff; |
508 | c->x86_phys_bits = eax & 0xff; | 509 | c->x86_phys_bits = eax & 0xff; |
509 | } | 510 | } |
@@ -512,14 +513,15 @@ static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c) | |||
512 | #ifdef CONFIG_NUMA | 513 | #ifdef CONFIG_NUMA |
513 | static int nearby_node(int apicid) | 514 | static int nearby_node(int apicid) |
514 | { | 515 | { |
515 | int i; | 516 | int i, node; |
517 | |||
516 | for (i = apicid - 1; i >= 0; i--) { | 518 | for (i = apicid - 1; i >= 0; i--) { |
517 | int node = apicid_to_node[i]; | 519 | node = apicid_to_node[i]; |
518 | if (node != NUMA_NO_NODE && node_online(node)) | 520 | if (node != NUMA_NO_NODE && node_online(node)) |
519 | return node; | 521 | return node; |
520 | } | 522 | } |
521 | for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) { | 523 | for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) { |
522 | int node = apicid_to_node[i]; | 524 | node = apicid_to_node[i]; |
523 | if (node != NUMA_NO_NODE && node_online(node)) | 525 | if (node != NUMA_NO_NODE && node_online(node)) |
524 | return node; | 526 | return node; |
525 | } | 527 | } |
@@ -559,27 +561,29 @@ static void __init amd_detect_cmp(struct cpuinfo_x86 *c) | |||
559 | c->phys_proc_id = phys_pkg_id(bits); | 561 | c->phys_proc_id = phys_pkg_id(bits); |
560 | 562 | ||
561 | #ifdef CONFIG_NUMA | 563 | #ifdef CONFIG_NUMA |
562 | node = c->phys_proc_id; | 564 | node = c->phys_proc_id; |
563 | if (apicid_to_node[apicid] != NUMA_NO_NODE) | 565 | if (apicid_to_node[apicid] != NUMA_NO_NODE) |
564 | node = apicid_to_node[apicid]; | 566 | node = apicid_to_node[apicid]; |
565 | if (!node_online(node)) { | 567 | if (!node_online(node)) { |
566 | /* Two possibilities here: | 568 | /* Two possibilities here: |
567 | - The CPU is missing memory and no node was created. | 569 | - The CPU is missing memory and no node was created. |
568 | In that case try picking one from a nearby CPU | 570 | In that case try picking one from a nearby CPU |
569 | - The APIC IDs differ from the HyperTransport node IDs | 571 | - The APIC IDs differ from the HyperTransport node IDs |
570 | which the K8 northbridge parsing fills in. | 572 | which the K8 northbridge parsing fills in. |
571 | Assume they are all increased by a constant offset, | 573 | Assume they are all increased by a constant offset, |
572 | but in the same order as the HT nodeids. | 574 | but in the same order as the HT nodeids. |
573 | If that doesn't result in a usable node fall back to the | 575 | If that doesn't result in a usable node fall back to the |
574 | path for the previous case. */ | 576 | path for the previous case. */ |
577 | |||
575 | int ht_nodeid = apicid - (cpu_data(0).phys_proc_id << bits); | 578 | int ht_nodeid = apicid - (cpu_data(0).phys_proc_id << bits); |
576 | if (ht_nodeid >= 0 && | 579 | |
577 | apicid_to_node[ht_nodeid] != NUMA_NO_NODE) | 580 | if (ht_nodeid >= 0 && |
578 | node = apicid_to_node[ht_nodeid]; | 581 | apicid_to_node[ht_nodeid] != NUMA_NO_NODE) |
579 | /* Pick a nearby node */ | 582 | node = apicid_to_node[ht_nodeid]; |
580 | if (!node_online(node)) | 583 | /* Pick a nearby node */ |
581 | node = nearby_node(apicid); | 584 | if (!node_online(node)) |
582 | } | 585 | node = nearby_node(apicid); |
586 | } | ||
583 | numa_set_node(cpu, node); | 587 | numa_set_node(cpu, node); |
584 | 588 | ||
585 | printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node); | 589 | printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node); |
@@ -599,8 +603,8 @@ static void __init amd_detect_cmp(struct cpuinfo_x86 *c) | |||
599 | /* AMD systems with C1E don't have a working lAPIC timer. Check for that. */ | 603 | /* AMD systems with C1E don't have a working lAPIC timer. Check for that. */ |
600 | static __cpuinit int amd_apic_timer_broken(void) | 604 | static __cpuinit int amd_apic_timer_broken(void) |
601 | { | 605 | { |
602 | u32 lo, hi; | 606 | u32 lo, hi, eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); |
603 | u32 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); | 607 | |
604 | switch (eax & CPUID_XFAM) { | 608 | switch (eax & CPUID_XFAM) { |
605 | case CPUID_XFAM_K8: | 609 | case CPUID_XFAM_K8: |
606 | if ((eax & CPUID_XMOD) < CPUID_XMOD_REV_F) | 610 | if ((eax & CPUID_XMOD) < CPUID_XMOD_REV_F) |
@@ -628,7 +632,7 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) | |||
628 | /* | 632 | /* |
629 | * Disable TLB flush filter by setting HWCR.FFDIS on K8 | 633 | * Disable TLB flush filter by setting HWCR.FFDIS on K8 |
630 | * bit 6 of msr C001_0015 | 634 | * bit 6 of msr C001_0015 |
631 | * | 635 | * |
632 | * Errata 63 for SH-B3 steppings | 636 | * Errata 63 for SH-B3 steppings |
633 | * Errata 122 for all steppings (F+ have it disabled by default) | 637 | * Errata 122 for all steppings (F+ have it disabled by default) |
634 | */ | 638 | */ |
@@ -642,10 +646,11 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) | |||
642 | /* Bit 31 in normal CPUID used for nonstandard 3DNow ID; | 646 | /* Bit 31 in normal CPUID used for nonstandard 3DNow ID; |
643 | 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */ | 647 | 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */ |
644 | clear_bit(0*32+31, &c->x86_capability); | 648 | clear_bit(0*32+31, &c->x86_capability); |
645 | 649 | ||
646 | /* On C+ stepping K8 rep microcode works well for copy/memset */ | 650 | /* On C+ stepping K8 rep microcode works well for copy/memset */ |
647 | level = cpuid_eax(1); | 651 | level = cpuid_eax(1); |
648 | if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58)) | 652 | if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || |
653 | level >= 0x0f58)) | ||
649 | set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability); | 654 | set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability); |
650 | if (c->x86 == 0x10 || c->x86 == 0x11) | 655 | if (c->x86 == 0x10 || c->x86 == 0x11) |
651 | set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability); | 656 | set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability); |
@@ -656,14 +661,14 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) | |||
656 | 661 | ||
657 | level = get_model_name(c); | 662 | level = get_model_name(c); |
658 | if (!level) { | 663 | if (!level) { |
659 | switch (c->x86) { | 664 | switch (c->x86) { |
660 | case 15: | 665 | case 15: |
661 | /* Should distinguish Models here, but this is only | 666 | /* Should distinguish Models here, but this is only |
662 | a fallback anyways. */ | 667 | a fallback anyways. */ |
663 | strcpy(c->x86_model_id, "Hammer"); | 668 | strcpy(c->x86_model_id, "Hammer"); |
664 | break; | 669 | break; |
665 | } | 670 | } |
666 | } | 671 | } |
667 | display_cacheinfo(c); | 672 | display_cacheinfo(c); |
668 | 673 | ||
669 | /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */ | 674 | /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */ |
@@ -697,25 +702,26 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) | |||
697 | static void __cpuinit detect_ht(struct cpuinfo_x86 *c) | 702 | static void __cpuinit detect_ht(struct cpuinfo_x86 *c) |
698 | { | 703 | { |
699 | #ifdef CONFIG_SMP | 704 | #ifdef CONFIG_SMP |
700 | u32 eax, ebx, ecx, edx; | 705 | u32 eax, ebx, ecx, edx; |
701 | int index_msb, core_bits; | 706 | int index_msb, core_bits; |
702 | 707 | ||
703 | cpuid(1, &eax, &ebx, &ecx, &edx); | 708 | cpuid(1, &eax, &ebx, &ecx, &edx); |
704 | 709 | ||
705 | 710 | ||
706 | if (!cpu_has(c, X86_FEATURE_HT)) | 711 | if (!cpu_has(c, X86_FEATURE_HT)) |
707 | return; | 712 | return; |
708 | if (cpu_has(c, X86_FEATURE_CMP_LEGACY)) | 713 | if (cpu_has(c, X86_FEATURE_CMP_LEGACY)) |
709 | goto out; | 714 | goto out; |
710 | 715 | ||
711 | smp_num_siblings = (ebx & 0xff0000) >> 16; | 716 | smp_num_siblings = (ebx & 0xff0000) >> 16; |
712 | 717 | ||
713 | if (smp_num_siblings == 1) { | 718 | if (smp_num_siblings == 1) { |
714 | printk(KERN_INFO "CPU: Hyper-Threading is disabled\n"); | 719 | printk(KERN_INFO "CPU: Hyper-Threading is disabled\n"); |
715 | } else if (smp_num_siblings > 1 ) { | 720 | } else if (smp_num_siblings > 1) { |
716 | 721 | ||
717 | if (smp_num_siblings > NR_CPUS) { | 722 | if (smp_num_siblings > NR_CPUS) { |
718 | printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings); | 723 | printk(KERN_WARNING "CPU: Unsupported number of " |
724 | "siblings %d", smp_num_siblings); | ||
719 | smp_num_siblings = 1; | 725 | smp_num_siblings = 1; |
720 | return; | 726 | return; |
721 | } | 727 | } |
@@ -725,7 +731,7 @@ static void __cpuinit detect_ht(struct cpuinfo_x86 *c) | |||
725 | 731 | ||
726 | smp_num_siblings = smp_num_siblings / c->x86_max_cores; | 732 | smp_num_siblings = smp_num_siblings / c->x86_max_cores; |
727 | 733 | ||
728 | index_msb = get_count_order(smp_num_siblings) ; | 734 | index_msb = get_count_order(smp_num_siblings); |
729 | 735 | ||
730 | core_bits = get_count_order(c->x86_max_cores); | 736 | core_bits = get_count_order(c->x86_max_cores); |
731 | 737 | ||
@@ -734,8 +740,10 @@ static void __cpuinit detect_ht(struct cpuinfo_x86 *c) | |||
734 | } | 740 | } |
735 | out: | 741 | out: |
736 | if ((c->x86_max_cores * smp_num_siblings) > 1) { | 742 | if ((c->x86_max_cores * smp_num_siblings) > 1) { |
737 | printk(KERN_INFO "CPU: Physical Processor ID: %d\n", c->phys_proc_id); | 743 | printk(KERN_INFO "CPU: Physical Processor ID: %d\n", |
738 | printk(KERN_INFO "CPU: Processor Core ID: %d\n", c->cpu_core_id); | 744 | c->phys_proc_id); |
745 | printk(KERN_INFO "CPU: Processor Core ID: %d\n", | ||
746 | c->cpu_core_id); | ||
739 | } | 747 | } |
740 | 748 | ||
741 | #endif | 749 | #endif |
@@ -783,7 +791,7 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) | |||
783 | unsigned n; | 791 | unsigned n; |
784 | 792 | ||
785 | init_intel_cacheinfo(c); | 793 | init_intel_cacheinfo(c); |
786 | if (c->cpuid_level > 9 ) { | 794 | if (c->cpuid_level > 9) { |
787 | unsigned eax = cpuid_eax(10); | 795 | unsigned eax = cpuid_eax(10); |
788 | /* Check for version and the number of counters */ | 796 | /* Check for version and the number of counters */ |
789 | if ((eax & 0xff) && (((eax>>8) & 0xff) > 1)) | 797 | if ((eax & 0xff) && (((eax>>8) & 0xff) > 1)) |
@@ -822,7 +830,7 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) | |||
822 | set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability); | 830 | set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability); |
823 | else | 831 | else |
824 | clear_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability); | 832 | clear_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability); |
825 | c->x86_max_cores = intel_num_cpu_cores(c); | 833 | c->x86_max_cores = intel_num_cpu_cores(c); |
826 | 834 | ||
827 | srat_detect_node(); | 835 | srat_detect_node(); |
828 | } | 836 | } |
@@ -869,7 +877,7 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c) | |||
869 | (unsigned int *)&c->x86_vendor_id[0], | 877 | (unsigned int *)&c->x86_vendor_id[0], |
870 | (unsigned int *)&c->x86_vendor_id[8], | 878 | (unsigned int *)&c->x86_vendor_id[8], |
871 | (unsigned int *)&c->x86_vendor_id[4]); | 879 | (unsigned int *)&c->x86_vendor_id[4]); |
872 | 880 | ||
873 | get_cpu_vendor(c); | 881 | get_cpu_vendor(c); |
874 | 882 | ||
875 | /* Initialize the standard set of capabilities */ | 883 | /* Initialize the standard set of capabilities */ |
@@ -887,7 +895,7 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c) | |||
887 | c->x86 += (tfms >> 20) & 0xff; | 895 | c->x86 += (tfms >> 20) & 0xff; |
888 | if (c->x86 >= 0x6) | 896 | if (c->x86 >= 0x6) |
889 | c->x86_model += ((tfms >> 16) & 0xF) << 4; | 897 | c->x86_model += ((tfms >> 16) & 0xF) << 4; |
890 | if (c->x86_capability[0] & (1<<19)) | 898 | if (c->x86_capability[0] & (1<<19)) |
891 | c->x86_clflush_size = ((misc >> 8) & 0xff) * 8; | 899 | c->x86_clflush_size = ((misc >> 8) & 0xff) * 8; |
892 | } else { | 900 | } else { |
893 | /* Have CPUID level 0 only - unheard of */ | 901 | /* Have CPUID level 0 only - unheard of */ |
@@ -959,7 +967,7 @@ void __cpuinit identify_cpu(struct cpuinfo_x86 *c) | |||
959 | } | 967 | } |
960 | 968 | ||
961 | select_idle_routine(c); | 969 | select_idle_routine(c); |
962 | detect_ht(c); | 970 | detect_ht(c); |
963 | 971 | ||
964 | /* | 972 | /* |
965 | * On SMP, boot_cpu_data holds the common feature set between | 973 | * On SMP, boot_cpu_data holds the common feature set between |
@@ -969,7 +977,7 @@ void __cpuinit identify_cpu(struct cpuinfo_x86 *c) | |||
969 | */ | 977 | */ |
970 | if (c != &boot_cpu_data) { | 978 | if (c != &boot_cpu_data) { |
971 | /* AND the already accumulated flags with these */ | 979 | /* AND the already accumulated flags with these */ |
972 | for (i = 0 ; i < NCAPINTS ; i++) | 980 | for (i = 0; i < NCAPINTS; i++) |
973 | boot_cpu_data.x86_capability[i] &= c->x86_capability[i]; | 981 | boot_cpu_data.x86_capability[i] &= c->x86_capability[i]; |
974 | } | 982 | } |
975 | 983 | ||
@@ -982,17 +990,16 @@ void __cpuinit identify_cpu(struct cpuinfo_x86 *c) | |||
982 | numa_add_cpu(smp_processor_id()); | 990 | numa_add_cpu(smp_processor_id()); |
983 | #endif | 991 | #endif |
984 | } | 992 | } |
985 | |||
986 | 993 | ||
987 | void __cpuinit print_cpu_info(struct cpuinfo_x86 *c) | 994 | void __cpuinit print_cpu_info(struct cpuinfo_x86 *c) |
988 | { | 995 | { |
989 | if (c->x86_model_id[0]) | 996 | if (c->x86_model_id[0]) |
990 | printk("%s", c->x86_model_id); | 997 | printk(KERN_INFO "%s", c->x86_model_id); |
991 | 998 | ||
992 | if (c->x86_mask || c->cpuid_level >= 0) | 999 | if (c->x86_mask || c->cpuid_level >= 0) |
993 | printk(" stepping %02x\n", c->x86_mask); | 1000 | printk(KERN_CONT " stepping %02x\n", c->x86_mask); |
994 | else | 1001 | else |
995 | printk("\n"); | 1002 | printk(KERN_CONT "\n"); |
996 | } | 1003 | } |
997 | 1004 | ||
998 | /* | 1005 | /* |
@@ -1002,9 +1009,9 @@ void __cpuinit print_cpu_info(struct cpuinfo_x86 *c) | |||
1002 | static int show_cpuinfo(struct seq_file *m, void *v) | 1009 | static int show_cpuinfo(struct seq_file *m, void *v) |
1003 | { | 1010 | { |
1004 | struct cpuinfo_x86 *c = v; | 1011 | struct cpuinfo_x86 *c = v; |
1005 | int cpu = 0; | 1012 | int cpu = 0, i; |
1006 | 1013 | ||
1007 | /* | 1014 | /* |
1008 | * These flag bits must match the definitions in <asm/cpufeature.h>. | 1015 | * These flag bits must match the definitions in <asm/cpufeature.h>. |
1009 | * NULL means this bit is undefined or reserved; either way it doesn't | 1016 | * NULL means this bit is undefined or reserved; either way it doesn't |
1010 | * have meaning as far as Linux is concerned. Note that it's important | 1017 | * have meaning as far as Linux is concerned. Note that it's important |
@@ -1014,10 +1021,10 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
1014 | */ | 1021 | */ |
1015 | static const char *const x86_cap_flags[] = { | 1022 | static const char *const x86_cap_flags[] = { |
1016 | /* Intel-defined */ | 1023 | /* Intel-defined */ |
1017 | "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", | 1024 | "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", |
1018 | "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov", | 1025 | "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov", |
1019 | "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx", | 1026 | "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx", |
1020 | "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", "pbe", | 1027 | "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", "pbe", |
1021 | 1028 | ||
1022 | /* AMD-defined */ | 1029 | /* AMD-defined */ |
1023 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, | 1030 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
@@ -1084,34 +1091,35 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
1084 | cpu = c->cpu_index; | 1091 | cpu = c->cpu_index; |
1085 | #endif | 1092 | #endif |
1086 | 1093 | ||
1087 | seq_printf(m,"processor\t: %u\n" | 1094 | seq_printf(m, "processor\t: %u\n" |
1088 | "vendor_id\t: %s\n" | 1095 | "vendor_id\t: %s\n" |
1089 | "cpu family\t: %d\n" | 1096 | "cpu family\t: %d\n" |
1090 | "model\t\t: %d\n" | 1097 | "model\t\t: %d\n" |
1091 | "model name\t: %s\n", | 1098 | "model name\t: %s\n", |
1092 | (unsigned)cpu, | 1099 | (unsigned)cpu, |
1093 | c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown", | 1100 | c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown", |
1094 | c->x86, | 1101 | c->x86, |
1095 | (int)c->x86_model, | 1102 | (int)c->x86_model, |
1096 | c->x86_model_id[0] ? c->x86_model_id : "unknown"); | 1103 | c->x86_model_id[0] ? c->x86_model_id : "unknown"); |
1097 | 1104 | ||
1098 | if (c->x86_mask || c->cpuid_level >= 0) | 1105 | if (c->x86_mask || c->cpuid_level >= 0) |
1099 | seq_printf(m, "stepping\t: %d\n", c->x86_mask); | 1106 | seq_printf(m, "stepping\t: %d\n", c->x86_mask); |
1100 | else | 1107 | else |
1101 | seq_printf(m, "stepping\t: unknown\n"); | 1108 | seq_printf(m, "stepping\t: unknown\n"); |
1102 | 1109 | ||
1103 | if (cpu_has(c,X86_FEATURE_TSC)) { | 1110 | if (cpu_has(c, X86_FEATURE_TSC)) { |
1104 | unsigned int freq = cpufreq_quick_get((unsigned)cpu); | 1111 | unsigned int freq = cpufreq_quick_get((unsigned)cpu); |
1112 | |||
1105 | if (!freq) | 1113 | if (!freq) |
1106 | freq = cpu_khz; | 1114 | freq = cpu_khz; |
1107 | seq_printf(m, "cpu MHz\t\t: %u.%03u\n", | 1115 | seq_printf(m, "cpu MHz\t\t: %u.%03u\n", |
1108 | freq / 1000, (freq % 1000)); | 1116 | freq / 1000, (freq % 1000)); |
1109 | } | 1117 | } |
1110 | 1118 | ||
1111 | /* Cache size */ | 1119 | /* Cache size */ |
1112 | if (c->x86_cache_size >= 0) | 1120 | if (c->x86_cache_size >= 0) |
1113 | seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size); | 1121 | seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size); |
1114 | 1122 | ||
1115 | #ifdef CONFIG_SMP | 1123 | #ifdef CONFIG_SMP |
1116 | if (smp_num_siblings * c->x86_max_cores > 1) { | 1124 | if (smp_num_siblings * c->x86_max_cores > 1) { |
1117 | seq_printf(m, "physical id\t: %d\n", c->phys_proc_id); | 1125 | seq_printf(m, "physical id\t: %d\n", c->phys_proc_id); |
@@ -1120,48 +1128,43 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
1120 | seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id); | 1128 | seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id); |
1121 | seq_printf(m, "cpu cores\t: %d\n", c->booted_cores); | 1129 | seq_printf(m, "cpu cores\t: %d\n", c->booted_cores); |
1122 | } | 1130 | } |
1123 | #endif | 1131 | #endif |
1124 | 1132 | ||
1125 | seq_printf(m, | 1133 | seq_printf(m, |
1126 | "fpu\t\t: yes\n" | 1134 | "fpu\t\t: yes\n" |
1127 | "fpu_exception\t: yes\n" | 1135 | "fpu_exception\t: yes\n" |
1128 | "cpuid level\t: %d\n" | 1136 | "cpuid level\t: %d\n" |
1129 | "wp\t\t: yes\n" | 1137 | "wp\t\t: yes\n" |
1130 | "flags\t\t:", | 1138 | "flags\t\t:", |
1131 | c->cpuid_level); | 1139 | c->cpuid_level); |
1132 | 1140 | ||
1133 | { | 1141 | for (i = 0; i < 32*NCAPINTS; i++) |
1134 | int i; | 1142 | if (cpu_has(c, i) && x86_cap_flags[i] != NULL) |
1135 | for ( i = 0 ; i < 32*NCAPINTS ; i++ ) | 1143 | seq_printf(m, " %s", x86_cap_flags[i]); |
1136 | if (cpu_has(c, i) && x86_cap_flags[i] != NULL) | 1144 | |
1137 | seq_printf(m, " %s", x86_cap_flags[i]); | ||
1138 | } | ||
1139 | |||
1140 | seq_printf(m, "\nbogomips\t: %lu.%02lu\n", | 1145 | seq_printf(m, "\nbogomips\t: %lu.%02lu\n", |
1141 | c->loops_per_jiffy/(500000/HZ), | 1146 | c->loops_per_jiffy/(500000/HZ), |
1142 | (c->loops_per_jiffy/(5000/HZ)) % 100); | 1147 | (c->loops_per_jiffy/(5000/HZ)) % 100); |
1143 | 1148 | ||
1144 | if (c->x86_tlbsize > 0) | 1149 | if (c->x86_tlbsize > 0) |
1145 | seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize); | 1150 | seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize); |
1146 | seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size); | 1151 | seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size); |
1147 | seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment); | 1152 | seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment); |
1148 | 1153 | ||
1149 | seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n", | 1154 | seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n", |
1150 | c->x86_phys_bits, c->x86_virt_bits); | 1155 | c->x86_phys_bits, c->x86_virt_bits); |
1151 | 1156 | ||
1152 | seq_printf(m, "power management:"); | 1157 | seq_printf(m, "power management:"); |
1153 | { | 1158 | for (i = 0; i < 32; i++) { |
1154 | unsigned i; | 1159 | if (c->x86_power & (1 << i)) { |
1155 | for (i = 0; i < 32; i++) | 1160 | if (i < ARRAY_SIZE(x86_power_flags) && |
1156 | if (c->x86_power & (1 << i)) { | 1161 | x86_power_flags[i]) |
1157 | if (i < ARRAY_SIZE(x86_power_flags) && | 1162 | seq_printf(m, "%s%s", |
1158 | x86_power_flags[i]) | 1163 | x86_power_flags[i][0]?" ":"", |
1159 | seq_printf(m, "%s%s", | 1164 | x86_power_flags[i]); |
1160 | x86_power_flags[i][0]?" ":"", | 1165 | else |
1161 | x86_power_flags[i]); | 1166 | seq_printf(m, " [%d]", i); |
1162 | else | 1167 | } |
1163 | seq_printf(m, " [%d]", i); | ||
1164 | } | ||
1165 | } | 1168 | } |
1166 | 1169 | ||
1167 | seq_printf(m, "\n\n"); | 1170 | seq_printf(m, "\n\n"); |
@@ -1189,7 +1192,7 @@ static void c_stop(struct seq_file *m, void *v) | |||
1189 | } | 1192 | } |
1190 | 1193 | ||
1191 | struct seq_operations cpuinfo_op = { | 1194 | struct seq_operations cpuinfo_op = { |
1192 | .start =c_start, | 1195 | .start = c_start, |
1193 | .next = c_next, | 1196 | .next = c_next, |
1194 | .stop = c_stop, | 1197 | .stop = c_stop, |
1195 | .show = show_cpuinfo, | 1198 | .show = show_cpuinfo, |