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authorAndreas Herrmann <andreas.herrmann3@amd.com>2009-04-17 06:07:46 -0400
committerIngo Molnar <mingo@elte.hu>2009-04-17 12:12:36 -0400
commit9b94b3a19b13e094c10f65f24bc358f6ffe4eacd (patch)
tree8e12a953129ca9d2f51467362bf3b1a98d9088f7 /arch/x86/kernel/quirks.c
parentb206525ad1f653b7da35f5827be93770d28eae11 (diff)
x86: fixup numa_node information for AMD CPU northbridge functions
Currently the numa_node attribute for these PCI devices is 0 (it corresponds to the numa_node for PCI bus 0). This is not a big issue but incorrect. This inconsistency can be fixed by reading the node number from CPU NB function 0. [ Impact: fill in dev->numa_node information, to optimize DMA allocations ] Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Cc: jbarnes@virtuousgeek.org LKML-Reference: <20090417100746.GG16198@alberich.amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/quirks.c')
-rw-r--r--arch/x86/kernel/quirks.c37
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index e95022e4f5d5..94ad0c029f02 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -493,5 +493,42 @@ void force_hpet_resume(void)
493 break; 493 break;
494 } 494 }
495} 495}
496#endif
497
498#if defined(CONFIG_PCI) && defined(CONFIG_NUMA)
499/* Set correct numa_node information for AMD NB functions */
500static void __init quirk_amd_nb_node(struct pci_dev *dev)
501{
502 struct pci_dev *nb_ht;
503 unsigned int devfn;
504 u32 val;
505
506 devfn = PCI_DEVFN(PCI_SLOT(dev->devfn), 0);
507 nb_ht = pci_get_slot(dev->bus, devfn);
508 if (!nb_ht)
509 return;
510
511 pci_read_config_dword(nb_ht, 0x60, &val);
512 set_dev_node(&dev->dev, val & 7);
513 pci_dev_put(dev);
514}
496 515
516DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB,
517 quirk_amd_nb_node);
518DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_ADDRMAP,
519 quirk_amd_nb_node);
520DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MEMCTL,
521 quirk_amd_nb_node);
522DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC,
523 quirk_amd_nb_node);
524DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_HT,
525 quirk_amd_nb_node);
526DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MAP,
527 quirk_amd_nb_node);
528DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_DRAM,
529 quirk_amd_nb_node);
530DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC,
531 quirk_amd_nb_node);
532DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_LINK,
533 quirk_amd_nb_node);
497#endif 534#endif