diff options
author | bjorn.helgaas@hp.com <bjorn.helgaas@hp.com> | 2007-12-17 16:09:40 -0500 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2008-02-01 18:04:27 -0500 |
commit | 9ed885541bc57a0810798ec1607a23a24a0e1b93 (patch) | |
tree | b8080d9d2cba2e64659876c0690392b5fc42cbdb /arch/x86/kernel/quirks.c | |
parent | f0fda801daaa95ad5ccf59e92e0688c34b37c627 (diff) |
PCI: use dev_printk in x86 quirk messages
Convert quirk printks to dev_printk().
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'arch/x86/kernel/quirks.c')
-rw-r--r-- | arch/x86/kernel/quirks.c | 43 |
1 files changed, 23 insertions, 20 deletions
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c index 150ba29a0d33..3cd7a2dcd4fe 100644 --- a/arch/x86/kernel/quirks.c +++ b/arch/x86/kernel/quirks.c | |||
@@ -30,8 +30,8 @@ static void __devinit quirk_intel_irqbalance(struct pci_dev *dev) | |||
30 | raw_pci_ops->read(0, 0, 0x40, 0x4c, 2, &word); | 30 | raw_pci_ops->read(0, 0, 0x40, 0x4c, 2, &word); |
31 | 31 | ||
32 | if (!(word & (1 << 13))) { | 32 | if (!(word & (1 << 13))) { |
33 | printk(KERN_INFO "Intel E7520/7320/7525 detected. " | 33 | dev_info(&dev->dev, "Intel E7520/7320/7525 detected; " |
34 | "Disabling irq balancing and affinity\n"); | 34 | "disabling irq balancing and affinity\n"); |
35 | #ifdef CONFIG_IRQBALANCE | 35 | #ifdef CONFIG_IRQBALANCE |
36 | irqbalance_disable(""); | 36 | irqbalance_disable(""); |
37 | #endif | 37 | #endif |
@@ -104,14 +104,16 @@ static void ich_force_enable_hpet(struct pci_dev *dev) | |||
104 | pci_read_config_dword(dev, 0xF0, &rcba); | 104 | pci_read_config_dword(dev, 0xF0, &rcba); |
105 | rcba &= 0xFFFFC000; | 105 | rcba &= 0xFFFFC000; |
106 | if (rcba == 0) { | 106 | if (rcba == 0) { |
107 | printk(KERN_DEBUG "RCBA disabled. Cannot force enable HPET\n"); | 107 | dev_printk(KERN_DEBUG, &dev->dev, "RCBA disabled; " |
108 | "cannot force enable HPET\n"); | ||
108 | return; | 109 | return; |
109 | } | 110 | } |
110 | 111 | ||
111 | /* use bits 31:14, 16 kB aligned */ | 112 | /* use bits 31:14, 16 kB aligned */ |
112 | rcba_base = ioremap_nocache(rcba, 0x4000); | 113 | rcba_base = ioremap_nocache(rcba, 0x4000); |
113 | if (rcba_base == NULL) { | 114 | if (rcba_base == NULL) { |
114 | printk(KERN_DEBUG "ioremap failed. Cannot force enable HPET\n"); | 115 | dev_printk(KERN_DEBUG, &dev->dev, "ioremap failed; " |
116 | "cannot force enable HPET\n"); | ||
115 | return; | 117 | return; |
116 | } | 118 | } |
117 | 119 | ||
@@ -122,8 +124,8 @@ static void ich_force_enable_hpet(struct pci_dev *dev) | |||
122 | /* HPET is enabled in HPTC. Just not reported by BIOS */ | 124 | /* HPET is enabled in HPTC. Just not reported by BIOS */ |
123 | val = val & 0x3; | 125 | val = val & 0x3; |
124 | force_hpet_address = 0xFED00000 | (val << 12); | 126 | force_hpet_address = 0xFED00000 | (val << 12); |
125 | printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n", | 127 | dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at " |
126 | force_hpet_address); | 128 | "0x%lx\n", force_hpet_address); |
127 | iounmap(rcba_base); | 129 | iounmap(rcba_base); |
128 | return; | 130 | return; |
129 | } | 131 | } |
@@ -142,11 +144,12 @@ static void ich_force_enable_hpet(struct pci_dev *dev) | |||
142 | if (err) { | 144 | if (err) { |
143 | force_hpet_address = 0; | 145 | force_hpet_address = 0; |
144 | iounmap(rcba_base); | 146 | iounmap(rcba_base); |
145 | printk(KERN_DEBUG "Failed to force enable HPET\n"); | 147 | dev_printk(KERN_DEBUG, &dev->dev, |
148 | "Failed to force enable HPET\n"); | ||
146 | } else { | 149 | } else { |
147 | force_hpet_resume_type = ICH_FORCE_HPET_RESUME; | 150 | force_hpet_resume_type = ICH_FORCE_HPET_RESUME; |
148 | printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n", | 151 | dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at " |
149 | force_hpet_address); | 152 | "0x%lx\n", force_hpet_address); |
150 | } | 153 | } |
151 | } | 154 | } |
152 | 155 | ||
@@ -208,8 +211,8 @@ static void old_ich_force_enable_hpet(struct pci_dev *dev) | |||
208 | if (val & 0x4) { | 211 | if (val & 0x4) { |
209 | val &= 0x3; | 212 | val &= 0x3; |
210 | force_hpet_address = 0xFED00000 | (val << 12); | 213 | force_hpet_address = 0xFED00000 | (val << 12); |
211 | printk(KERN_DEBUG "HPET at base address 0x%lx\n", | 214 | dev_printk(KERN_DEBUG, &dev->dev, "HPET at 0x%lx\n", |
212 | force_hpet_address); | 215 | force_hpet_address); |
213 | return; | 216 | return; |
214 | } | 217 | } |
215 | 218 | ||
@@ -229,14 +232,14 @@ static void old_ich_force_enable_hpet(struct pci_dev *dev) | |||
229 | /* HPET is enabled in HPTC. Just not reported by BIOS */ | 232 | /* HPET is enabled in HPTC. Just not reported by BIOS */ |
230 | val &= 0x3; | 233 | val &= 0x3; |
231 | force_hpet_address = 0xFED00000 | (val << 12); | 234 | force_hpet_address = 0xFED00000 | (val << 12); |
232 | printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n", | 235 | dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at " |
233 | force_hpet_address); | 236 | "0x%lx\n", force_hpet_address); |
234 | cached_dev = dev; | 237 | cached_dev = dev; |
235 | force_hpet_resume_type = OLD_ICH_FORCE_HPET_RESUME; | 238 | force_hpet_resume_type = OLD_ICH_FORCE_HPET_RESUME; |
236 | return; | 239 | return; |
237 | } | 240 | } |
238 | 241 | ||
239 | printk(KERN_DEBUG "Failed to force enable HPET\n"); | 242 | dev_printk(KERN_DEBUG, &dev->dev, "Failed to force enable HPET\n"); |
240 | } | 243 | } |
241 | 244 | ||
242 | /* | 245 | /* |
@@ -294,8 +297,8 @@ static void vt8237_force_enable_hpet(struct pci_dev *dev) | |||
294 | */ | 297 | */ |
295 | if (val & 0x80) { | 298 | if (val & 0x80) { |
296 | force_hpet_address = (val & ~0x3ff); | 299 | force_hpet_address = (val & ~0x3ff); |
297 | printk(KERN_DEBUG "HPET at base address 0x%lx\n", | 300 | dev_printk(KERN_DEBUG, &dev->dev, "HPET at 0x%lx\n", |
298 | force_hpet_address); | 301 | force_hpet_address); |
299 | return; | 302 | return; |
300 | } | 303 | } |
301 | 304 | ||
@@ -309,14 +312,14 @@ static void vt8237_force_enable_hpet(struct pci_dev *dev) | |||
309 | pci_read_config_dword(dev, 0x68, &val); | 312 | pci_read_config_dword(dev, 0x68, &val); |
310 | if (val & 0x80) { | 313 | if (val & 0x80) { |
311 | force_hpet_address = (val & ~0x3ff); | 314 | force_hpet_address = (val & ~0x3ff); |
312 | printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n", | 315 | dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at " |
313 | force_hpet_address); | 316 | "0x%lx\n", force_hpet_address); |
314 | cached_dev = dev; | 317 | cached_dev = dev; |
315 | force_hpet_resume_type = VT8237_FORCE_HPET_RESUME; | 318 | force_hpet_resume_type = VT8237_FORCE_HPET_RESUME; |
316 | return; | 319 | return; |
317 | } | 320 | } |
318 | 321 | ||
319 | printk(KERN_DEBUG "Failed to force enable HPET\n"); | 322 | dev_printk(KERN_DEBUG, &dev->dev, "Failed to force enable HPET\n"); |
320 | } | 323 | } |
321 | 324 | ||
322 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, | 325 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, |
@@ -344,7 +347,7 @@ static void nvidia_force_enable_hpet(struct pci_dev *dev) | |||
344 | pci_read_config_dword(dev, 0x44, &val); | 347 | pci_read_config_dword(dev, 0x44, &val); |
345 | force_hpet_address = val & 0xfffffffe; | 348 | force_hpet_address = val & 0xfffffffe; |
346 | force_hpet_resume_type = NVIDIA_FORCE_HPET_RESUME; | 349 | force_hpet_resume_type = NVIDIA_FORCE_HPET_RESUME; |
347 | printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n", | 350 | dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at 0x%lx\n", |
348 | force_hpet_address); | 351 | force_hpet_address); |
349 | cached_dev = dev; | 352 | cached_dev = dev; |
350 | return; | 353 | return; |