x86, bts: DS and BTS initialization

Impact: widen BTS/PEBS ptrace enablement to more CPU models

Move BTS initialisation out of an #ifdef CONFIG_X86_64 guard.

Assume core2 BTS and DS layout for future models of family 6 processors.

Signed-off-by: Markus Metzger <markus.t.metzger@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 4 insertions, 5 deletions

diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 0a6d8c12e10d..06180dff5b2e 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -929,17 +929,16 @@ void __cpuinit ptrace_bts_init_intel(struct cpuinfo_x86 *c)
         switch (c->x86) {
         case 0x6:
                 switch (c->x86_model) {
+                case 0 ... 0xC:
+                        /* sorry, don't know about them */
+                        break;
                 case 0xD:
                 case 0xE: /* Pentium M */
                         bts_configure(&bts_cfg_pentium_m);
                         break;
-                case 0xF: /* Core2 */
-        case 0x1C: /* Atom */
+                default: /* Core2, Atom, ... */
                         bts_configure(&bts_cfg_core2);
                         break;
-                default:
-                        /* sorry, don't know about them */
-                        break;
                 }
                 break;
         case 0xF: