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authorPavel Machek <pavel@ucw.cz>2008-04-15 06:43:57 -0400
committerIngo Molnar <mingo@elte.hu>2008-05-12 15:28:10 -0400
commit3bb6fbf9969a8bbe4892968659239273d092e78a (patch)
tree26ede22e0622abfbb585cd83199b2615b4b4542d /arch/x86/kernel/pci-gart_64.c
parent330fce23dab6e6a3d1979e55f27aba4c0c301331 (diff)
x86 gart: factor out common code
Cleanup gart handling on amd64 a bit: move common code into enable_gart_translation , and use symbolic register names where appropriate. Signed-off-by: Pavel Machek <pavel@suse.cz> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/pci-gart_64.c')
-rw-r--r--arch/x86/kernel/pci-gart_64.c23
1 files changed, 6 insertions, 17 deletions
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index bffcf455c857..1f99b62ff616 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -533,8 +533,8 @@ static __init unsigned read_aperture(struct pci_dev *dev, u32 *size)
533 unsigned aper_size = 0, aper_base_32, aper_order; 533 unsigned aper_size = 0, aper_base_32, aper_order;
534 u64 aper_base; 534 u64 aper_base;
535 535
536 pci_read_config_dword(dev, 0x94, &aper_base_32); 536 pci_read_config_dword(dev, AMD64_GARTAPERTUREBASE, &aper_base_32);
537 pci_read_config_dword(dev, 0x90, &aper_order); 537 pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &aper_order);
538 aper_order = (aper_order >> 1) & 7; 538 aper_order = (aper_order >> 1) & 7;
539 539
540 aper_base = aper_base_32 & 0x7fff; 540 aper_base = aper_base_32 & 0x7fff;
@@ -592,19 +592,8 @@ static __init int init_k8_gatt(struct agp_kern_info *info)
592 agp_gatt_table = gatt; 592 agp_gatt_table = gatt;
593 593
594 for (i = 0; i < num_k8_northbridges; i++) { 594 for (i = 0; i < num_k8_northbridges; i++) {
595 u32 gatt_reg;
596 u32 ctl;
597
598 dev = k8_northbridges[i]; 595 dev = k8_northbridges[i];
599 gatt_reg = __pa(gatt) >> 12; 596 enable_gart_translation(dev, __pa(gatt));
600 gatt_reg <<= 4;
601 pci_write_config_dword(dev, AMD64_GARTTABLEBASE, gatt_reg);
602 pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl);
603
604 ctl |= GARTEN;
605 ctl &= ~(DISGARTCPU | DISGARTIO);
606
607 pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
608 } 597 }
609 flush_gart(); 598 flush_gart();
610 599
@@ -648,11 +637,11 @@ void gart_iommu_shutdown(void)
648 u32 ctl; 637 u32 ctl;
649 638
650 dev = k8_northbridges[i]; 639 dev = k8_northbridges[i];
651 pci_read_config_dword(dev, 0x90, &ctl); 640 pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl);
652 641
653 ctl &= ~1; 642 ctl &= ~GARTEN;
654 643
655 pci_write_config_dword(dev, 0x90, ctl); 644 pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
656 } 645 }
657} 646}
658 647