diff options
| author | Ingo Molnar <mingo@elte.hu> | 2008-07-10 12:55:17 -0400 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-07-10 12:55:17 -0400 |
| commit | 520b9617ab4aea764ddfc5d58cae21c16b3318e1 (patch) | |
| tree | 1612249d11d455cfd6a0d691f5564673ae179c5f /arch/x86/kernel/microcode.c | |
| parent | f57e91682d141ea50d8c6d42cdc251b6256a3755 (diff) | |
| parent | f87f38ec5a5157aa39f44f6018dc58ea62f8e0e2 (diff) | |
Merge branch 'x86/core' into x86/generalize-visws
Diffstat (limited to 'arch/x86/kernel/microcode.c')
| -rw-r--r-- | arch/x86/kernel/microcode.c | 29 |
1 files changed, 15 insertions, 14 deletions
diff --git a/arch/x86/kernel/microcode.c b/arch/x86/kernel/microcode.c index 69729e38b78a..9758fea87c5b 100644 --- a/arch/x86/kernel/microcode.c +++ b/arch/x86/kernel/microcode.c | |||
| @@ -5,13 +5,14 @@ | |||
| 5 | * 2006 Shaohua Li <shaohua.li@intel.com> | 5 | * 2006 Shaohua Li <shaohua.li@intel.com> |
| 6 | * | 6 | * |
| 7 | * This driver allows to upgrade microcode on Intel processors | 7 | * This driver allows to upgrade microcode on Intel processors |
| 8 | * belonging to IA-32 family - PentiumPro, Pentium II, | 8 | * belonging to IA-32 family - PentiumPro, Pentium II, |
| 9 | * Pentium III, Xeon, Pentium 4, etc. | 9 | * Pentium III, Xeon, Pentium 4, etc. |
| 10 | * | 10 | * |
| 11 | * Reference: Section 8.10 of Volume III, Intel Pentium 4 Manual, | 11 | * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture |
| 12 | * Order Number 245472 or free download from: | 12 | * Software Developer's Manual |
| 13 | * | 13 | * Order Number 253668 or free download from: |
| 14 | * http://developer.intel.com/design/pentium4/manuals/245472.htm | 14 | * |
| 15 | * http://developer.intel.com/design/pentium4/manuals/253668.htm | ||
| 15 | * | 16 | * |
| 16 | * For more information, go to http://www.urbanmyth.org/microcode | 17 | * For more information, go to http://www.urbanmyth.org/microcode |
| 17 | * | 18 | * |
| @@ -58,12 +59,12 @@ | |||
| 58 | * nature of implementation. | 59 | * nature of implementation. |
| 59 | * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com> | 60 | * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com> |
| 60 | * Fix the panic when writing zero-length microcode chunk. | 61 | * Fix the panic when writing zero-length microcode chunk. |
| 61 | * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>, | 62 | * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>, |
| 62 | * Jun Nakajima <jun.nakajima@intel.com> | 63 | * Jun Nakajima <jun.nakajima@intel.com> |
| 63 | * Support for the microcode updates in the new format. | 64 | * Support for the microcode updates in the new format. |
| 64 | * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com> | 65 | * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com> |
| 65 | * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl | 66 | * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl |
| 66 | * because we no longer hold a copy of applied microcode | 67 | * because we no longer hold a copy of applied microcode |
| 67 | * in kernel memory. | 68 | * in kernel memory. |
| 68 | * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com> | 69 | * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com> |
| 69 | * Fix sigmatch() macro to handle old CPUs with pf == 0. | 70 | * Fix sigmatch() macro to handle old CPUs with pf == 0. |
| @@ -320,11 +321,11 @@ static void apply_microcode(int cpu) | |||
| 320 | return; | 321 | return; |
| 321 | 322 | ||
| 322 | /* serialize access to the physical write to MSR 0x79 */ | 323 | /* serialize access to the physical write to MSR 0x79 */ |
| 323 | spin_lock_irqsave(µcode_update_lock, flags); | 324 | spin_lock_irqsave(µcode_update_lock, flags); |
| 324 | 325 | ||
| 325 | /* write microcode via MSR 0x79 */ | 326 | /* write microcode via MSR 0x79 */ |
| 326 | wrmsr(MSR_IA32_UCODE_WRITE, | 327 | wrmsr(MSR_IA32_UCODE_WRITE, |
| 327 | (unsigned long) uci->mc->bits, | 328 | (unsigned long) uci->mc->bits, |
| 328 | (unsigned long) uci->mc->bits >> 16 >> 16); | 329 | (unsigned long) uci->mc->bits >> 16 >> 16); |
| 329 | wrmsr(MSR_IA32_UCODE_REV, 0, 0); | 330 | wrmsr(MSR_IA32_UCODE_REV, 0, 0); |
| 330 | 331 | ||
| @@ -341,7 +342,7 @@ static void apply_microcode(int cpu) | |||
| 341 | return; | 342 | return; |
| 342 | } | 343 | } |
| 343 | printk(KERN_INFO "microcode: CPU%d updated from revision " | 344 | printk(KERN_INFO "microcode: CPU%d updated from revision " |
| 344 | "0x%x to 0x%x, date = %08x \n", | 345 | "0x%x to 0x%x, date = %08x \n", |
| 345 | cpu_num, uci->rev, val[1], uci->mc->hdr.date); | 346 | cpu_num, uci->rev, val[1], uci->mc->hdr.date); |
| 346 | uci->rev = val[1]; | 347 | uci->rev = val[1]; |
| 347 | } | 348 | } |
| @@ -534,7 +535,7 @@ static int cpu_request_microcode(int cpu) | |||
| 534 | c->x86, c->x86_model, c->x86_mask); | 535 | c->x86, c->x86_model, c->x86_mask); |
| 535 | error = request_firmware(&firmware, name, µcode_pdev->dev); | 536 | error = request_firmware(&firmware, name, µcode_pdev->dev); |
| 536 | if (error) { | 537 | if (error) { |
| 537 | pr_debug("microcode: ucode data file %s load failed\n", name); | 538 | pr_debug("microcode: data file %s load failed\n", name); |
| 538 | return error; | 539 | return error; |
| 539 | } | 540 | } |
| 540 | buf = firmware->data; | 541 | buf = firmware->data; |
| @@ -805,6 +806,9 @@ static int __init microcode_init (void) | |||
| 805 | { | 806 | { |
| 806 | int error; | 807 | int error; |
| 807 | 808 | ||
| 809 | printk(KERN_INFO | ||
| 810 | "IA-32 Microcode Update Driver: v" MICROCODE_VERSION " <tigran@aivazian.fsnet.co.uk>\n"); | ||
| 811 | |||
| 808 | error = microcode_dev_init(); | 812 | error = microcode_dev_init(); |
| 809 | if (error) | 813 | if (error) |
| 810 | return error; | 814 | return error; |
| @@ -825,9 +829,6 @@ static int __init microcode_init (void) | |||
| 825 | } | 829 | } |
| 826 | 830 | ||
| 827 | register_hotcpu_notifier(&mc_cpu_notifier); | 831 | register_hotcpu_notifier(&mc_cpu_notifier); |
| 828 | |||
| 829 | printk(KERN_INFO | ||
| 830 | "IA-32 Microcode Update Driver: v" MICROCODE_VERSION " <tigran@aivazian.fsnet.co.uk>\n"); | ||
| 831 | return 0; | 832 | return 0; |
| 832 | } | 833 | } |
| 833 | 834 | ||
