x86: move init_ISA_irqs() in irqinit_32.c to match ordering in irqinit_64.c

Impact: cleanup

Reviewed-by Cyrill Gorcunov <gorcunov@openvz.org>
Signed-off-by: Pekka Enberg <penberg@cs.helsinki.fi>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 24 insertions, 24 deletions

diff --git a/arch/x86/kernel/irqinit_32.c b/arch/x86/kernel/irqinit_32.c
index 0c0dedccd036..c5cb769db7b0 100644
--- a/arch/x86/kernel/irqinit_32.c
+++ b/arch/x86/kernel/irqinit_32.c
@@ -53,30 +53,6 @@ static struct irqaction fpu_irq = {
         .name = "fpu",
 };
 
-static void __init init_ISA_irqs(void)
-{
-        int i;
-
-#ifdef CONFIG_X86_LOCAL_APIC
-        init_bsp_APIC();
-#endif
-        init_8259A(0);
-
-        /*
-         * 16 old-style INTA-cycle interrupts:
-         */
-        for (i = 0; i < NR_IRQS_LEGACY; i++) {
-                struct irq_desc *desc = irq_to_desc(i);
-
-                desc->status = IRQ_DISABLED;
-                desc->action = NULL;
-                desc->depth = 1;
-
-                set_irq_chip_and_handler_name(i, &i8259A_chip,
-                                              handle_level_irq, "XT");
-        }
-}
-
 /*
  * IRQ2 is cascade interrupt to second interrupt controller
  */
@@ -118,6 +94,30 @@ int vector_used_by_percpu_irq(unsigned int vector)
         return 0;
 }
 
+static void __init init_ISA_irqs(void)
+{
+        int i;
+
+#ifdef CONFIG_X86_LOCAL_APIC
+        init_bsp_APIC();
+#endif
+        init_8259A(0);
+
+        /*
+         * 16 old-style INTA-cycle interrupts:
+         */
+        for (i = 0; i < NR_IRQS_LEGACY; i++) {
+                struct irq_desc *desc = irq_to_desc(i);
+
+                desc->status = IRQ_DISABLED;
+                desc->action = NULL;
+                desc->depth = 1;
+
+                set_irq_chip_and_handler_name(i, &i8259A_chip,
+                                              handle_level_irq, "XT");
+        }
+}
+
 /* Overridden in paravirt.c */
 void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ")));