diff options
author | Cyrill Gorcunov <gorcunov@gmail.com> | 2008-08-11 10:34:08 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-08-11 10:43:09 -0400 |
commit | 2ae111cdd8d83ebf9de72e36e68a8c84b6ebbeea (patch) | |
tree | 0ca28a5869a172d0c76caa3ad8271524cc0a733b /arch/x86/kernel/irqinit_32.c | |
parent | 15dd859cacf312f606f54502d1f66537a1e5c78c (diff) |
x86: apic interrupts - move assignments to irqinit_32.c, v2
64bit mode APIC interrupt handlers are set within irqinit_64.c.
Lets do tha same for 32bit mode which would help in furter code merging.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/irqinit_32.c')
-rw-r--r-- | arch/x86/kernel/irqinit_32.c | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/x86/kernel/irqinit_32.c b/arch/x86/kernel/irqinit_32.c index d66914287ee1..9200a1e2752d 100644 --- a/arch/x86/kernel/irqinit_32.c +++ b/arch/x86/kernel/irqinit_32.c | |||
@@ -74,6 +74,15 @@ void __init init_ISA_irqs (void) | |||
74 | } | 74 | } |
75 | } | 75 | } |
76 | 76 | ||
77 | /* | ||
78 | * IRQ2 is cascade interrupt to second interrupt controller | ||
79 | */ | ||
80 | static struct irqaction irq2 = { | ||
81 | .handler = no_action, | ||
82 | .mask = CPU_MASK_NONE, | ||
83 | .name = "cascade", | ||
84 | }; | ||
85 | |||
77 | /* Overridden in paravirt.c */ | 86 | /* Overridden in paravirt.c */ |
78 | void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ"))); | 87 | void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ"))); |
79 | 88 | ||
@@ -98,6 +107,46 @@ void __init native_init_IRQ(void) | |||
98 | set_intr_gate(vector, interrupt[i]); | 107 | set_intr_gate(vector, interrupt[i]); |
99 | } | 108 | } |
100 | 109 | ||
110 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_SMP) | ||
111 | /* | ||
112 | * IRQ0 must be given a fixed assignment and initialized, | ||
113 | * because it's used before the IO-APIC is set up. | ||
114 | */ | ||
115 | set_intr_gate(FIRST_DEVICE_VECTOR, interrupt[0]); | ||
116 | |||
117 | /* | ||
118 | * The reschedule interrupt is a CPU-to-CPU reschedule-helper | ||
119 | * IPI, driven by wakeup. | ||
120 | */ | ||
121 | alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt); | ||
122 | |||
123 | /* IPI for invalidation */ | ||
124 | alloc_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt); | ||
125 | |||
126 | /* IPI for generic function call */ | ||
127 | alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt); | ||
128 | |||
129 | /* IPI for single call function */ | ||
130 | set_intr_gate(CALL_FUNCTION_SINGLE_VECTOR, call_function_single_interrupt); | ||
131 | #endif | ||
132 | |||
133 | #ifdef CONFIG_X86_LOCAL_APIC | ||
134 | /* self generated IPI for local APIC timer */ | ||
135 | alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt); | ||
136 | |||
137 | /* IPI vectors for APIC spurious and error interrupts */ | ||
138 | alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt); | ||
139 | alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt); | ||
140 | #endif | ||
141 | |||
142 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_MCE_P4THERMAL) | ||
143 | /* thermal monitor LVT interrupt */ | ||
144 | alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt); | ||
145 | #endif | ||
146 | |||
147 | if (!acpi_ioapic) | ||
148 | setup_irq(2, &irq2); | ||
149 | |||
101 | /* setup after call gates are initialised (usually add in | 150 | /* setup after call gates are initialised (usually add in |
102 | * the architecture specific gates) | 151 | * the architecture specific gates) |
103 | */ | 152 | */ |