x86: I/O APIC: keep the timer IRQ masked during set-up

Keep the timer interrupt line masked when reconfiguring its interrupt
redirection entry in the I/O APIC.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 1 insertions, 1 deletions

diff --git a/arch/x86/kernel/io_apic_32.c b/arch/x86/kernel/io_apic_32.c
index b381f93b79ae..63a2f64c765b 100644
--- a/arch/x86/kernel/io_apic_32.c
+++ b/arch/x86/kernel/io_apic_32.c
@@ -1316,7 +1316,7 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,
          * to the first CPU.
          */
         entry.dest_mode = INT_DEST_MODE;
-        entry.mask = 0;                                 /* unmask IRQ now */
+        entry.mask = 1;                                 /* mask IRQ now */
         entry.dest.logical.logical_dest = cpu_mask_to_apicid(TARGET_CPUS);
         entry.delivery_mode = INT_DELIVERY_MODE;
         entry.polarity = 0;