Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86: work around MTRR mask setting, v2
  x86: fix section mismatch warning - uv_cpu_init
  x86: fix VMI for early params
  x86: fix two modpost warnings in mm/init_64.c
  x86: fix 1:1 mapping init on 64-bit (memory hotplug case)
  x86: work around MTRR mask setting
  x86: PAT Update validate_pat_support for intel CPUs
  devmem, x86: PAT Change /dev/mem mmap with O_SYNC to use UC_MINUS
  x86: PAT proper tracking of set_memory_uc and friends
  x86: fix BUG: unable to handle kernel paging request (numaq_tsc_disable)
  x86: export pv_lock_ops non-GPL
  x86, mmiotrace: silence section mismatch warning - leave_uniprocessor
  x86: use WARN() in arch/x86/kernel
  x86: use WARN() in arch/x86/mm/ioremap.c
  werror: fix pci calgary
  x86: fix oprofile + hibernation badness
  x86, SGI UV: hardcode the TLB flush interrupt system vector
  x86: fix Xorg startup/shutdown slowdown with PAT
  x86: fix "kernel won't boot on a Cyrix MediaGXm (Geode)"
  x86 iommu: remove unneeded parenthesis

4 files changed, 34 insertions, 26 deletions

diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 84a8220a6072..a6ef672adbba 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -56,9 +56,22 @@ void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
 
         switch (c->x86_vendor) {
         case X86_VENDOR_INTEL:
-                if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
+                /*
+                 * There is a known erratum on Pentium III and Core Solo
+                 * and Core Duo CPUs.
+                 * " Page with PAT set to WC while associated MTRR is UC
+                 *   may consolidate to UC "
+                 * Because of this erratum, it is better to stick with
+                 * setting WC in MTRR rather than using PAT on these CPUs.
+                 *
+                 * Enable PAT WC only on P4, Core 2 or later CPUs.
+                 */
+                if (c->x86 > 0x6 || (c->x86 == 6 && c->x86_model >= 15))
                         return;
-                break;
+
+                pat_disable("PAT WC disabled due to known CPU erratum.");
+                return;
+
         case X86_VENDOR_AMD:
         case X86_VENDOR_CENTAUR:
         case X86_VENDOR_TRANSMETA:
diff --git a/arch/x86/kernel/cpu/cyrix.c b/arch/x86/kernel/cpu/cyrix.c
index 3fd7a67bb06a..e710a21bb6e8 100644
--- a/arch/x86/kernel/cpu/cyrix.c
+++ b/arch/x86/kernel/cpu/cyrix.c
@@ -134,23 +134,6 @@ static void __cpuinit set_cx86_memwb(void)
         setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x14);
 }
 
-static void __cpuinit set_cx86_inc(void)
-{
-        unsigned char ccr3;
-
-        printk(KERN_INFO "Enable Incrementor on Cyrix/NSC processor.\n");
-
-        ccr3 = getCx86(CX86_CCR3);
-        setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */
-        /* PCR1 -- Performance Control */
-        /* Incrementor on, whatever that is */
-        setCx86(CX86_PCR1, getCx86(CX86_PCR1) | 0x02);
-        /* PCR0 -- Performance Control */
-        /* Incrementor Margin 10 */
-        setCx86(CX86_PCR0, getCx86(CX86_PCR0) | 0x04);
-        setCx86(CX86_CCR3, ccr3);       /* disable MAPEN */
-}
-
 /*
  *      Configure later MediaGX and/or Geode processor.
  */
@@ -174,7 +157,6 @@ static void __cpuinit geode_configure(void)
 
         set_cx86_memwb();
         set_cx86_reorder();
-        set_cx86_inc();
 
         local_irq_restore(flags);
 }
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
index 509bd3d9eacd..cb7d3b6a80eb 100644
--- a/arch/x86/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
@@ -379,6 +379,7 @@ static void generic_get_mtrr(unsigned int reg, unsigned long *base,
                              unsigned long *size, mtrr_type *type)
 {
         unsigned int mask_lo, mask_hi, base_lo, base_hi;
+        unsigned int tmp, hi;
 
         rdmsr(MTRRphysMask_MSR(reg), mask_lo, mask_hi);
         if ((mask_lo & 0x800) == 0) {
@@ -392,8 +393,23 @@ static void generic_get_mtrr(unsigned int reg, unsigned long *base,
         rdmsr(MTRRphysBase_MSR(reg), base_lo, base_hi);
 
         /* Work out the shifted address mask. */
-        mask_lo = size_or_mask | mask_hi << (32 - PAGE_SHIFT)
-            | mask_lo >> PAGE_SHIFT;
+        tmp = mask_hi << (32 - PAGE_SHIFT) | mask_lo >> PAGE_SHIFT;
+        mask_lo = size_or_mask | tmp;
+        /* Expand tmp with high bits to all 1s*/
+        hi = fls(tmp);
+        if (hi > 0) {
+                tmp |= ~((1<<(hi - 1)) - 1);
+
+                if (tmp != mask_lo) {
+                        static int once = 1;
+
+                        if (once) {
+                                printk(KERN_INFO "mtrr: your BIOS has set up an incorrect mask, fixing it up.\n");
+                                once = 0;
+                        }
+                        mask_lo = tmp;
+                }
+        }
 
         /* This works correctly if size is a power of two, i.e. a
            contiguous range. */
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index 6f23969c8faf..b117d7f8a564 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -1496,11 +1496,8 @@ int __init mtrr_trim_uncached_memory(unsigned long end_pfn)
 
         /* kvm/qemu doesn't have mtrr set right, don't trim them all */
         if (!highest_pfn) {
-                if (!kvm_para_available()) {
-                        printk(KERN_WARNING
+                WARN(!kvm_para_available(), KERN_WARNING
                                 "WARNING: strange, CPU MTRRs all blank?\n");
-                        WARN_ON(1);
-                }
                 return 0;
         }