perf, x86: Share IBS macros between perf and oprofile

Moving IBS macros from oprofile to <asm/perf_event.h> to make it
available to perf. No additional changes.

Signed-off-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1316597423-25723-2-git-send-email-robert.richter@amd.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 2 insertions, 2 deletions

diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
index db8e603ff0c6..aeefd45697a2 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/kernel/cpu/perf_event_amd.c
@@ -411,7 +411,7 @@ static __initconst const struct x86_pmu amd_pmu = {
         .perfctr                = MSR_K7_PERFCTR0,
         .event_map              = amd_pmu_event_map,
         .max_events             = ARRAY_SIZE(amd_perfmon_event_map),
-        .num_counters           = 4,
+        .num_counters           = AMD64_NUM_COUNTERS,
         .cntval_bits            = 48,
         .cntval_mask            = (1ULL << 48) - 1,
         .apic                   = 1,
@@ -575,7 +575,7 @@ static __initconst const struct x86_pmu amd_pmu_f15h = {
         .perfctr                = MSR_F15H_PERF_CTR,
         .event_map              = amd_pmu_event_map,
         .max_events             = ARRAY_SIZE(amd_perfmon_event_map),
-        .num_counters           = 6,
+        .num_counters           = AMD64_NUM_COUNTERS_F15H,
         .cntval_bits            = 48,
         .cntval_mask            = (1ULL << 48) - 1,
         .apic                   = 1,