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authorAndi Kleen <ak@suse.de>2008-01-30 07:33:16 -0500
committerIngo Molnar <mingo@elte.hu>2008-01-30 07:33:16 -0500
commit0c07ee38c9d4eb081758f5ad14bbffa7197e1aec (patch)
treef32f5dba9b03b9fa5ac262a2c569b43ae9d0994e /arch/x86/kernel/cpu
parent30d432dfab2bcfd021d352e2058fae6b9405caeb (diff)
x86: use the correct cpuid method to detect MWAIT support for C states
Previously there was a AMD specific quirk to handle the case of AMD Fam10h MWAIT not supporting any C states. But it turns out that CPUID already has ways to detectly detect that without using special quirks. The new code simply checks if MWAIT supports at least C1 and doesn't use it if it doesn't. No more vendor specific code. Note this is does not simply clear MWAIT because MWAIT can be still useful even without C states. Credit goes to Ben Serebrin for pointing out the (nearly) obvious. Cc: "Andreas Herrmann" <andreas.herrmann3@amd.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/cpu')
-rw-r--r--arch/x86/kernel/cpu/amd.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index cd2fe15ff4b5..06fa159232fd 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -300,9 +300,6 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
300 local_apic_timer_disabled = 1; 300 local_apic_timer_disabled = 1;
301#endif 301#endif
302 302
303 if (c->x86 == 0x10 && !force_mwait)
304 clear_bit(X86_FEATURE_MWAIT, c->x86_capability);
305
306 /* K6s reports MCEs but don't actually have all the MSRs */ 303 /* K6s reports MCEs but don't actually have all the MSRs */
307 if (c->x86 < 6) 304 if (c->x86 < 6)
308 clear_bit(X86_FEATURE_MCE, c->x86_capability); 305 clear_bit(X86_FEATURE_MCE, c->x86_capability);