diff options
author | Sam Ravnborg <sam@ravnborg.org> | 2007-10-17 12:04:33 -0400 |
---|---|---|
committer | Thomas Gleixner <tglx@inhelltoy.tec.linutronix.de> | 2007-10-17 14:15:26 -0400 |
commit | d72b1b4f41b5159d2d0e54e54c794d500197572e (patch) | |
tree | eca58e1ee8e7fd7014b99a8c8a7bcf3c5b9038e1 /arch/x86/kernel/cpu | |
parent | 25d1b5167780c7f245d9655d302f6a3d8bf61d19 (diff) |
i386: fix section mismatch warning in intel.c
Fix following section mismatch warning:
WARNING: vmlinux.o(.text+0xc88c): Section mismatch: reference to .init.text:trap_init_f00f_bug (between 'init_intel' and 'cpuid4_cache_lookup')
init_intel are __cpuint where trap_init_f00f_bug is __init.
Fixed by declaring trap_init_f00f_bug __cpuinit.
Moved the defintion of trap_init_f00f_bug to the sole user in init.c
so the ugly prototype in intel.c could get killed.
Frank van Maarseveen <frankvm@frankvm.com> supplied the .config used
to reproduce the warning.
[ tglx: arch/x86 adaptation ]
Cc: Frank van Maarseveen <frankvm@frankvm.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/cpu')
-rw-r--r-- | arch/x86/kernel/cpu/intel.c | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index dc4e08147b1f..cc8c501b9f39 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c | |||
@@ -8,6 +8,7 @@ | |||
8 | #include <linux/module.h> | 8 | #include <linux/module.h> |
9 | 9 | ||
10 | #include <asm/processor.h> | 10 | #include <asm/processor.h> |
11 | #include <asm/pgtable.h> | ||
11 | #include <asm/msr.h> | 12 | #include <asm/msr.h> |
12 | #include <asm/uaccess.h> | 13 | #include <asm/uaccess.h> |
13 | 14 | ||
@@ -19,8 +20,6 @@ | |||
19 | #include <mach_apic.h> | 20 | #include <mach_apic.h> |
20 | #endif | 21 | #endif |
21 | 22 | ||
22 | extern int trap_init_f00f_bug(void); | ||
23 | |||
24 | #ifdef CONFIG_X86_INTEL_USERCOPY | 23 | #ifdef CONFIG_X86_INTEL_USERCOPY |
25 | /* | 24 | /* |
26 | * Alignment at which movsl is preferred for bulk memory copies. | 25 | * Alignment at which movsl is preferred for bulk memory copies. |
@@ -95,6 +94,20 @@ static int __cpuinit num_cpu_cores(struct cpuinfo_x86 *c) | |||
95 | return 1; | 94 | return 1; |
96 | } | 95 | } |
97 | 96 | ||
97 | #ifdef CONFIG_X86_F00F_BUG | ||
98 | static void __cpuinit trap_init_f00f_bug(void) | ||
99 | { | ||
100 | __set_fixmap(FIX_F00F_IDT, __pa(&idt_table), PAGE_KERNEL_RO); | ||
101 | |||
102 | /* | ||
103 | * Update the IDT descriptor and reload the IDT so that | ||
104 | * it uses the read-only mapped virtual address. | ||
105 | */ | ||
106 | idt_descr.address = fix_to_virt(FIX_F00F_IDT); | ||
107 | load_idt(&idt_descr); | ||
108 | } | ||
109 | #endif | ||
110 | |||
98 | static void __cpuinit init_intel(struct cpuinfo_x86 *c) | 111 | static void __cpuinit init_intel(struct cpuinfo_x86 *c) |
99 | { | 112 | { |
100 | unsigned int l2 = 0; | 113 | unsigned int l2 = 0; |