diff options
author | H. Peter Anvin <hpa@zytor.com> | 2008-01-30 07:30:56 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 07:30:56 -0500 |
commit | 65ea5b0349903585bfed9720fa06f5edb4f1cd25 (patch) | |
tree | 6c252228c34416b7e2077f23475de34500c2ab8a /arch/x86/kernel/cpu | |
parent | 53756d3722172815f52272b28c6d5d5e9639adde (diff) |
x86: rename the struct pt_regs members for 32/64-bit consistency
We have a lot of code which differs only by the naming of specific
members of structures that contain registers. In order to enable
additional unifications, this patch drops the e- or r- size prefix
from the register names in struct pt_regs, and drops the x- prefixes
for segment registers on the 32-bit side.
This patch also performs the equivalent renames in some additional
places that might be candidates for unification in the future.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/cpu')
-rw-r--r-- | arch/x86/kernel/cpu/common.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce_64.c | 14 |
2 files changed, 8 insertions, 8 deletions
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index e2fcf2051bdb..5db2a163bf4b 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c | |||
@@ -634,7 +634,7 @@ void __init early_cpu_init(void) | |||
634 | struct pt_regs * __devinit idle_regs(struct pt_regs *regs) | 634 | struct pt_regs * __devinit idle_regs(struct pt_regs *regs) |
635 | { | 635 | { |
636 | memset(regs, 0, sizeof(struct pt_regs)); | 636 | memset(regs, 0, sizeof(struct pt_regs)); |
637 | regs->xfs = __KERNEL_PERCPU; | 637 | regs->fs = __KERNEL_PERCPU; |
638 | return regs; | 638 | return regs; |
639 | } | 639 | } |
640 | 640 | ||
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c index 3c7672c40cf4..0adad772d0da 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_64.c +++ b/arch/x86/kernel/cpu/mcheck/mce_64.c | |||
@@ -110,12 +110,12 @@ static void print_mce(struct mce *m) | |||
110 | KERN_EMERG | 110 | KERN_EMERG |
111 | "CPU %d: Machine Check Exception: %16Lx Bank %d: %016Lx\n", | 111 | "CPU %d: Machine Check Exception: %16Lx Bank %d: %016Lx\n", |
112 | m->cpu, m->mcgstatus, m->bank, m->status); | 112 | m->cpu, m->mcgstatus, m->bank, m->status); |
113 | if (m->rip) { | 113 | if (m->ip) { |
114 | printk(KERN_EMERG "RIP%s %02x:<%016Lx> ", | 114 | printk(KERN_EMERG "RIP%s %02x:<%016Lx> ", |
115 | !(m->mcgstatus & MCG_STATUS_EIPV) ? " !INEXACT!" : "", | 115 | !(m->mcgstatus & MCG_STATUS_EIPV) ? " !INEXACT!" : "", |
116 | m->cs, m->rip); | 116 | m->cs, m->ip); |
117 | if (m->cs == __KERNEL_CS) | 117 | if (m->cs == __KERNEL_CS) |
118 | print_symbol("{%s}", m->rip); | 118 | print_symbol("{%s}", m->ip); |
119 | printk("\n"); | 119 | printk("\n"); |
120 | } | 120 | } |
121 | printk(KERN_EMERG "TSC %Lx ", m->tsc); | 121 | printk(KERN_EMERG "TSC %Lx ", m->tsc); |
@@ -156,16 +156,16 @@ static int mce_available(struct cpuinfo_x86 *c) | |||
156 | static inline void mce_get_rip(struct mce *m, struct pt_regs *regs) | 156 | static inline void mce_get_rip(struct mce *m, struct pt_regs *regs) |
157 | { | 157 | { |
158 | if (regs && (m->mcgstatus & MCG_STATUS_RIPV)) { | 158 | if (regs && (m->mcgstatus & MCG_STATUS_RIPV)) { |
159 | m->rip = regs->rip; | 159 | m->ip = regs->ip; |
160 | m->cs = regs->cs; | 160 | m->cs = regs->cs; |
161 | } else { | 161 | } else { |
162 | m->rip = 0; | 162 | m->ip = 0; |
163 | m->cs = 0; | 163 | m->cs = 0; |
164 | } | 164 | } |
165 | if (rip_msr) { | 165 | if (rip_msr) { |
166 | /* Assume the RIP in the MSR is exact. Is this true? */ | 166 | /* Assume the RIP in the MSR is exact. Is this true? */ |
167 | m->mcgstatus |= MCG_STATUS_EIPV; | 167 | m->mcgstatus |= MCG_STATUS_EIPV; |
168 | rdmsrl(rip_msr, m->rip); | 168 | rdmsrl(rip_msr, m->ip); |
169 | m->cs = 0; | 169 | m->cs = 0; |
170 | } | 170 | } |
171 | } | 171 | } |
@@ -288,7 +288,7 @@ void do_machine_check(struct pt_regs * regs, long error_code) | |||
288 | * instruction which caused the MCE. | 288 | * instruction which caused the MCE. |
289 | */ | 289 | */ |
290 | if (m.mcgstatus & MCG_STATUS_EIPV) | 290 | if (m.mcgstatus & MCG_STATUS_EIPV) |
291 | user_space = panicm.rip && (panicm.cs & 3); | 291 | user_space = panicm.ip && (panicm.cs & 3); |
292 | 292 | ||
293 | /* | 293 | /* |
294 | * If we know that the error was in user space, send a | 294 | * If we know that the error was in user space, send a |